2015-10-11 00:18:32 +02:00
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/*
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* QTest testcase for ivshmem
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*
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* Copyright (c) 2014 SUSE LINUX Products GmbH
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2014-04-02 16:57:48 +02:00
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* Copyright (c) 2015 Red Hat, Inc.
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2015-10-11 00:18:32 +02:00
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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2016-02-08 19:08:51 +01:00
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#include "qemu/osdep.h"
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2014-04-02 16:57:48 +02:00
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#include <glib/gstdio.h>
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#include "contrib/ivshmem-server/ivshmem-server.h"
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2017-01-05 16:29:47 +01:00
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#include "libqos/libqos-pc.h"
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2017-01-05 16:29:48 +01:00
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#include "libqos/libqos-spapr.h"
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2015-10-11 00:18:32 +02:00
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#include "libqtest.h"
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2014-04-02 16:57:48 +02:00
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#include "qemu-common.h"
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2015-10-11 00:18:32 +02:00
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2014-04-02 16:57:48 +02:00
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#define TMPSHMSIZE (1 << 20)
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static char *tmpshm;
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static void *tmpshmem;
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static char *tmpdir;
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static char *tmpserver;
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2015-10-11 00:18:32 +02:00
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2014-04-02 16:57:48 +02:00
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static void save_fn(QPCIDevice *dev, int devfn, void *data)
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2015-10-11 00:18:32 +02:00
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{
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2014-04-02 16:57:48 +02:00
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QPCIDevice **pdev = (QPCIDevice **) data;
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*pdev = dev;
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}
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2015-12-18 15:13:59 +01:00
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static QPCIDevice *get_device(QPCIBus *pcibus)
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2014-04-02 16:57:48 +02:00
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{
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QPCIDevice *dev;
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2015-11-24 18:06:27 +01:00
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dev = NULL;
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2014-04-02 16:57:48 +02:00
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qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
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g_assert(dev != NULL);
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return dev;
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}
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typedef struct _IVState {
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2017-01-05 16:29:47 +01:00
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QOSState *qs;
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2016-10-24 06:52:06 +02:00
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QPCIBar reg_bar, mem_bar;
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2014-04-02 16:57:48 +02:00
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QPCIDevice *dev;
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} IVState;
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enum Reg {
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INTRMASK = 0,
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INTRSTATUS = 4,
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IVPOSITION = 8,
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DOORBELL = 12,
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};
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static const char* reg2str(enum Reg reg) {
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switch (reg) {
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case INTRMASK:
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return "IntrMask";
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case INTRSTATUS:
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return "IntrStatus";
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case IVPOSITION:
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return "IVPosition";
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case DOORBELL:
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return "DoorBell";
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default:
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return NULL;
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}
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}
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static inline unsigned in_reg(IVState *s, enum Reg reg)
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{
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const char *name = reg2str(reg);
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QTestState *qtest = global_qtest;
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unsigned res;
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2017-01-05 16:29:47 +01:00
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global_qtest = s->qs->qts;
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2016-10-24 06:52:06 +02:00
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res = qpci_io_readl(s->dev, s->reg_bar, reg);
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2014-04-02 16:57:48 +02:00
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g_test_message("*%s -> %x\n", name, res);
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global_qtest = qtest;
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return res;
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}
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static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
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{
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const char *name = reg2str(reg);
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QTestState *qtest = global_qtest;
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2017-01-05 16:29:47 +01:00
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global_qtest = s->qs->qts;
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2014-04-02 16:57:48 +02:00
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g_test_message("%x -> *%s\n", v, name);
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2016-10-24 06:52:06 +02:00
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qpci_io_writel(s->dev, s->reg_bar, reg, v);
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2014-04-02 16:57:48 +02:00
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global_qtest = qtest;
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}
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2016-10-18 07:18:45 +02:00
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static inline void read_mem(IVState *s, uint64_t off, void *buf, size_t len)
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{
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QTestState *qtest = global_qtest;
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2017-01-05 16:29:47 +01:00
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global_qtest = s->qs->qts;
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2016-10-24 06:52:06 +02:00
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qpci_memread(s->dev, s->mem_bar, off, buf, len);
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2016-10-18 07:18:45 +02:00
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global_qtest = qtest;
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}
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static inline void write_mem(IVState *s, uint64_t off,
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const void *buf, size_t len)
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{
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QTestState *qtest = global_qtest;
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2017-01-05 16:29:47 +01:00
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global_qtest = s->qs->qts;
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2016-10-24 06:52:06 +02:00
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qpci_memwrite(s->dev, s->mem_bar, off, buf, len);
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2016-10-18 07:18:45 +02:00
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global_qtest = qtest;
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}
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2015-12-18 15:13:59 +01:00
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static void cleanup_vm(IVState *s)
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{
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g_free(s->dev);
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2017-01-05 16:29:47 +01:00
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qtest_shutdown(s->qs);
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2015-12-18 15:13:59 +01:00
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}
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2014-04-02 16:57:48 +02:00
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static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
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{
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uint64_t barsize;
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2017-01-05 16:29:47 +01:00
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const char *arch = qtest_get_arch();
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2014-04-02 16:57:48 +02:00
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2017-01-05 16:29:47 +01:00
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if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) {
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s->qs = qtest_pc_boot(cmd);
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2017-01-05 16:29:48 +01:00
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} else if (strcmp(arch, "ppc64") == 0) {
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s->qs = qtest_spapr_boot(cmd);
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2017-01-05 16:29:47 +01:00
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} else {
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2017-01-05 16:29:48 +01:00
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g_printerr("ivshmem-test tests are only available on x86 or ppc64\n");
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2017-01-05 16:29:47 +01:00
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exit(EXIT_FAILURE);
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}
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s->dev = get_device(s->qs->pcibus);
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2014-04-02 16:57:48 +02:00
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2016-10-24 06:52:06 +02:00
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s->reg_bar = qpci_iomap(s->dev, 0, &barsize);
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2016-03-15 19:34:21 +01:00
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g_assert_cmpuint(barsize, ==, 256);
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2014-04-02 16:57:48 +02:00
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if (msix) {
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qpci_msix_enable(s->dev);
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}
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2016-10-24 06:52:06 +02:00
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s->mem_bar = qpci_iomap(s->dev, 2, &barsize);
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2016-03-15 19:34:21 +01:00
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g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
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2014-04-02 16:57:48 +02:00
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qpci_device_enable(s->dev);
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}
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static void setup_vm(IVState *s)
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{
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2016-03-15 19:34:51 +01:00
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char *cmd = g_strdup_printf("-object memory-backend-file"
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",id=mb1,size=1M,share,mem-path=/dev/shm%s"
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" -device ivshmem-plain,memdev=mb1", tmpshm);
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2014-04-02 16:57:48 +02:00
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setup_vm_cmd(s, cmd, false);
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g_free(cmd);
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}
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static void test_ivshmem_single(void)
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{
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IVState state, *s;
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uint32_t data[1024];
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int i;
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setup_vm(&state);
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s = &state;
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2016-03-15 19:34:22 +01:00
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/* initial state of readable registers */
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g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0);
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g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
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g_assert_cmpuint(in_reg(s, IVPOSITION), ==, 0);
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2014-04-02 16:57:48 +02:00
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2016-03-15 19:34:22 +01:00
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/* trigger interrupt via registers */
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2014-04-02 16:57:48 +02:00
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out_reg(s, INTRMASK, 0xffffffff);
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g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
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out_reg(s, INTRSTATUS, 1);
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2016-03-15 19:34:22 +01:00
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/* check interrupt status */
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2014-04-02 16:57:48 +02:00
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g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
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2016-03-15 19:34:22 +01:00
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/* reading clears */
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g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 0);
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/* TODO intercept actual interrupt (needs qtest work) */
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2014-04-02 16:57:48 +02:00
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2016-03-15 19:34:22 +01:00
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/* invalid register access */
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2014-04-02 16:57:48 +02:00
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out_reg(s, IVPOSITION, 1);
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2016-03-15 19:34:22 +01:00
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in_reg(s, DOORBELL);
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/* ring the (non-functional) doorbell */
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2014-04-02 16:57:48 +02:00
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out_reg(s, DOORBELL, 8 << 16);
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2016-03-15 19:34:22 +01:00
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/* write shared memory */
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2014-04-02 16:57:48 +02:00
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for (i = 0; i < G_N_ELEMENTS(data); i++) {
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data[i] = i;
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}
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2016-10-18 07:18:45 +02:00
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write_mem(s, 0, data, sizeof(data));
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2014-04-02 16:57:48 +02:00
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2016-03-15 19:34:22 +01:00
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/* verify write */
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2014-04-02 16:57:48 +02:00
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for (i = 0; i < G_N_ELEMENTS(data); i++) {
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g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
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}
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2016-03-15 19:34:22 +01:00
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/* read it back and verify read */
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2014-04-02 16:57:48 +02:00
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memset(data, 0, sizeof(data));
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2016-10-18 07:18:45 +02:00
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read_mem(s, 0, data, sizeof(data));
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2014-04-02 16:57:48 +02:00
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for (i = 0; i < G_N_ELEMENTS(data); i++) {
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g_assert_cmpuint(data[i], ==, i);
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}
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2015-12-18 15:13:59 +01:00
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cleanup_vm(s);
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2014-04-02 16:57:48 +02:00
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}
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static void test_ivshmem_pair(void)
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{
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IVState state1, state2, *s1, *s2;
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char *data;
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int i;
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setup_vm(&state1);
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s1 = &state1;
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setup_vm(&state2);
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s2 = &state2;
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data = g_malloc0(TMPSHMSIZE);
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/* host write, guest 1 & 2 read */
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memset(tmpshmem, 0x42, TMPSHMSIZE);
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2016-10-18 07:18:45 +02:00
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read_mem(s1, 0, data, TMPSHMSIZE);
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2014-04-02 16:57:48 +02:00
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for (i = 0; i < TMPSHMSIZE; i++) {
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g_assert_cmpuint(data[i], ==, 0x42);
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}
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2016-10-18 07:18:45 +02:00
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read_mem(s2, 0, data, TMPSHMSIZE);
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2014-04-02 16:57:48 +02:00
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for (i = 0; i < TMPSHMSIZE; i++) {
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g_assert_cmpuint(data[i], ==, 0x42);
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}
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/* guest 1 write, guest 2 read */
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memset(data, 0x43, TMPSHMSIZE);
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2016-10-18 07:18:45 +02:00
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write_mem(s1, 0, data, TMPSHMSIZE);
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2014-04-02 16:57:48 +02:00
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memset(data, 0, TMPSHMSIZE);
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2016-10-18 07:18:45 +02:00
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read_mem(s2, 0, data, TMPSHMSIZE);
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2014-04-02 16:57:48 +02:00
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for (i = 0; i < TMPSHMSIZE; i++) {
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g_assert_cmpuint(data[i], ==, 0x43);
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}
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/* guest 2 write, guest 1 read */
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memset(data, 0x44, TMPSHMSIZE);
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2016-10-18 07:18:45 +02:00
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write_mem(s2, 0, data, TMPSHMSIZE);
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2014-04-02 16:57:48 +02:00
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memset(data, 0, TMPSHMSIZE);
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2016-10-18 07:18:45 +02:00
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read_mem(s1, 0, data, TMPSHMSIZE);
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2014-04-02 16:57:48 +02:00
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for (i = 0; i < TMPSHMSIZE; i++) {
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g_assert_cmpuint(data[i], ==, 0x44);
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}
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2015-12-18 15:13:59 +01:00
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cleanup_vm(s1);
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cleanup_vm(s2);
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2014-04-02 16:57:48 +02:00
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g_free(data);
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}
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typedef struct ServerThread {
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GThread *thread;
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IvshmemServer *server;
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int pipe[2]; /* to handle quit */
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} ServerThread;
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static void *server_thread(void *data)
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{
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ServerThread *t = data;
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IvshmemServer *server = t->server;
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while (true) {
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fd_set fds;
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int maxfd, ret;
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FD_ZERO(&fds);
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FD_SET(t->pipe[0], &fds);
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maxfd = t->pipe[0] + 1;
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ivshmem_server_get_fds(server, &fds, &maxfd);
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ret = select(maxfd, &fds, NULL, NULL, NULL);
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if (ret < 0) {
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if (errno == EINTR) {
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continue;
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}
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g_critical("select error: %s\n", strerror(errno));
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break;
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}
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if (ret == 0) {
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continue;
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}
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if (FD_ISSET(t->pipe[0], &fds)) {
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break;
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}
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if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
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g_critical("ivshmem_server_handle_fds() failed\n");
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break;
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}
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}
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return NULL;
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}
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|
2015-12-18 18:14:29 +01:00
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static void setup_vm_with_server(IVState *s, int nvectors, bool msi)
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2014-04-02 16:57:48 +02:00
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{
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|
|
char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
|
2016-03-15 19:34:51 +01:00
|
|
|
"-device ivshmem%s,chardev=chr0,vectors=%d",
|
|
|
|
tmpserver,
|
|
|
|
msi ? "-doorbell" : ",size=1M,msi=off",
|
|
|
|
nvectors);
|
2014-04-02 16:57:48 +02:00
|
|
|
|
2015-12-18 18:14:29 +01:00
|
|
|
setup_vm_cmd(s, cmd, msi);
|
2014-04-02 16:57:48 +02:00
|
|
|
|
|
|
|
g_free(cmd);
|
|
|
|
}
|
|
|
|
|
2015-12-18 18:14:29 +01:00
|
|
|
static void test_ivshmem_server(bool msi)
|
2014-04-02 16:57:48 +02:00
|
|
|
{
|
|
|
|
IVState state1, state2, *s1, *s2;
|
|
|
|
ServerThread thread;
|
|
|
|
IvshmemServer server;
|
|
|
|
int ret, vm1, vm2;
|
|
|
|
int nvectors = 2;
|
|
|
|
guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
|
|
|
|
|
2016-03-15 19:34:18 +01:00
|
|
|
ret = ivshmem_server_init(&server, tmpserver, tmpshm, true,
|
2014-04-02 16:57:48 +02:00
|
|
|
TMPSHMSIZE, nvectors,
|
|
|
|
g_test_verbose());
|
|
|
|
g_assert_cmpint(ret, ==, 0);
|
|
|
|
|
|
|
|
ret = ivshmem_server_start(&server);
|
|
|
|
g_assert_cmpint(ret, ==, 0);
|
|
|
|
|
|
|
|
thread.server = &server;
|
|
|
|
ret = pipe(thread.pipe);
|
|
|
|
g_assert_cmpint(ret, ==, 0);
|
|
|
|
thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
|
|
|
|
g_assert(thread.thread != NULL);
|
|
|
|
|
ivshmem: Receive shared memory synchronously in realize()
When configured for interrupts (property "chardev" given), we receive
the shared memory from an ivshmem server. We do so asynchronously
after realize() completes, by setting up callbacks with
qemu_chr_add_handlers().
Keeping server I/O out of realize() that way avoids delays due to a
slow server. This is probably relevant only for hot plug.
However, this funny "no shared memory, yet" state of the device also
causes a raft of issues that are hard or impossible to work around:
* The guest is exposed to this state: when we enter and leave it its
shared memory contents is apruptly replaced, and device register
IVPosition changes.
This is a known issue. We document that guests should not access
the shared memory after device initialization until the IVPosition
register becomes non-negative.
For cold plug, the funny state is unlikely to be visible in
practice, because we normally receive the shared memory long before
the guest gets around to mess with the device.
For hot plug, the timing is tighter, but the relative slowness of
PCI device configuration has a good chance to hide the funny state.
In either case, guests complying with the documented procedure are
safe.
* Migration becomes racy.
If migration completes before the shared memory setup completes on
the source, shared memory contents is silently lost. Fortunately,
migration is rather unlikely to win this race.
If the shared memory's ramblock arrives at the destination before
shared memory setup completes, migration fails.
There is no known way for a management application to wait for
shared memory setup to complete.
All you can do is retry failed migration. You can improve your
chances by leaving more time between running the destination QEMU
and the migrate command.
To mitigate silent memory loss, you need to ensure the server
initializes shared memory exactly the same on source and
destination.
These issues are entirely undocumented so far.
I'd expect the server to be almost always fast enough to hide these
issues. But then rare catastrophic races are in a way the worst kind.
This is way more trouble than I'm willing to take from any device.
Kill the funny state by receiving shared memory synchronously in
realize(). If your hot plug hangs, go kill your ivshmem server.
For easier review, this commit only makes the receive synchronous, it
doesn't add the necessary error propagation. Without that, the funny
state persists. The next commit will do that, and kill it off for
real.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <1458066895-20632-26-git-send-email-armbru@redhat.com>
2016-03-15 19:34:40 +01:00
|
|
|
setup_vm_with_server(&state1, nvectors, msi);
|
|
|
|
s1 = &state1;
|
|
|
|
setup_vm_with_server(&state2, nvectors, msi);
|
|
|
|
s2 = &state2;
|
2014-04-02 16:57:48 +02:00
|
|
|
|
|
|
|
/* check got different VM ids */
|
|
|
|
vm1 = in_reg(s1, IVPOSITION);
|
|
|
|
vm2 = in_reg(s2, IVPOSITION);
|
ivshmem: Receive shared memory synchronously in realize()
When configured for interrupts (property "chardev" given), we receive
the shared memory from an ivshmem server. We do so asynchronously
after realize() completes, by setting up callbacks with
qemu_chr_add_handlers().
Keeping server I/O out of realize() that way avoids delays due to a
slow server. This is probably relevant only for hot plug.
However, this funny "no shared memory, yet" state of the device also
causes a raft of issues that are hard or impossible to work around:
* The guest is exposed to this state: when we enter and leave it its
shared memory contents is apruptly replaced, and device register
IVPosition changes.
This is a known issue. We document that guests should not access
the shared memory after device initialization until the IVPosition
register becomes non-negative.
For cold plug, the funny state is unlikely to be visible in
practice, because we normally receive the shared memory long before
the guest gets around to mess with the device.
For hot plug, the timing is tighter, but the relative slowness of
PCI device configuration has a good chance to hide the funny state.
In either case, guests complying with the documented procedure are
safe.
* Migration becomes racy.
If migration completes before the shared memory setup completes on
the source, shared memory contents is silently lost. Fortunately,
migration is rather unlikely to win this race.
If the shared memory's ramblock arrives at the destination before
shared memory setup completes, migration fails.
There is no known way for a management application to wait for
shared memory setup to complete.
All you can do is retry failed migration. You can improve your
chances by leaving more time between running the destination QEMU
and the migrate command.
To mitigate silent memory loss, you need to ensure the server
initializes shared memory exactly the same on source and
destination.
These issues are entirely undocumented so far.
I'd expect the server to be almost always fast enough to hide these
issues. But then rare catastrophic races are in a way the worst kind.
This is way more trouble than I'm willing to take from any device.
Kill the funny state by receiving shared memory synchronously in
realize(). If your hot plug hangs, go kill your ivshmem server.
For easier review, this commit only makes the receive synchronous, it
doesn't add the necessary error propagation. Without that, the funny
state persists. The next commit will do that, and kill it off for
real.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <1458066895-20632-26-git-send-email-armbru@redhat.com>
2016-03-15 19:34:40 +01:00
|
|
|
g_assert_cmpint(vm1, >=, 0);
|
|
|
|
g_assert_cmpint(vm2, >=, 0);
|
|
|
|
g_assert_cmpint(vm1, !=, vm2);
|
2014-04-02 16:57:48 +02:00
|
|
|
|
2016-03-15 19:34:24 +01:00
|
|
|
/* check number of MSI-X vectors */
|
2017-01-05 16:29:47 +01:00
|
|
|
global_qtest = s1->qs->qts;
|
2015-12-18 18:14:29 +01:00
|
|
|
if (msi) {
|
|
|
|
ret = qpci_msix_table_size(s1->dev);
|
|
|
|
g_assert_cmpuint(ret, ==, nvectors);
|
|
|
|
}
|
2014-04-02 16:57:48 +02:00
|
|
|
|
2016-03-15 19:34:24 +01:00
|
|
|
/* TODO test behavior before MSI-X is enabled */
|
|
|
|
|
|
|
|
/* ping vm2 -> vm1 on vector 0 */
|
2015-12-18 18:14:29 +01:00
|
|
|
if (msi) {
|
|
|
|
ret = qpci_msix_pending(s1->dev, 0);
|
|
|
|
g_assert_cmpuint(ret, ==, 0);
|
|
|
|
} else {
|
2016-03-15 19:34:24 +01:00
|
|
|
g_assert_cmpuint(in_reg(s1, INTRSTATUS), ==, 0);
|
2015-12-18 18:14:29 +01:00
|
|
|
}
|
2014-04-02 16:57:48 +02:00
|
|
|
out_reg(s2, DOORBELL, vm1 << 16);
|
|
|
|
do {
|
|
|
|
g_usleep(10000);
|
2015-12-18 18:14:29 +01:00
|
|
|
ret = msi ? qpci_msix_pending(s1->dev, 0) : in_reg(s1, INTRSTATUS);
|
2014-04-02 16:57:48 +02:00
|
|
|
} while (ret == 0 && g_get_monotonic_time() < end_time);
|
|
|
|
g_assert_cmpuint(ret, !=, 0);
|
|
|
|
|
2016-03-15 19:34:24 +01:00
|
|
|
/* ping vm1 -> vm2 on vector 1 */
|
2017-01-05 16:29:47 +01:00
|
|
|
global_qtest = s2->qs->qts;
|
2015-12-18 18:14:29 +01:00
|
|
|
if (msi) {
|
2016-03-15 19:34:24 +01:00
|
|
|
ret = qpci_msix_pending(s2->dev, 1);
|
2015-12-18 18:14:29 +01:00
|
|
|
g_assert_cmpuint(ret, ==, 0);
|
|
|
|
} else {
|
2016-03-15 19:34:24 +01:00
|
|
|
g_assert_cmpuint(in_reg(s2, INTRSTATUS), ==, 0);
|
2015-12-18 18:14:29 +01:00
|
|
|
}
|
2016-03-15 19:34:24 +01:00
|
|
|
out_reg(s1, DOORBELL, vm2 << 16 | 1);
|
2014-04-02 16:57:48 +02:00
|
|
|
do {
|
|
|
|
g_usleep(10000);
|
2016-03-15 19:34:24 +01:00
|
|
|
ret = msi ? qpci_msix_pending(s2->dev, 1) : in_reg(s2, INTRSTATUS);
|
2014-04-02 16:57:48 +02:00
|
|
|
} while (ret == 0 && g_get_monotonic_time() < end_time);
|
|
|
|
g_assert_cmpuint(ret, !=, 0);
|
|
|
|
|
2015-12-18 15:13:59 +01:00
|
|
|
cleanup_vm(s2);
|
|
|
|
cleanup_vm(s1);
|
2014-04-02 16:57:48 +02:00
|
|
|
|
|
|
|
if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
|
|
|
|
g_error("qemu_write_full: %s", g_strerror(errno));
|
|
|
|
}
|
|
|
|
|
|
|
|
g_thread_join(thread.thread);
|
|
|
|
|
|
|
|
ivshmem_server_close(&server);
|
|
|
|
close(thread.pipe[1]);
|
|
|
|
close(thread.pipe[0]);
|
|
|
|
}
|
|
|
|
|
2015-12-18 18:14:29 +01:00
|
|
|
static void test_ivshmem_server_msi(void)
|
|
|
|
{
|
|
|
|
test_ivshmem_server(true);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void test_ivshmem_server_irq(void)
|
|
|
|
{
|
|
|
|
test_ivshmem_server(false);
|
|
|
|
}
|
|
|
|
|
2014-04-02 16:57:48 +02:00
|
|
|
#define PCI_SLOT_HP 0x06
|
|
|
|
|
|
|
|
static void test_ivshmem_hotplug(void)
|
|
|
|
{
|
2017-01-05 16:29:48 +01:00
|
|
|
const char *arch = qtest_get_arch();
|
2014-04-02 16:57:48 +02:00
|
|
|
gchar *opts;
|
|
|
|
|
|
|
|
qtest_start("");
|
|
|
|
|
|
|
|
opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
|
|
|
|
|
|
|
|
qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
|
2017-01-05 16:29:48 +01:00
|
|
|
if (strcmp(arch, "ppc64") != 0) {
|
|
|
|
qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
|
|
|
|
}
|
2014-04-02 16:57:48 +02:00
|
|
|
|
|
|
|
qtest_end();
|
|
|
|
g_free(opts);
|
|
|
|
}
|
|
|
|
|
2015-06-30 00:10:16 +02:00
|
|
|
static void test_ivshmem_memdev(void)
|
|
|
|
{
|
|
|
|
IVState state;
|
|
|
|
|
|
|
|
/* just for the sake of checking memory-backend property */
|
|
|
|
setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
|
2016-03-15 19:34:51 +01:00
|
|
|
" -device ivshmem-plain,memdev=mb1", false);
|
2015-06-30 00:10:16 +02:00
|
|
|
|
2015-12-18 15:13:59 +01:00
|
|
|
cleanup_vm(&state);
|
2015-06-30 00:10:16 +02:00
|
|
|
}
|
|
|
|
|
2014-04-02 16:57:48 +02:00
|
|
|
static void cleanup(void)
|
|
|
|
{
|
|
|
|
if (tmpshmem) {
|
|
|
|
munmap(tmpshmem, TMPSHMSIZE);
|
|
|
|
tmpshmem = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tmpshm) {
|
|
|
|
shm_unlink(tmpshm);
|
|
|
|
g_free(tmpshm);
|
|
|
|
tmpshm = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tmpserver) {
|
|
|
|
g_unlink(tmpserver);
|
|
|
|
g_free(tmpserver);
|
|
|
|
tmpserver = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tmpdir) {
|
|
|
|
g_rmdir(tmpdir);
|
|
|
|
tmpdir = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void abrt_handler(void *data)
|
|
|
|
{
|
|
|
|
cleanup();
|
|
|
|
}
|
|
|
|
|
|
|
|
static gchar *mktempshm(int size, int *fd)
|
|
|
|
{
|
|
|
|
while (true) {
|
|
|
|
gchar *name;
|
|
|
|
|
|
|
|
name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
|
|
|
|
*fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
|
|
|
|
S_IRWXU|S_IRWXG|S_IRWXO);
|
|
|
|
if (*fd > 0) {
|
|
|
|
g_assert(ftruncate(*fd, size) == 0);
|
|
|
|
return name;
|
|
|
|
}
|
|
|
|
|
|
|
|
g_free(name);
|
|
|
|
|
|
|
|
if (errno != EEXIST) {
|
|
|
|
perror("shm_open");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
}
|
2015-10-11 00:18:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
int main(int argc, char **argv)
|
|
|
|
{
|
|
|
|
int ret, fd;
|
2017-01-05 16:29:48 +01:00
|
|
|
const char *arch = qtest_get_arch();
|
2014-04-02 16:57:48 +02:00
|
|
|
gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
|
|
|
|
|
|
|
|
#if !GLIB_CHECK_VERSION(2, 31, 0)
|
|
|
|
if (!g_thread_supported()) {
|
|
|
|
g_thread_init(NULL);
|
|
|
|
}
|
|
|
|
#endif
|
2015-10-11 00:18:32 +02:00
|
|
|
|
|
|
|
g_test_init(&argc, &argv, NULL);
|
|
|
|
|
2014-04-02 16:57:48 +02:00
|
|
|
qtest_add_abrt_handler(abrt_handler, NULL);
|
|
|
|
/* shm */
|
|
|
|
tmpshm = mktempshm(TMPSHMSIZE, &fd);
|
|
|
|
if (!tmpshm) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
|
|
|
|
g_assert(tmpshmem != MAP_FAILED);
|
|
|
|
/* server */
|
|
|
|
if (mkdtemp(dir) == NULL) {
|
|
|
|
g_error("mkdtemp: %s", g_strerror(errno));
|
|
|
|
}
|
|
|
|
tmpdir = dir;
|
|
|
|
tmpserver = g_strconcat(tmpdir, "/server", NULL);
|
2015-10-11 00:18:32 +02:00
|
|
|
|
2014-04-02 16:57:48 +02:00
|
|
|
qtest_add_func("/ivshmem/single", test_ivshmem_single);
|
|
|
|
qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
|
2015-06-30 00:10:16 +02:00
|
|
|
qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
|
2015-11-12 12:10:18 +01:00
|
|
|
if (g_test_slow()) {
|
|
|
|
qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
|
2017-01-05 16:29:48 +01:00
|
|
|
if (strcmp(arch, "ppc64") != 0) {
|
|
|
|
qtest_add_func("/ivshmem/server-msi", test_ivshmem_server_msi);
|
|
|
|
qtest_add_func("/ivshmem/server-irq", test_ivshmem_server_irq);
|
|
|
|
}
|
2015-11-12 12:10:18 +01:00
|
|
|
}
|
2015-10-11 00:18:32 +02:00
|
|
|
|
|
|
|
ret = g_test_run();
|
|
|
|
|
2014-04-02 16:57:48 +02:00
|
|
|
cleanup();
|
2015-10-11 00:18:32 +02:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|