2003-11-13 02:46:15 +01:00
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/*
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* QEMU Soundblaster 16 emulation
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2005-10-30 19:58:22 +01:00
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*
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* Copyright (c) 2003-2005 Vassili Karpov (malc)
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*
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2003-11-13 02:46:15 +01:00
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2016-01-18 18:33:52 +01:00
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#include "qemu/osdep.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/hw.h"
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2017-05-08 22:57:35 +02:00
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#include "hw/audio/soundhw.h"
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2007-11-17 18:14:51 +01:00
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#include "audio/audio.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/isa/isa.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/qdev.h"
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2012-12-17 18:20:00 +01:00
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#include "qemu/timer.h"
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#include "qemu/host-utils.h"
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2018-02-01 18:27:44 +01:00
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#include "qemu/log.h"
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#include "qapi/error.h"
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2003-11-13 02:46:15 +01:00
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2004-11-10 00:09:44 +01:00
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#define dolog(...) AUD_log ("sb16", __VA_ARGS__)
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2004-11-14 17:02:09 +01:00
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/* #define DEBUG */
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/* #define DEBUG_SB16_MOST */
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2004-11-10 00:09:44 +01:00
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#ifdef DEBUG
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#define ldebug(...) dolog (__VA_ARGS__)
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#else
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#define ldebug(...)
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#endif
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2004-11-07 19:04:02 +01:00
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static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
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2004-06-07 22:58:31 +02:00
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2013-04-27 22:18:49 +02:00
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#define TYPE_SB16 "sb16"
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#define SB16(obj) OBJECT_CHECK (SB16State, (obj), TYPE_SB16)
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2004-03-23 23:42:11 +01:00
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typedef struct SB16State {
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2013-04-27 22:18:49 +02:00
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ISADevice parent_obj;
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2005-11-05 19:55:28 +01:00
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QEMUSoundCard card;
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2009-08-14 11:36:15 +02:00
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qemu_irq pic;
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2009-09-10 11:43:30 +02:00
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uint32_t irq;
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uint32_t dma;
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uint32_t hdma;
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uint32_t port;
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uint32_t ver;
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2016-02-03 17:28:58 +01:00
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IsaDma *isa_dma;
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IsaDma *isa_hdma;
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2004-11-07 19:04:02 +01:00
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2003-11-13 02:46:15 +01:00
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int in_index;
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int out_data_len;
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int fmt_stereo;
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int fmt_signed;
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int fmt_bits;
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2004-11-07 19:04:02 +01:00
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audfmt_e fmt;
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2003-11-13 02:46:15 +01:00
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int dma_auto;
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2004-11-07 19:04:02 +01:00
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int block_size;
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2003-11-13 02:46:15 +01:00
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int fifo;
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int freq;
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int time_const;
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int speaker;
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int needed_bytes;
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int cmd;
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int use_hdma;
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2004-11-07 19:04:02 +01:00
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int highspeed;
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int can_write;
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2003-11-13 02:46:15 +01:00
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int v2x6;
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2004-11-07 19:04:02 +01:00
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uint8_t csp_param;
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uint8_t csp_value;
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uint8_t csp_mode;
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uint8_t csp_regs[256];
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uint8_t csp_index;
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uint8_t csp_reg83[4];
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int csp_reg83r;
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int csp_reg83w;
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2004-10-09 19:20:54 +02:00
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uint8_t in2_data[10];
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2004-11-07 19:04:02 +01:00
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uint8_t out_data[50];
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uint8_t test_reg;
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uint8_t last_read_byte;
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int nzero;
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2003-11-13 02:46:15 +01:00
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int left_till_irq;
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2004-11-07 19:04:02 +01:00
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int dma_running;
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int bytes_per_second;
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int align;
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2005-10-30 19:58:22 +01:00
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int audio_free;
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SWVoiceOut *voice;
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2004-11-07 19:04:02 +01:00
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2005-10-30 19:58:22 +01:00
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QEMUTimer *aux_ts;
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2004-03-23 23:42:11 +01:00
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/* mixer state */
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int mixer_nreg;
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2004-04-17 00:09:02 +02:00
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uint8_t mixer_regs[256];
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2016-07-13 02:11:59 +02:00
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PortioList portio_list;
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2004-03-23 23:42:11 +01:00
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} SB16State;
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2003-11-13 02:46:15 +01:00
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2005-10-30 19:58:22 +01:00
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static void SB_audio_callback (void *opaque, int free);
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2004-11-07 19:04:02 +01:00
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static int magic_of_irq (int irq)
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{
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switch (irq) {
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case 5:
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return 2;
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case 7:
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return 4;
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case 9:
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return 1;
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case 10:
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return 8;
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default:
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2018-02-01 18:27:44 +01:00
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qemu_log_mask(LOG_GUEST_ERROR, "bad irq %d\n", irq);
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2004-11-07 19:04:02 +01:00
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return 2;
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}
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}
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static int irq_of_magic (int magic)
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{
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switch (magic) {
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case 1:
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return 9;
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case 2:
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return 5;
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case 4:
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return 7;
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case 8:
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return 10;
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default:
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2018-02-01 18:27:44 +01:00
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qemu_log_mask(LOG_GUEST_ERROR, "bad irq magic %d\n", magic);
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2004-11-07 19:04:02 +01:00
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return -1;
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}
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}
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#if 0
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2004-03-23 23:42:11 +01:00
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static void log_dsp (SB16State *dsp)
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{
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2004-11-07 19:04:02 +01:00
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ldebug ("%s:%s:%d:%s:dmasize=%d:freq=%d:const=%d:speaker=%d\n",
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dsp->fmt_stereo ? "Stereo" : "Mono",
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dsp->fmt_signed ? "Signed" : "Unsigned",
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dsp->fmt_bits,
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dsp->dma_auto ? "Auto" : "Single",
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dsp->block_size,
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dsp->freq,
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dsp->time_const,
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dsp->speaker);
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}
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#endif
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static void speaker (SB16State *s, int on)
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{
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s->speaker = on;
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/* AUD_enable (s->voice, on); */
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2003-11-13 02:46:15 +01:00
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}
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2004-11-07 19:04:02 +01:00
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static void control (SB16State *s, int hold)
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2003-11-13 02:46:15 +01:00
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{
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2004-11-07 19:04:02 +01:00
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int dma = s->use_hdma ? s->hdma : s->dma;
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2016-02-03 17:28:58 +01:00
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IsaDma *isa_dma = s->use_hdma ? s->isa_hdma : s->isa_dma;
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IsaDmaClass *k = ISADMA_GET_CLASS(isa_dma);
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2004-11-07 19:04:02 +01:00
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s->dma_running = hold;
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ldebug ("hold %d high %d dma %d\n", hold, s->use_hdma, dma);
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2003-11-13 02:46:15 +01:00
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if (hold) {
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2016-02-03 17:28:58 +01:00
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k->hold_DREQ(isa_dma, dma);
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2005-10-30 19:58:22 +01:00
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AUD_set_active_out (s->voice, 1);
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2003-11-13 02:46:15 +01:00
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}
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else {
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2016-02-03 17:28:58 +01:00
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k->release_DREQ(isa_dma, dma);
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2005-10-30 19:58:22 +01:00
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AUD_set_active_out (s->voice, 0);
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2003-11-13 02:46:15 +01:00
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}
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}
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2004-11-07 19:04:02 +01:00
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static void aux_timer (void *opaque)
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2003-11-13 02:46:15 +01:00
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{
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2004-11-07 19:04:02 +01:00
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SB16State *s = opaque;
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s->can_write = 1;
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2009-08-14 11:36:15 +02:00
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qemu_irq_raise (s->pic);
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2004-11-07 19:04:02 +01:00
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}
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#define DMA8_AUTO 1
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#define DMA8_HIGH 2
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2006-07-04 18:49:00 +02:00
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static void continue_dma8 (SB16State *s)
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{
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if (s->freq > 0) {
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2008-12-03 23:48:44 +01:00
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struct audsettings as;
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2006-07-04 18:49:00 +02:00
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s->audio_free = 0;
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as.freq = s->freq;
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as.nchannels = 1 << s->fmt_stereo;
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as.fmt = s->fmt;
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2006-07-04 23:47:22 +02:00
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as.endianness = 0;
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2006-07-04 18:49:00 +02:00
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s->voice = AUD_open_out (
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&s->card,
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s->voice,
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"sb16",
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s,
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SB_audio_callback,
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2006-07-04 23:47:22 +02:00
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&as
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2006-07-04 18:49:00 +02:00
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);
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}
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control (s, 1);
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}
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2004-11-07 19:04:02 +01:00
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static void dma_cmd8 (SB16State *s, int mask, int dma_len)
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{
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s->fmt = AUD_FMT_U8;
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s->use_hdma = 0;
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s->fmt_bits = 8;
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s->fmt_signed = 0;
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s->fmt_stereo = (s->mixer_regs[0x0e] & 2) != 0;
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if (-1 == s->time_const) {
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2006-07-04 18:49:00 +02:00
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if (s->freq <= 0)
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s->freq = 11025;
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2004-11-07 19:04:02 +01:00
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}
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else {
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int tmp = (256 - s->time_const);
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s->freq = (1000000 + (tmp / 2)) / tmp;
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}
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2005-10-30 19:58:22 +01:00
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if (dma_len != -1) {
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2004-11-14 17:02:09 +01:00
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s->block_size = dma_len << s->fmt_stereo;
|
2005-10-30 19:58:22 +01:00
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}
|
2004-11-14 17:02:09 +01:00
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else {
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/* This is apparently the only way to make both Act1/PL
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and SecondReality/FC work
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Act1 sets block size via command 0x48 and it's an odd number
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SR does the same with even number
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Both use stereo, and Creatives own documentation states that
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0x48 sets block size in bytes less one.. go figure */
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s->block_size &= ~s->fmt_stereo;
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}
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2004-11-07 19:04:02 +01:00
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s->freq >>= s->fmt_stereo;
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s->left_till_irq = s->block_size;
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s->bytes_per_second = (s->freq << s->fmt_stereo);
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/* s->highspeed = (mask & DMA8_HIGH) != 0; */
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s->dma_auto = (mask & DMA8_AUTO) != 0;
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s->align = (1 << s->fmt_stereo) - 1;
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|
2005-10-30 19:58:22 +01:00
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if (s->block_size & s->align) {
|
2018-02-01 18:27:44 +01:00
|
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qemu_log_mask(LOG_GUEST_ERROR, "warning: misaligned block size %d,"
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|
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" alignment %d\n", s->block_size, s->align + 1);
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2005-10-30 19:58:22 +01:00
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}
|
2004-11-14 17:02:09 +01:00
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2004-11-07 19:04:02 +01:00
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ldebug ("freq %d, stereo %d, sign %d, bits %d, "
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"dma %d, auto %d, fifo %d, high %d\n",
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s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
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s->block_size, s->dma_auto, s->fifo, s->highspeed);
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|
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|
2006-07-04 18:49:00 +02:00
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continue_dma8 (s);
|
2004-11-07 19:04:02 +01:00
|
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speaker (s, 1);
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|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
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static void dma_cmd (SB16State *s, uint8_t cmd, uint8_t d0, int dma_len)
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|
|
|
{
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|
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|
s->use_hdma = cmd < 0xc0;
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|
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s->fifo = (cmd >> 1) & 1;
|
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|
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s->dma_auto = (cmd >> 2) & 1;
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s->fmt_signed = (d0 >> 4) & 1;
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s->fmt_stereo = (d0 >> 5) & 1;
|
2003-11-13 02:46:15 +01:00
|
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|
|
|
|
|
switch (cmd >> 4) {
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|
|
|
case 11:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->fmt_bits = 16;
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
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|
case 12:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->fmt_bits = 8;
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
if (-1 != s->time_const) {
|
|
|
|
#if 1
|
|
|
|
int tmp = 256 - s->time_const;
|
|
|
|
s->freq = (1000000 + (tmp / 2)) / tmp;
|
|
|
|
#else
|
|
|
|
/* s->freq = 1000000 / ((255 - s->time_const) << s->fmt_stereo); */
|
|
|
|
s->freq = 1000000 / ((255 - s->time_const));
|
|
|
|
#endif
|
|
|
|
s->time_const = -1;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
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|
2004-11-07 19:04:02 +01:00
|
|
|
s->block_size = dma_len + 1;
|
|
|
|
s->block_size <<= (s->fmt_bits == 16);
|
2004-11-14 17:02:09 +01:00
|
|
|
if (!s->dma_auto) {
|
|
|
|
/* It is clear that for DOOM and auto-init this value
|
|
|
|
shouldn't take stereo into account, while Miles Sound Systems
|
|
|
|
setsound.exe with single transfer mode wouldn't work without it
|
|
|
|
wonders of SB16 yet again */
|
2004-11-07 19:04:02 +01:00
|
|
|
s->block_size <<= s->fmt_stereo;
|
2004-11-14 17:02:09 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("freq %d, stereo %d, sign %d, bits %d, "
|
|
|
|
"dma %d, auto %d, fifo %d, high %d\n",
|
|
|
|
s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
|
|
|
|
s->block_size, s->dma_auto, s->fifo, s->highspeed);
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
if (16 == s->fmt_bits) {
|
|
|
|
if (s->fmt_signed) {
|
|
|
|
s->fmt = AUD_FMT_S16;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
else {
|
2004-11-07 19:04:02 +01:00
|
|
|
s->fmt = AUD_FMT_U16;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
else {
|
2004-11-07 19:04:02 +01:00
|
|
|
if (s->fmt_signed) {
|
|
|
|
s->fmt = AUD_FMT_S8;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
else {
|
2004-11-07 19:04:02 +01:00
|
|
|
s->fmt = AUD_FMT_U8;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
s->left_till_irq = s->block_size;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
s->bytes_per_second = (s->freq << s->fmt_stereo) << (s->fmt_bits == 16);
|
|
|
|
s->highspeed = 0;
|
|
|
|
s->align = (1 << (s->fmt_stereo + (s->fmt_bits == 16))) - 1;
|
2005-10-30 19:58:22 +01:00
|
|
|
if (s->block_size & s->align) {
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "warning: misaligned block size %d,"
|
|
|
|
" alignment %d\n", s->block_size, s->align + 1);
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
if (s->freq) {
|
2008-12-03 23:48:44 +01:00
|
|
|
struct audsettings as;
|
2005-11-05 19:55:28 +01:00
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
s->audio_free = 0;
|
2005-11-05 19:55:28 +01:00
|
|
|
|
|
|
|
as.freq = s->freq;
|
|
|
|
as.nchannels = 1 << s->fmt_stereo;
|
|
|
|
as.fmt = s->fmt;
|
2006-07-04 23:47:22 +02:00
|
|
|
as.endianness = 0;
|
2005-11-05 19:55:28 +01:00
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
s->voice = AUD_open_out (
|
2005-11-05 19:55:28 +01:00
|
|
|
&s->card,
|
2005-10-30 19:58:22 +01:00
|
|
|
s->voice,
|
|
|
|
"sb16",
|
|
|
|
s,
|
|
|
|
SB_audio_callback,
|
2006-07-04 23:47:22 +02:00
|
|
|
&as
|
2005-10-30 19:58:22 +01:00
|
|
|
);
|
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
control (s, 1);
|
|
|
|
speaker (s, 1);
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
static inline void dsp_out_data (SB16State *s, uint8_t val)
|
2004-04-17 00:09:02 +02:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("outdata %#x\n", val);
|
2005-11-05 19:55:28 +01:00
|
|
|
if ((size_t) s->out_data_len < sizeof (s->out_data)) {
|
2004-11-07 19:04:02 +01:00
|
|
|
s->out_data[s->out_data_len++] = val;
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2004-04-17 00:09:02 +02:00
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
static inline uint8_t dsp_get_data (SB16State *s)
|
2004-10-09 19:20:54 +02:00
|
|
|
{
|
2005-10-30 19:58:22 +01:00
|
|
|
if (s->in_index) {
|
2004-11-07 19:04:02 +01:00
|
|
|
return s->in2_data[--s->in_index];
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
else {
|
|
|
|
dolog ("buffer underflow\n");
|
2004-10-09 19:20:54 +02:00
|
|
|
return 0;
|
2004-11-07 19:04:02 +01:00
|
|
|
}
|
2004-10-09 19:20:54 +02:00
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
static void command (SB16State *s, uint8_t cmd)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("command %#x\n", cmd);
|
2003-11-13 02:46:15 +01:00
|
|
|
|
|
|
|
if (cmd > 0xaf && cmd < 0xd0) {
|
2004-11-07 19:04:02 +01:00
|
|
|
if (cmd & 8) {
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "ADC not yet supported (command %#x)\n",
|
|
|
|
cmd);
|
2004-11-07 19:04:02 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
|
|
|
|
switch (cmd >> 4) {
|
|
|
|
case 11:
|
|
|
|
case 12:
|
|
|
|
break;
|
|
|
|
default:
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "%#x wrong bits\n", cmd);
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 3;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
else {
|
2005-10-30 19:58:22 +01:00
|
|
|
s->needed_bytes = 0;
|
|
|
|
|
2003-11-13 02:46:15 +01:00
|
|
|
switch (cmd) {
|
2004-10-09 19:20:54 +02:00
|
|
|
case 0x03:
|
2004-11-07 19:04:02 +01:00
|
|
|
dsp_out_data (s, 0x10); /* s->csp_param); */
|
|
|
|
goto warn;
|
|
|
|
|
2004-06-07 22:58:31 +02:00
|
|
|
case 0x04:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 1;
|
|
|
|
goto warn;
|
2004-06-07 22:58:31 +02:00
|
|
|
|
|
|
|
case 0x05:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 2;
|
|
|
|
goto warn;
|
|
|
|
|
|
|
|
case 0x08:
|
|
|
|
/* __asm__ ("int3"); */
|
|
|
|
goto warn;
|
2004-10-09 19:20:54 +02:00
|
|
|
|
2004-06-07 22:58:31 +02:00
|
|
|
case 0x0e:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 2;
|
|
|
|
goto warn;
|
|
|
|
|
|
|
|
case 0x09:
|
|
|
|
dsp_out_data (s, 0xf8);
|
|
|
|
goto warn;
|
2004-06-07 22:58:31 +02:00
|
|
|
|
|
|
|
case 0x0f:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 1;
|
|
|
|
goto warn;
|
2004-06-07 22:58:31 +02:00
|
|
|
|
2003-11-13 02:46:15 +01:00
|
|
|
case 0x10:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 1;
|
|
|
|
goto warn;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
|
|
|
case 0x14:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 2;
|
|
|
|
s->block_size = 0;
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-14 17:02:09 +01:00
|
|
|
case 0x1c: /* Auto-Initialize DMA DAC, 8-bit */
|
2006-07-04 18:49:00 +02:00
|
|
|
dma_cmd8 (s, DMA8_AUTO, -1);
|
2004-11-14 17:02:09 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x20: /* Direct ADC, Juice/PL */
|
|
|
|
dsp_out_data (s, 0xff);
|
|
|
|
goto warn;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
|
|
|
case 0x35:
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "0x35 - MIDI command not implemented\n");
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x40:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->freq = -1;
|
|
|
|
s->time_const = -1;
|
|
|
|
s->needed_bytes = 1;
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x41:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->freq = -1;
|
|
|
|
s->time_const = -1;
|
|
|
|
s->needed_bytes = 2;
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x42:
|
|
|
|
s->freq = -1;
|
|
|
|
s->time_const = -1;
|
|
|
|
s->needed_bytes = 2;
|
|
|
|
goto warn;
|
|
|
|
|
2004-10-09 19:20:54 +02:00
|
|
|
case 0x45:
|
2004-11-07 19:04:02 +01:00
|
|
|
dsp_out_data (s, 0xaa);
|
|
|
|
goto warn;
|
|
|
|
|
2003-11-13 02:46:15 +01:00
|
|
|
case 0x47: /* Continue Auto-Initialize DMA 16bit */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x48:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 2;
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
case 0x74:
|
|
|
|
s->needed_bytes = 2; /* DMA DAC, 4-bit ADPCM */
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "0x75 - DMA DAC, 4-bit ADPCM not"
|
|
|
|
" implemented\n");
|
2005-10-30 19:58:22 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x75: /* DMA DAC, 4-bit ADPCM Reference */
|
|
|
|
s->needed_bytes = 2;
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "0x74 - DMA DAC, 4-bit ADPCM Reference not"
|
|
|
|
" implemented\n");
|
2005-10-30 19:58:22 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x76: /* DMA DAC, 2.6-bit ADPCM */
|
|
|
|
s->needed_bytes = 2;
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "0x74 - DMA DAC, 2.6-bit ADPCM not"
|
|
|
|
" implemented\n");
|
2005-10-30 19:58:22 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x77: /* DMA DAC, 2.6-bit ADPCM Reference */
|
|
|
|
s->needed_bytes = 2;
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "0x74 - DMA DAC, 2.6-bit ADPCM Reference"
|
|
|
|
" not implemented\n");
|
2005-10-30 19:58:22 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x7d:
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "0x7d - Autio-Initialize DMA DAC, 4-bit"
|
|
|
|
" ADPCM Reference\n");
|
|
|
|
qemu_log_mask(LOG_UNIMP, "not implemented\n");
|
2005-10-30 19:58:22 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x7f:
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "0x7d - Autio-Initialize DMA DAC, 2.6-bit"
|
|
|
|
" ADPCM Reference\n");
|
|
|
|
qemu_log_mask(LOG_UNIMP, "not implemented\n");
|
2005-10-30 19:58:22 +01:00
|
|
|
break;
|
|
|
|
|
2003-11-13 02:46:15 +01:00
|
|
|
case 0x80:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 2;
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x90:
|
|
|
|
case 0x91:
|
2004-11-07 19:04:02 +01:00
|
|
|
dma_cmd8 (s, ((cmd & 1) == 0) | DMA8_HIGH, -1);
|
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xd0: /* halt DMA operation. 8bit */
|
|
|
|
control (s, 0);
|
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xd1: /* speaker on */
|
|
|
|
speaker (s, 1);
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xd3: /* speaker off */
|
|
|
|
speaker (s, 0);
|
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xd4: /* continue DMA operation. 8bit */
|
2006-07-04 18:49:00 +02:00
|
|
|
/* KQ6 (or maybe Sierras audblst.drv in general) resets
|
|
|
|
the frequency between halt/continue */
|
|
|
|
continue_dma8 (s);
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xd5: /* halt DMA operation. 16bit */
|
|
|
|
control (s, 0);
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xd6: /* continue DMA operation. 16bit */
|
|
|
|
control (s, 1);
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xd9: /* exit auto-init DMA after this block. 16bit */
|
|
|
|
s->dma_auto = 0;
|
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xda: /* exit auto-init DMA after this block. 8bit */
|
|
|
|
s->dma_auto = 0;
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
case 0xe0: /* DSP identification */
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 1;
|
2005-10-30 19:58:22 +01:00
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
|
|
|
case 0xe1:
|
2004-11-07 19:04:02 +01:00
|
|
|
dsp_out_data (s, s->ver & 0xff);
|
|
|
|
dsp_out_data (s, s->ver >> 8);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xe2:
|
|
|
|
s->needed_bytes = 1;
|
|
|
|
goto warn;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-06-07 22:58:31 +02:00
|
|
|
case 0xe3:
|
|
|
|
{
|
|
|
|
int i;
|
2004-11-07 19:04:02 +01:00
|
|
|
for (i = sizeof (e3) - 1; i >= 0; --i)
|
|
|
|
dsp_out_data (s, e3[i]);
|
2004-06-07 22:58:31 +02:00
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
break;
|
2004-06-07 22:58:31 +02:00
|
|
|
|
2004-10-09 19:20:54 +02:00
|
|
|
case 0xe4: /* write test reg */
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 1;
|
2004-10-09 19:20:54 +02:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xe7:
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "Attempt to probe for ESS (0xe7)?\n");
|
2005-10-30 19:58:22 +01:00
|
|
|
break;
|
2004-11-07 19:04:02 +01:00
|
|
|
|
2004-10-09 19:20:54 +02:00
|
|
|
case 0xe8: /* read test reg */
|
2004-11-07 19:04:02 +01:00
|
|
|
dsp_out_data (s, s->test_reg);
|
2004-10-09 19:20:54 +02:00
|
|
|
break;
|
|
|
|
|
2003-11-13 02:46:15 +01:00
|
|
|
case 0xf2:
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xf3:
|
|
|
|
dsp_out_data (s, 0xaa);
|
|
|
|
s->mixer_regs[0x82] |= (cmd == 0xf2) ? 1 : 2;
|
2009-08-14 11:36:15 +02:00
|
|
|
qemu_irq_raise (s->pic);
|
2004-11-07 19:04:02 +01:00
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-10-09 19:20:54 +02:00
|
|
|
case 0xf9:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->needed_bytes = 1;
|
|
|
|
goto warn;
|
2004-10-09 19:20:54 +02:00
|
|
|
|
|
|
|
case 0xfa:
|
2004-11-07 19:04:02 +01:00
|
|
|
dsp_out_data (s, 0);
|
|
|
|
goto warn;
|
2004-10-09 19:20:54 +02:00
|
|
|
|
|
|
|
case 0xfc: /* FIXME */
|
2004-11-07 19:04:02 +01:00
|
|
|
dsp_out_data (s, 0);
|
|
|
|
goto warn;
|
2004-10-09 19:20:54 +02:00
|
|
|
|
2003-11-13 02:46:15 +01:00
|
|
|
default:
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "Unrecognized command %#x\n", cmd);
|
2005-10-30 19:58:22 +01:00
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
if (!s->needed_bytes) {
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("\n");
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
exit:
|
|
|
|
if (!s->needed_bytes) {
|
|
|
|
s->cmd = -1;
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
s->cmd = cmd;
|
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
return;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
warn:
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "warning: command %#x,%d is not truly understood"
|
|
|
|
" yet\n", cmd, s->needed_bytes);
|
2005-10-30 19:58:22 +01:00
|
|
|
goto exit;
|
|
|
|
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
static uint16_t dsp_get_lohi (SB16State *s)
|
|
|
|
{
|
|
|
|
uint8_t hi = dsp_get_data (s);
|
|
|
|
uint8_t lo = dsp_get_data (s);
|
|
|
|
return (hi << 8) | lo;
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint16_t dsp_get_hilo (SB16State *s)
|
|
|
|
{
|
|
|
|
uint8_t lo = dsp_get_data (s);
|
|
|
|
uint8_t hi = dsp_get_data (s);
|
|
|
|
return (hi << 8) | lo;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void complete (SB16State *s)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2004-10-09 19:20:54 +02:00
|
|
|
int d0, d1, d2;
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("complete command %#x, in_index %d, needed_bytes %d\n",
|
|
|
|
s->cmd, s->in_index, s->needed_bytes);
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
if (s->cmd > 0xaf && s->cmd < 0xd0) {
|
|
|
|
d2 = dsp_get_data (s);
|
|
|
|
d1 = dsp_get_data (s);
|
|
|
|
d0 = dsp_get_data (s);
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
if (s->cmd & 8) {
|
|
|
|
dolog ("ADC params cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
|
|
|
|
s->cmd, d0, d1, d2);
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
ldebug ("cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
|
|
|
|
s->cmd, d0, d1, d2);
|
|
|
|
dma_cmd (s, s->cmd, d0, d1 + (d2 << 8));
|
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
else {
|
2004-11-07 19:04:02 +01:00
|
|
|
switch (s->cmd) {
|
2004-06-07 22:58:31 +02:00
|
|
|
case 0x04:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->csp_mode = dsp_get_data (s);
|
|
|
|
s->csp_reg83r = 0;
|
|
|
|
s->csp_reg83w = 0;
|
|
|
|
ldebug ("CSP command 0x04: mode=%#x\n", s->csp_mode);
|
2004-10-09 19:20:54 +02:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x05:
|
|
|
|
s->csp_param = dsp_get_data (s);
|
|
|
|
s->csp_value = dsp_get_data (s);
|
|
|
|
ldebug ("CSP command 0x05: param=%#x value=%#x\n",
|
|
|
|
s->csp_param,
|
|
|
|
s->csp_value);
|
2004-06-07 22:58:31 +02:00
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-10-09 19:20:54 +02:00
|
|
|
case 0x0e:
|
2004-11-07 19:04:02 +01:00
|
|
|
d0 = dsp_get_data (s);
|
|
|
|
d1 = dsp_get_data (s);
|
|
|
|
ldebug ("write CSP register %d <- %#x\n", d1, d0);
|
|
|
|
if (d1 == 0x83) {
|
|
|
|
ldebug ("0x83[%d] <- %#x\n", s->csp_reg83r, d0);
|
|
|
|
s->csp_reg83[s->csp_reg83r % 4] = d0;
|
|
|
|
s->csp_reg83r += 1;
|
|
|
|
}
|
2005-10-30 19:58:22 +01:00
|
|
|
else {
|
2004-11-07 19:04:02 +01:00
|
|
|
s->csp_regs[d1] = d0;
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x0f:
|
|
|
|
d0 = dsp_get_data (s);
|
|
|
|
ldebug ("read CSP register %#x -> %#x, mode=%#x\n",
|
|
|
|
d0, s->csp_regs[d0], s->csp_mode);
|
|
|
|
if (d0 == 0x83) {
|
|
|
|
ldebug ("0x83[%d] -> %#x\n",
|
|
|
|
s->csp_reg83w,
|
|
|
|
s->csp_reg83[s->csp_reg83w % 4]);
|
|
|
|
dsp_out_data (s, s->csp_reg83[s->csp_reg83w % 4]);
|
|
|
|
s->csp_reg83w += 1;
|
|
|
|
}
|
2005-10-30 19:58:22 +01:00
|
|
|
else {
|
2004-11-07 19:04:02 +01:00
|
|
|
dsp_out_data (s, s->csp_regs[d0]);
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x10:
|
|
|
|
d0 = dsp_get_data (s);
|
|
|
|
dolog ("cmd 0x10 d0=%#x\n", d0);
|
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x14:
|
2004-11-14 17:02:09 +01:00
|
|
|
dma_cmd8 (s, 0, dsp_get_lohi (s) + 1);
|
2004-11-07 19:04:02 +01:00
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
|
|
|
case 0x40:
|
2004-11-07 19:04:02 +01:00
|
|
|
s->time_const = dsp_get_data (s);
|
|
|
|
ldebug ("set time const %d\n", s->time_const);
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x42: /* FT2 sets output freq with this, go figure */
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "cmd 0x42 might not do what it think it"
|
|
|
|
" should\n");
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x41:
|
|
|
|
s->freq = dsp_get_hilo (s);
|
|
|
|
ldebug ("set freq %d\n", s->freq);
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x48:
|
2004-11-14 17:02:09 +01:00
|
|
|
s->block_size = dsp_get_lohi (s) + 1;
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("set dma block len %d\n", s->block_size);
|
|
|
|
break;
|
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
case 0x74:
|
|
|
|
case 0x75:
|
|
|
|
case 0x76:
|
|
|
|
case 0x77:
|
|
|
|
/* ADPCM stuff, ignore */
|
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x80:
|
|
|
|
{
|
2004-11-14 17:02:09 +01:00
|
|
|
int freq, samples, bytes;
|
2004-11-07 19:04:02 +01:00
|
|
|
int64_t ticks;
|
|
|
|
|
2004-11-14 17:02:09 +01:00
|
|
|
freq = s->freq > 0 ? s->freq : 11025;
|
|
|
|
samples = dsp_get_lohi (s) + 1;
|
2004-11-07 19:04:02 +01:00
|
|
|
bytes = samples << s->fmt_stereo << (s->fmt_bits == 16);
|
2016-03-21 17:02:30 +01:00
|
|
|
ticks = muldiv64(bytes, NANOSECONDS_PER_SECOND, freq);
|
|
|
|
if (ticks < NANOSECONDS_PER_SECOND / 1024) {
|
2009-08-14 11:36:15 +02:00
|
|
|
qemu_irq_raise (s->pic);
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
if (s->aux_ts) {
|
2013-08-21 17:03:08 +02:00
|
|
|
timer_mod (
|
2005-10-30 19:58:22 +01:00
|
|
|
s->aux_ts,
|
2013-08-21 17:03:08 +02:00
|
|
|
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + ticks
|
2005-10-30 19:58:22 +01:00
|
|
|
);
|
|
|
|
}
|
|
|
|
}
|
2006-06-25 20:15:32 +02:00
|
|
|
ldebug ("mix silence %d %d %" PRId64 "\n", samples, bytes, ticks);
|
2004-11-07 19:04:02 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xe0:
|
2004-11-07 19:04:02 +01:00
|
|
|
d0 = dsp_get_data (s);
|
|
|
|
s->out_data_len = 0;
|
|
|
|
ldebug ("E0 data = %#x\n", d0);
|
2005-10-30 19:58:22 +01:00
|
|
|
dsp_out_data (s, ~d0);
|
2004-10-09 19:20:54 +02:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xe2:
|
2010-01-12 19:55:45 +01:00
|
|
|
#ifdef DEBUG
|
2004-11-07 19:04:02 +01:00
|
|
|
d0 = dsp_get_data (s);
|
2010-01-12 19:55:45 +01:00
|
|
|
dolog ("E2 = %#x\n", d0);
|
|
|
|
#endif
|
2004-10-09 19:20:54 +02:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0xe4:
|
|
|
|
s->test_reg = dsp_get_data (s);
|
|
|
|
break;
|
2004-10-09 19:20:54 +02:00
|
|
|
|
|
|
|
case 0xf9:
|
2004-11-07 19:04:02 +01:00
|
|
|
d0 = dsp_get_data (s);
|
|
|
|
ldebug ("command 0xf9 with %#x\n", d0);
|
2004-10-09 19:20:54 +02:00
|
|
|
switch (d0) {
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x0e:
|
|
|
|
dsp_out_data (s, 0xff);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x0f:
|
|
|
|
dsp_out_data (s, 0x07);
|
|
|
|
break;
|
|
|
|
|
2004-10-09 19:20:54 +02:00
|
|
|
case 0x37:
|
2004-11-07 19:04:02 +01:00
|
|
|
dsp_out_data (s, 0x38);
|
|
|
|
break;
|
|
|
|
|
2004-10-09 19:20:54 +02:00
|
|
|
default:
|
2004-11-07 19:04:02 +01:00
|
|
|
dsp_out_data (s, 0x00);
|
|
|
|
break;
|
2004-10-09 19:20:54 +02:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_UNIMP, "complete: unrecognized command %#x\n",
|
|
|
|
s->cmd);
|
2004-03-23 23:42:11 +01:00
|
|
|
return;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("\n");
|
|
|
|
s->cmd = -1;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2006-07-04 18:49:00 +02:00
|
|
|
static void legacy_reset (SB16State *s)
|
|
|
|
{
|
2008-12-03 23:48:44 +01:00
|
|
|
struct audsettings as;
|
2006-07-04 18:49:00 +02:00
|
|
|
|
|
|
|
s->freq = 11025;
|
|
|
|
s->fmt_signed = 0;
|
|
|
|
s->fmt_bits = 8;
|
|
|
|
s->fmt_stereo = 0;
|
|
|
|
|
|
|
|
as.freq = s->freq;
|
|
|
|
as.nchannels = 1;
|
|
|
|
as.fmt = AUD_FMT_U8;
|
2006-07-04 23:47:22 +02:00
|
|
|
as.endianness = 0;
|
2006-07-04 18:49:00 +02:00
|
|
|
|
|
|
|
s->voice = AUD_open_out (
|
|
|
|
&s->card,
|
|
|
|
s->voice,
|
|
|
|
"sb16",
|
|
|
|
s,
|
|
|
|
SB_audio_callback,
|
2006-07-04 23:47:22 +02:00
|
|
|
&as
|
2006-07-04 18:49:00 +02:00
|
|
|
);
|
|
|
|
|
|
|
|
/* Not sure about that... */
|
|
|
|
/* AUD_set_active_out (s->voice, 1); */
|
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
static void reset (SB16State *s)
|
|
|
|
{
|
2009-08-14 11:36:15 +02:00
|
|
|
qemu_irq_lower (s->pic);
|
2004-11-07 19:04:02 +01:00
|
|
|
if (s->dma_auto) {
|
2009-08-14 11:36:15 +02:00
|
|
|
qemu_irq_raise (s->pic);
|
|
|
|
qemu_irq_lower (s->pic);
|
2004-11-07 19:04:02 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
s->mixer_regs[0x82] = 0;
|
|
|
|
s->dma_auto = 0;
|
|
|
|
s->in_index = 0;
|
|
|
|
s->out_data_len = 0;
|
|
|
|
s->left_till_irq = 0;
|
|
|
|
s->needed_bytes = 0;
|
|
|
|
s->block_size = -1;
|
|
|
|
s->nzero = 0;
|
|
|
|
s->highspeed = 0;
|
|
|
|
s->v2x6 = 0;
|
2005-10-30 19:58:22 +01:00
|
|
|
s->cmd = -1;
|
2004-11-07 19:04:02 +01:00
|
|
|
|
2009-09-10 17:59:50 +02:00
|
|
|
dsp_out_data (s, 0xaa);
|
2004-11-07 19:04:02 +01:00
|
|
|
speaker (s, 0);
|
|
|
|
control (s, 0);
|
2006-07-04 18:49:00 +02:00
|
|
|
legacy_reset (s);
|
2004-11-07 19:04:02 +01:00
|
|
|
}
|
|
|
|
|
2015-10-07 18:32:54 +02:00
|
|
|
static void dsp_write(void *opaque, uint32_t nport, uint32_t val)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
SB16State *s = opaque;
|
2003-11-13 02:46:15 +01:00
|
|
|
int iport;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
iport = nport - s->port;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("write %#x <- %#x\n", nport, val);
|
2003-11-13 02:46:15 +01:00
|
|
|
switch (iport) {
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x06:
|
|
|
|
switch (val) {
|
|
|
|
case 0x00:
|
|
|
|
if (s->v2x6 == 1) {
|
2009-11-18 17:17:03 +01:00
|
|
|
reset (s);
|
2004-11-07 19:04:02 +01:00
|
|
|
}
|
|
|
|
s->v2x6 = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x01:
|
|
|
|
case 0x03: /* FreeBSD kludge */
|
|
|
|
s->v2x6 = 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xc6:
|
|
|
|
s->v2x6 = 0; /* Prince of Persia, csp.sys, diagnose.exe */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xb8: /* Panic */
|
|
|
|
reset (s);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x39:
|
|
|
|
dsp_out_data (s, 0x38);
|
|
|
|
reset (s);
|
|
|
|
s->v2x6 = 0x39;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
s->v2x6 = val;
|
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x0c: /* write data or command | write status */
|
|
|
|
/* if (s->highspeed) */
|
|
|
|
/* break; */
|
|
|
|
|
2014-08-11 15:00:53 +02:00
|
|
|
if (s->needed_bytes == 0) {
|
2004-11-07 19:04:02 +01:00
|
|
|
command (s, val);
|
|
|
|
#if 0
|
|
|
|
if (0 == s->needed_bytes) {
|
|
|
|
log_dsp (s);
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
#endif
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
else {
|
2004-11-07 19:04:02 +01:00
|
|
|
if (s->in_index == sizeof (s->in2_data)) {
|
2004-10-09 19:20:54 +02:00
|
|
|
dolog ("in data overrun\n");
|
|
|
|
}
|
|
|
|
else {
|
2004-11-07 19:04:02 +01:00
|
|
|
s->in2_data[s->in_index++] = val;
|
|
|
|
if (s->in_index == s->needed_bytes) {
|
|
|
|
s->needed_bytes = 0;
|
|
|
|
complete (s);
|
|
|
|
#if 0
|
|
|
|
log_dsp (s);
|
|
|
|
#endif
|
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("(nport=%#x, val=%#x)\n", nport, val);
|
2004-03-23 23:42:11 +01:00
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-10-07 18:32:54 +02:00
|
|
|
static uint32_t dsp_read(void *opaque, uint32_t nport)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
SB16State *s = opaque;
|
|
|
|
int iport, retval, ack = 0;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
iport = nport - s->port;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
|
|
|
switch (iport) {
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x06: /* reset */
|
|
|
|
retval = 0xff;
|
2004-10-09 19:20:54 +02:00
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x0a: /* read data */
|
|
|
|
if (s->out_data_len) {
|
|
|
|
retval = s->out_data[--s->out_data_len];
|
|
|
|
s->last_read_byte = retval;
|
|
|
|
}
|
|
|
|
else {
|
2005-10-30 19:58:22 +01:00
|
|
|
if (s->cmd != -1) {
|
|
|
|
dolog ("empty output buffer for command %#x\n",
|
|
|
|
s->cmd);
|
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
retval = s->last_read_byte;
|
2004-10-09 19:20:54 +02:00
|
|
|
/* goto error; */
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x0c: /* 0 can write */
|
|
|
|
retval = s->can_write ? 0 : 0x80;
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x0d: /* timer interrupt clear */
|
|
|
|
/* dolog ("timer interrupt clear\n"); */
|
|
|
|
retval = 0;
|
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x0e: /* data available status | irq 8 ack */
|
|
|
|
retval = (!s->out_data_len || s->highspeed) ? 0 : 0x80;
|
|
|
|
if (s->mixer_regs[0x82] & 1) {
|
|
|
|
ack = 1;
|
2015-01-20 17:23:48 +01:00
|
|
|
s->mixer_regs[0x82] &= ~1;
|
2009-08-14 11:36:15 +02:00
|
|
|
qemu_irq_lower (s->pic);
|
2004-11-07 19:04:02 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x0f: /* irq 16 ack */
|
2004-01-18 23:19:31 +01:00
|
|
|
retval = 0xff;
|
2004-11-07 19:04:02 +01:00
|
|
|
if (s->mixer_regs[0x82] & 2) {
|
|
|
|
ack = 1;
|
2015-01-20 17:23:48 +01:00
|
|
|
s->mixer_regs[0x82] &= ~2;
|
2009-08-14 11:36:15 +02:00
|
|
|
qemu_irq_lower (s->pic);
|
2004-11-07 19:04:02 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
if (!ack) {
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("read %#x -> %#x\n", nport, retval);
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
error:
|
2005-10-30 19:58:22 +01:00
|
|
|
dolog ("warning: dsp_read %#x error\n", nport);
|
2004-10-09 19:20:54 +02:00
|
|
|
return 0xff;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
static void reset_mixer (SB16State *s)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
memset (s->mixer_regs, 0xff, 0x7f);
|
|
|
|
memset (s->mixer_regs + 0x83, 0xff, sizeof (s->mixer_regs) - 0x83);
|
|
|
|
|
|
|
|
s->mixer_regs[0x02] = 4; /* master volume 3bits */
|
|
|
|
s->mixer_regs[0x06] = 4; /* MIDI volume 3bits */
|
|
|
|
s->mixer_regs[0x08] = 0; /* CD volume 3bits */
|
|
|
|
s->mixer_regs[0x0a] = 0; /* voice volume 2bits */
|
|
|
|
|
|
|
|
/* d5=input filt, d3=lowpass filt, d1,d2=input source */
|
|
|
|
s->mixer_regs[0x0c] = 0;
|
|
|
|
|
|
|
|
/* d5=output filt, d1=stereo switch */
|
|
|
|
s->mixer_regs[0x0e] = 0;
|
|
|
|
|
|
|
|
/* voice volume L d5,d7, R d1,d3 */
|
|
|
|
s->mixer_regs[0x04] = (4 << 5) | (4 << 1);
|
|
|
|
/* master ... */
|
|
|
|
s->mixer_regs[0x22] = (4 << 5) | (4 << 1);
|
|
|
|
/* MIDI ... */
|
|
|
|
s->mixer_regs[0x26] = (4 << 5) | (4 << 1);
|
|
|
|
|
|
|
|
for (i = 0x30; i < 0x48; i++) {
|
|
|
|
s->mixer_regs[i] = 0x20;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-10-07 18:32:54 +02:00
|
|
|
static void mixer_write_indexb(void *opaque, uint32_t nport, uint32_t val)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
SB16State *s = opaque;
|
2005-11-05 19:55:28 +01:00
|
|
|
(void) nport;
|
2004-11-07 19:04:02 +01:00
|
|
|
s->mixer_nreg = val;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2015-10-07 18:32:54 +02:00
|
|
|
static void mixer_write_datab(void *opaque, uint32_t nport, uint32_t val)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
SB16State *s = opaque;
|
|
|
|
|
2005-11-05 19:55:28 +01:00
|
|
|
(void) nport;
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("mixer_write [%#x] <- %#x\n", s->mixer_nreg, val);
|
2004-04-17 00:09:02 +02:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
switch (s->mixer_nreg) {
|
2004-10-09 19:20:54 +02:00
|
|
|
case 0x00:
|
2004-11-07 19:04:02 +01:00
|
|
|
reset_mixer (s);
|
2004-10-09 19:20:54 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x80:
|
2004-11-07 19:04:02 +01:00
|
|
|
{
|
|
|
|
int irq = irq_of_magic (val);
|
|
|
|
ldebug ("setting irq to %d (val=%#x)\n", irq, val);
|
2005-10-30 19:58:22 +01:00
|
|
|
if (irq > 0) {
|
2004-11-07 19:04:02 +01:00
|
|
|
s->irq = irq;
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
}
|
2004-10-09 19:20:54 +02:00
|
|
|
break;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x81:
|
|
|
|
{
|
|
|
|
int dma, hdma;
|
2004-10-09 19:20:54 +02:00
|
|
|
|
2009-09-12 00:39:29 +02:00
|
|
|
dma = ctz32 (val & 0xf);
|
|
|
|
hdma = ctz32 (val & 0xf0);
|
2005-10-30 19:58:22 +01:00
|
|
|
if (dma != s->dma || hdma != s->hdma) {
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "attempt to change DMA 8bit"
|
|
|
|
" %d(%d), 16bit %d(%d) (val=%#x)\n", dma, s->dma,
|
|
|
|
hdma, s->hdma, val);
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
#if 0
|
|
|
|
s->dma = dma;
|
|
|
|
s->hdma = hdma;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
break;
|
2004-10-09 19:20:54 +02:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
case 0x82:
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "attempt to write into IRQ status"
|
|
|
|
" register (val=%#x)\n", val);
|
2004-11-07 19:04:02 +01:00
|
|
|
return;
|
2004-10-09 19:20:54 +02:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
default:
|
2005-10-30 19:58:22 +01:00
|
|
|
if (s->mixer_nreg >= 0x80) {
|
|
|
|
ldebug ("attempt to write mixer[%#x] <- %#x\n", s->mixer_nreg, val);
|
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
s->mixer_regs[s->mixer_nreg] = val;
|
2004-10-09 19:20:54 +02:00
|
|
|
}
|
|
|
|
|
2015-10-07 18:32:54 +02:00
|
|
|
static uint32_t mixer_read(void *opaque, uint32_t nport)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
SB16State *s = opaque;
|
2005-11-05 19:55:28 +01:00
|
|
|
|
|
|
|
(void) nport;
|
2004-11-14 17:02:09 +01:00
|
|
|
#ifndef DEBUG_SB16_MOST
|
2005-10-30 19:58:22 +01:00
|
|
|
if (s->mixer_nreg != 0x82) {
|
|
|
|
ldebug ("mixer_read[%#x] -> %#x\n",
|
|
|
|
s->mixer_nreg, s->mixer_regs[s->mixer_nreg]);
|
|
|
|
}
|
|
|
|
#else
|
2004-11-07 19:04:02 +01:00
|
|
|
ldebug ("mixer_read[%#x] -> %#x\n",
|
|
|
|
s->mixer_nreg, s->mixer_regs[s->mixer_nreg]);
|
2005-10-30 19:58:22 +01:00
|
|
|
#endif
|
2004-11-07 19:04:02 +01:00
|
|
|
return s->mixer_regs[s->mixer_nreg];
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
static int write_audio (SB16State *s, int nchan, int dma_pos,
|
|
|
|
int dma_len, int len)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2016-02-03 17:28:58 +01:00
|
|
|
IsaDma *isa_dma = nchan == s->dma ? s->isa_dma : s->isa_hdma;
|
|
|
|
IsaDmaClass *k = ISADMA_GET_CLASS(isa_dma);
|
2003-11-13 02:46:15 +01:00
|
|
|
int temp, net;
|
2004-02-26 00:32:01 +01:00
|
|
|
uint8_t tmpbuf[4096];
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
temp = len;
|
2003-11-13 02:46:15 +01:00
|
|
|
net = 0;
|
|
|
|
|
|
|
|
while (temp) {
|
2004-11-07 19:04:02 +01:00
|
|
|
int left = dma_len - dma_pos;
|
2005-11-05 19:55:28 +01:00
|
|
|
int copied;
|
|
|
|
size_t to_copy;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
to_copy = audio_MIN (temp, left);
|
2005-11-05 19:55:28 +01:00
|
|
|
if (to_copy > sizeof (tmpbuf)) {
|
|
|
|
to_copy = sizeof (tmpbuf);
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2016-02-03 17:28:58 +01:00
|
|
|
copied = k->read_memory(isa_dma, nchan, tmpbuf, dma_pos, to_copy);
|
2004-11-07 19:04:02 +01:00
|
|
|
copied = AUD_write (s->voice, tmpbuf, copied);
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
temp -= copied;
|
|
|
|
dma_pos = (dma_pos + copied) % dma_len;
|
2003-11-13 02:46:15 +01:00
|
|
|
net += copied;
|
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
if (!copied) {
|
2004-11-07 19:04:02 +01:00
|
|
|
break;
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
return net;
|
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
static int SB_read_DMA (void *opaque, int nchan, int dma_pos, int dma_len)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
SB16State *s = opaque;
|
2005-10-30 19:58:22 +01:00
|
|
|
int till, copy, written, free;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2008-01-14 05:24:29 +01:00
|
|
|
if (s->block_size <= 0) {
|
2018-02-01 18:27:44 +01:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "invalid block size=%d nchan=%d"
|
|
|
|
" dma_pos=%d dma_len=%d\n", s->block_size, nchan,
|
|
|
|
dma_pos, dma_len);
|
2008-01-14 05:24:29 +01:00
|
|
|
return dma_pos;
|
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
if (s->left_till_irq < 0) {
|
|
|
|
s->left_till_irq = s->block_size;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
if (s->voice) {
|
|
|
|
free = s->audio_free & ~s->align;
|
|
|
|
if ((free <= 0) || !dma_len) {
|
|
|
|
return dma_pos;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
free = dma_len;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
copy = free;
|
|
|
|
till = s->left_till_irq;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-10-09 19:20:54 +02:00
|
|
|
#ifdef DEBUG_SB16_MOST
|
2005-10-30 19:58:22 +01:00
|
|
|
dolog ("pos:%06d %d till:%d len:%d\n",
|
|
|
|
dma_pos, free, till, dma_len);
|
2004-10-09 19:20:54 +02:00
|
|
|
#endif
|
|
|
|
|
2003-11-13 02:46:15 +01:00
|
|
|
if (till <= copy) {
|
2014-08-11 15:00:53 +02:00
|
|
|
if (s->dma_auto == 0) {
|
2003-11-13 02:46:15 +01:00
|
|
|
copy = till;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
written = write_audio (s, nchan, dma_pos, dma_len, copy);
|
|
|
|
dma_pos = (dma_pos + written) % dma_len;
|
|
|
|
s->left_till_irq -= written;
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
if (s->left_till_irq <= 0) {
|
|
|
|
s->mixer_regs[0x82] |= (nchan & 4) ? 2 : 1;
|
2009-08-14 11:36:15 +02:00
|
|
|
qemu_irq_raise (s->pic);
|
2014-08-11 15:00:53 +02:00
|
|
|
if (s->dma_auto == 0) {
|
2004-11-07 19:04:02 +01:00
|
|
|
control (s, 0);
|
|
|
|
speaker (s, 0);
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2004-10-09 19:20:54 +02:00
|
|
|
#ifdef DEBUG_SB16_MOST
|
2004-11-14 17:02:09 +01:00
|
|
|
ldebug ("pos %5d free %5d size %5d till % 5d copy %5d written %5d size %5d\n",
|
|
|
|
dma_pos, free, dma_len, s->left_till_irq, copy, written,
|
|
|
|
s->block_size);
|
2004-10-09 19:20:54 +02:00
|
|
|
#endif
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
while (s->left_till_irq <= 0) {
|
|
|
|
s->left_till_irq = s->block_size + s->left_till_irq;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
return dma_pos;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
static void SB_audio_callback (void *opaque, int free)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
SB16State *s = opaque;
|
2005-10-30 19:58:22 +01:00
|
|
|
s->audio_free = free;
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
|
|
|
|
2009-12-02 11:49:35 +01:00
|
|
|
static int sb16_post_load (void *opaque, int version_id)
|
2004-10-09 19:20:54 +02:00
|
|
|
{
|
2004-11-07 19:04:02 +01:00
|
|
|
SB16State *s = opaque;
|
|
|
|
|
2004-11-10 00:09:44 +01:00
|
|
|
if (s->voice) {
|
2005-11-05 19:55:28 +01:00
|
|
|
AUD_close_out (&s->card, s->voice);
|
2004-11-10 00:09:44 +01:00
|
|
|
s->voice = NULL;
|
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
|
|
|
|
if (s->dma_running) {
|
2005-10-30 19:58:22 +01:00
|
|
|
if (s->freq) {
|
2008-12-03 23:48:44 +01:00
|
|
|
struct audsettings as;
|
2005-11-05 19:55:28 +01:00
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
s->audio_free = 0;
|
2005-11-05 19:55:28 +01:00
|
|
|
|
|
|
|
as.freq = s->freq;
|
|
|
|
as.nchannels = 1 << s->fmt_stereo;
|
|
|
|
as.fmt = s->fmt;
|
2006-07-04 23:47:22 +02:00
|
|
|
as.endianness = 0;
|
2005-11-05 19:55:28 +01:00
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
s->voice = AUD_open_out (
|
2005-11-05 19:55:28 +01:00
|
|
|
&s->card,
|
2005-10-30 19:58:22 +01:00
|
|
|
s->voice,
|
|
|
|
"sb16",
|
|
|
|
s,
|
|
|
|
SB_audio_callback,
|
2006-07-04 23:47:22 +02:00
|
|
|
&as
|
2005-10-30 19:58:22 +01:00
|
|
|
);
|
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
|
|
|
|
control (s, 1);
|
|
|
|
speaker (s, s->speaker);
|
2004-10-09 19:20:54 +02:00
|
|
|
}
|
2004-11-07 19:04:02 +01:00
|
|
|
return 0;
|
2004-10-09 19:20:54 +02:00
|
|
|
}
|
|
|
|
|
2009-12-02 11:49:35 +01:00
|
|
|
static const VMStateDescription vmstate_sb16 = {
|
|
|
|
.name = "sb16",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.post_load = sb16_post_load,
|
2014-04-16 15:32:32 +02:00
|
|
|
.fields = (VMStateField[]) {
|
2012-02-07 19:11:04 +01:00
|
|
|
VMSTATE_UINT32 (irq, SB16State),
|
|
|
|
VMSTATE_UINT32 (dma, SB16State),
|
|
|
|
VMSTATE_UINT32 (hdma, SB16State),
|
|
|
|
VMSTATE_UINT32 (port, SB16State),
|
|
|
|
VMSTATE_UINT32 (ver, SB16State),
|
|
|
|
VMSTATE_INT32 (in_index, SB16State),
|
|
|
|
VMSTATE_INT32 (out_data_len, SB16State),
|
|
|
|
VMSTATE_INT32 (fmt_stereo, SB16State),
|
|
|
|
VMSTATE_INT32 (fmt_signed, SB16State),
|
|
|
|
VMSTATE_INT32 (fmt_bits, SB16State),
|
|
|
|
VMSTATE_UINT32 (fmt, SB16State),
|
|
|
|
VMSTATE_INT32 (dma_auto, SB16State),
|
|
|
|
VMSTATE_INT32 (block_size, SB16State),
|
|
|
|
VMSTATE_INT32 (fifo, SB16State),
|
|
|
|
VMSTATE_INT32 (freq, SB16State),
|
|
|
|
VMSTATE_INT32 (time_const, SB16State),
|
|
|
|
VMSTATE_INT32 (speaker, SB16State),
|
|
|
|
VMSTATE_INT32 (needed_bytes, SB16State),
|
|
|
|
VMSTATE_INT32 (cmd, SB16State),
|
|
|
|
VMSTATE_INT32 (use_hdma, SB16State),
|
|
|
|
VMSTATE_INT32 (highspeed, SB16State),
|
|
|
|
VMSTATE_INT32 (can_write, SB16State),
|
|
|
|
VMSTATE_INT32 (v2x6, SB16State),
|
|
|
|
|
|
|
|
VMSTATE_UINT8 (csp_param, SB16State),
|
|
|
|
VMSTATE_UINT8 (csp_value, SB16State),
|
|
|
|
VMSTATE_UINT8 (csp_mode, SB16State),
|
|
|
|
VMSTATE_UINT8 (csp_param, SB16State),
|
|
|
|
VMSTATE_BUFFER (csp_regs, SB16State),
|
|
|
|
VMSTATE_UINT8 (csp_index, SB16State),
|
|
|
|
VMSTATE_BUFFER (csp_reg83, SB16State),
|
|
|
|
VMSTATE_INT32 (csp_reg83r, SB16State),
|
|
|
|
VMSTATE_INT32 (csp_reg83w, SB16State),
|
|
|
|
|
|
|
|
VMSTATE_BUFFER (in2_data, SB16State),
|
|
|
|
VMSTATE_BUFFER (out_data, SB16State),
|
|
|
|
VMSTATE_UINT8 (test_reg, SB16State),
|
|
|
|
VMSTATE_UINT8 (last_read_byte, SB16State),
|
|
|
|
|
|
|
|
VMSTATE_INT32 (nzero, SB16State),
|
|
|
|
VMSTATE_INT32 (left_till_irq, SB16State),
|
|
|
|
VMSTATE_INT32 (dma_running, SB16State),
|
|
|
|
VMSTATE_INT32 (bytes_per_second, SB16State),
|
|
|
|
VMSTATE_INT32 (align, SB16State),
|
|
|
|
|
|
|
|
VMSTATE_INT32 (mixer_nreg, SB16State),
|
|
|
|
VMSTATE_BUFFER (mixer_regs, SB16State),
|
|
|
|
|
|
|
|
VMSTATE_END_OF_LIST ()
|
2009-12-02 11:49:35 +01:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2011-08-16 01:10:47 +02:00
|
|
|
static const MemoryRegionPortio sb16_ioport_list[] = {
|
|
|
|
{ 4, 1, 1, .write = mixer_write_indexb },
|
|
|
|
{ 5, 1, 1, .read = mixer_read, .write = mixer_write_datab },
|
|
|
|
{ 6, 1, 1, .read = dsp_read, .write = dsp_write },
|
|
|
|
{ 10, 1, 1, .read = dsp_read },
|
|
|
|
{ 12, 1, 1, .write = dsp_write },
|
|
|
|
{ 12, 4, 1, .read = dsp_read },
|
2012-02-07 19:11:04 +01:00
|
|
|
PORTIO_END_OF_LIST (),
|
2011-08-16 01:10:47 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
|
2012-11-25 02:37:14 +01:00
|
|
|
static void sb16_initfn (Object *obj)
|
2003-11-13 02:46:15 +01:00
|
|
|
{
|
2012-11-25 02:37:14 +01:00
|
|
|
SB16State *s = SB16 (obj);
|
2005-11-05 19:55:28 +01:00
|
|
|
|
2005-10-30 19:58:22 +01:00
|
|
|
s->cmd = -1;
|
2012-11-25 02:37:14 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static void sb16_realizefn (DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
ISADevice *isadev = ISA_DEVICE (dev);
|
|
|
|
SB16State *s = SB16 (dev);
|
2016-02-03 17:28:58 +01:00
|
|
|
IsaDmaClass *k;
|
2012-11-25 02:37:14 +01:00
|
|
|
|
2018-03-16 10:51:31 +01:00
|
|
|
s->isa_hdma = isa_get_dma(isa_bus_from_device(isadev), s->hdma);
|
|
|
|
s->isa_dma = isa_get_dma(isa_bus_from_device(isadev), s->dma);
|
|
|
|
if (!s->isa_dma || !s->isa_hdma) {
|
|
|
|
error_setg(errp, "ISA controller does not support DMA");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2012-11-25 02:37:14 +01:00
|
|
|
isa_init_irq (isadev, &s->pic, s->irq);
|
2004-04-17 00:09:02 +02:00
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
s->mixer_regs[0x80] = magic_of_irq (s->irq);
|
|
|
|
s->mixer_regs[0x81] = (1 << s->dma) | (1 << s->hdma);
|
|
|
|
s->mixer_regs[0x82] = 2 << 5;
|
|
|
|
|
|
|
|
s->csp_regs[5] = 1;
|
|
|
|
s->csp_regs[9] = 0xf8;
|
|
|
|
|
|
|
|
reset_mixer (s);
|
2013-08-21 17:03:08 +02:00
|
|
|
s->aux_ts = timer_new_ns(QEMU_CLOCK_VIRTUAL, aux_timer, s);
|
2005-10-30 19:58:22 +01:00
|
|
|
if (!s->aux_ts) {
|
2018-02-01 18:27:44 +01:00
|
|
|
error_setg(errp, "warning: Could not create auxiliary timer");
|
2005-10-30 19:58:22 +01:00
|
|
|
}
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2016-07-13 02:11:59 +02:00
|
|
|
isa_register_portio_list(isadev, &s->portio_list, s->port,
|
|
|
|
sb16_ioport_list, s, "sb16");
|
2003-11-13 02:46:15 +01:00
|
|
|
|
2016-02-03 17:28:58 +01:00
|
|
|
k = ISADMA_GET_CLASS(s->isa_hdma);
|
|
|
|
k->register_channel(s->isa_hdma, s->hdma, SB_read_DMA, s);
|
|
|
|
|
|
|
|
k = ISADMA_GET_CLASS(s->isa_dma);
|
|
|
|
k->register_channel(s->isa_dma, s->dma, SB_read_DMA, s);
|
|
|
|
|
2004-11-07 19:04:02 +01:00
|
|
|
s->can_write = 1;
|
2004-10-09 19:20:54 +02:00
|
|
|
|
2009-05-14 01:11:35 +02:00
|
|
|
AUD_register_card ("sb16", &s->card);
|
2003-11-13 02:46:15 +01:00
|
|
|
}
|
2009-09-10 11:43:30 +02:00
|
|
|
|
2013-04-18 18:43:58 +02:00
|
|
|
static int SB16_init (ISABus *bus)
|
2009-09-10 11:43:30 +02:00
|
|
|
{
|
2013-04-27 22:18:49 +02:00
|
|
|
isa_create_simple (bus, TYPE_SB16);
|
2009-09-10 11:43:30 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-12-08 04:34:16 +01:00
|
|
|
static Property sb16_properties[] = {
|
2014-02-08 11:01:53 +01:00
|
|
|
DEFINE_PROP_UINT32 ("version", SB16State, ver, 0x0405), /* 4.5 */
|
|
|
|
DEFINE_PROP_UINT32 ("iobase", SB16State, port, 0x220),
|
2011-12-08 04:34:16 +01:00
|
|
|
DEFINE_PROP_UINT32 ("irq", SB16State, irq, 5),
|
|
|
|
DEFINE_PROP_UINT32 ("dma", SB16State, dma, 1),
|
|
|
|
DEFINE_PROP_UINT32 ("dma16", SB16State, hdma, 5),
|
|
|
|
DEFINE_PROP_END_OF_LIST (),
|
|
|
|
};
|
|
|
|
|
2012-02-07 19:11:04 +01:00
|
|
|
static void sb16_class_initfn (ObjectClass *klass, void *data)
|
2011-12-04 18:52:49 +01:00
|
|
|
{
|
2012-02-07 19:11:04 +01:00
|
|
|
DeviceClass *dc = DEVICE_CLASS (klass);
|
2012-11-25 02:37:14 +01:00
|
|
|
|
|
|
|
dc->realize = sb16_realizefn;
|
2013-07-29 16:17:45 +02:00
|
|
|
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
|
2011-12-08 04:34:16 +01:00
|
|
|
dc->desc = "Creative Sound Blaster 16";
|
|
|
|
dc->vmsd = &vmstate_sb16;
|
|
|
|
dc->props = sb16_properties;
|
2011-12-04 18:52:49 +01:00
|
|
|
}
|
|
|
|
|
2013-01-10 16:19:07 +01:00
|
|
|
static const TypeInfo sb16_info = {
|
2013-04-27 22:18:49 +02:00
|
|
|
.name = TYPE_SB16,
|
2011-12-08 04:34:16 +01:00
|
|
|
.parent = TYPE_ISA_DEVICE,
|
|
|
|
.instance_size = sizeof (SB16State),
|
2012-11-25 02:37:14 +01:00
|
|
|
.instance_init = sb16_initfn,
|
2011-12-08 04:34:16 +01:00
|
|
|
.class_init = sb16_class_initfn,
|
2009-09-10 11:43:30 +02:00
|
|
|
};
|
|
|
|
|
2012-02-09 15:20:55 +01:00
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static void sb16_register_types (void)
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2009-09-10 11:43:30 +02:00
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{
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2012-02-07 19:11:04 +01:00
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type_register_static (&sb16_info);
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2013-04-18 18:43:58 +02:00
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isa_register_soundhw("sb16", "Creative Sound Blaster 16", SB16_init);
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2009-09-10 11:43:30 +02:00
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}
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2012-02-09 15:20:55 +01:00
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type_init (sb16_register_types)
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