2021-06-14 21:32:19 +02:00
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/*
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* QEMU Floppy disk emulator (Intel 82078)
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*
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* Copyright (c) 2003, 2007 Jocelyn Mayer
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* Copyright (c) 2008 Hervé Poussineau
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qom/object.h"
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2024-01-14 13:39:02 +01:00
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#include "exec/memory.h"
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2021-06-14 21:32:19 +02:00
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#include "hw/sysbus.h"
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#include "hw/block/fdc.h"
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#include "migration/vmstate.h"
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#include "fdc-internal.h"
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#include "trace.h"
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#define TYPE_SYSBUS_FDC "base-sysbus-fdc"
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typedef struct FDCtrlSysBusClass FDCtrlSysBusClass;
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typedef struct FDCtrlSysBus FDCtrlSysBus;
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DECLARE_OBJ_CHECKERS(FDCtrlSysBus, FDCtrlSysBusClass,
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SYSBUS_FDC, TYPE_SYSBUS_FDC)
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struct FDCtrlSysBusClass {
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/*< private >*/
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SysBusDeviceClass parent_class;
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/*< public >*/
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bool use_strict_io;
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};
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struct FDCtrlSysBus {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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struct FDCtrl state;
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2024-01-14 13:39:02 +01:00
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MemoryRegion iomem;
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2021-06-14 21:32:19 +02:00
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};
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static uint64_t fdctrl_read_mem(void *opaque, hwaddr reg, unsigned ize)
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{
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return fdctrl_read(opaque, (uint32_t)reg);
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}
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static void fdctrl_write_mem(void *opaque, hwaddr reg,
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uint64_t value, unsigned size)
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{
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fdctrl_write(opaque, (uint32_t)reg, value);
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}
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static const MemoryRegionOps fdctrl_mem_ops = {
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.read = fdctrl_read_mem,
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.write = fdctrl_write_mem,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static const MemoryRegionOps fdctrl_mem_strict_ops = {
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.read = fdctrl_read_mem,
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.write = fdctrl_write_mem,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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};
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static void fdctrl_external_reset_sysbus(DeviceState *d)
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{
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FDCtrlSysBus *sys = SYSBUS_FDC(d);
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FDCtrl *s = &sys->state;
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fdctrl_reset(s, 0);
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}
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static void fdctrl_handle_tc(void *opaque, int irq, int level)
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{
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trace_fdctrl_tc_pulse(level);
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}
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2022-05-05 12:18:42 +02:00
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void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, DriveInfo **fds)
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2021-06-14 21:32:19 +02:00
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{
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DeviceState *dev;
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SysBusDevice *sbd;
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FDCtrlSysBus *sys;
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dev = qdev_new("sysbus-fdc");
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sys = SYSBUS_FDC(dev);
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sbd = SYS_BUS_DEVICE(dev);
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sysbus_realize_and_unref(sbd, &error_fatal);
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sysbus_connect_irq(sbd, 0, irq);
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sysbus_mmio_map(sbd, 0, mmio_base);
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fdctrl_init_drives(&sys->state.bus, fds);
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}
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void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base,
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DriveInfo **fds, qemu_irq *fdc_tc)
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{
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DeviceState *dev;
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FDCtrlSysBus *sys;
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dev = qdev_new("sun-fdtwo");
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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sys = SYSBUS_FDC(dev);
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sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq);
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sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base);
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*fdc_tc = qdev_get_gpio_in(dev, 0);
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fdctrl_init_drives(&sys->state.bus, fds);
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}
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static void sysbus_fdc_common_instance_init(Object *obj)
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{
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DeviceState *dev = DEVICE(obj);
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FDCtrlSysBusClass *sbdc = SYSBUS_FDC_GET_CLASS(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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FDCtrlSysBus *sys = SYSBUS_FDC(obj);
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FDCtrl *fdctrl = &sys->state;
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2022-05-05 12:18:42 +02:00
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/*
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* DMA is not currently supported for sysbus floppy controllers.
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* If we wanted to add support then probably the best approach is
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* to have a QOM link property 'dma-controller' which the board
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* code can set to an instance of IsaDmaClass, and an integer
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* property 'dma-channel', so that we can set fdctrl->dma and
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* fdctrl->dma_chann accordingly.
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*/
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fdctrl->dma_chann = -1;
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2021-06-14 21:32:19 +02:00
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qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */
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2024-01-14 13:39:02 +01:00
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memory_region_init_io(&sys->iomem, obj,
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2021-06-14 21:32:19 +02:00
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sbdc->use_strict_io ? &fdctrl_mem_strict_ops
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: &fdctrl_mem_ops,
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fdctrl, "fdc", 0x08);
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2024-01-14 13:39:02 +01:00
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sysbus_init_mmio(sbd, &sys->iomem);
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2021-06-14 21:32:19 +02:00
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sysbus_init_irq(sbd, &fdctrl->irq);
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qdev_init_gpio_in(dev, fdctrl_handle_tc, 1);
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}
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static void sysbus_fdc_realize(DeviceState *dev, Error **errp)
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{
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FDCtrlSysBus *sys = SYSBUS_FDC(dev);
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FDCtrl *fdctrl = &sys->state;
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fdctrl_realize_common(dev, fdctrl, errp);
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}
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static const VMStateDescription vmstate_sysbus_fdc = {
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.name = "fdc",
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.version_id = 2,
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.minimum_version_id = 2,
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2023-12-21 04:16:05 +01:00
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.fields = (const VMStateField[]) {
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2021-06-14 21:32:19 +02:00
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VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl),
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VMSTATE_END_OF_LIST()
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}
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};
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static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = sysbus_fdc_realize;
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dc->reset = fdctrl_external_reset_sysbus;
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dc->vmsd = &vmstate_sysbus_fdc;
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set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
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}
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static const TypeInfo sysbus_fdc_common_typeinfo = {
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.name = TYPE_SYSBUS_FDC,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(FDCtrlSysBus),
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.instance_init = sysbus_fdc_common_instance_init,
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.abstract = true,
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.class_init = sysbus_fdc_common_class_init,
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.class_size = sizeof(FDCtrlSysBusClass),
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};
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static Property sysbus_fdc_properties[] = {
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DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type,
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FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
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FloppyDriveType),
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DEFINE_PROP_SIGNED("fdtypeB", FDCtrlSysBus, state.qdev_for_drives[1].type,
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FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
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FloppyDriveType),
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DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback,
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FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
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FloppyDriveType),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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2021-06-14 21:32:20 +02:00
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dc->desc = "virtual floppy controller";
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2021-06-14 21:32:19 +02:00
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device_class_set_props(dc, sysbus_fdc_properties);
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}
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static const TypeInfo sysbus_fdc_typeinfo = {
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.name = "sysbus-fdc",
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.parent = TYPE_SYSBUS_FDC,
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.class_init = sysbus_fdc_class_init,
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};
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static Property sun4m_fdc_properties[] = {
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DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type,
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FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
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FloppyDriveType),
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DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback,
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FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
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FloppyDriveType),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
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{
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FDCtrlSysBusClass *sbdc = SYSBUS_FDC_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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sbdc->use_strict_io = true;
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2021-06-14 21:32:20 +02:00
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dc->desc = "virtual floppy controller";
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device_class_set_props(dc, sun4m_fdc_properties);
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}
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static const TypeInfo sun4m_fdc_typeinfo = {
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.name = "sun-fdtwo",
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.parent = TYPE_SYSBUS_FDC,
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.class_init = sun4m_fdc_class_init,
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};
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static void sysbus_fdc_register_types(void)
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{
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type_register_static(&sysbus_fdc_common_typeinfo);
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type_register_static(&sysbus_fdc_typeinfo);
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type_register_static(&sun4m_fdc_typeinfo);
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}
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type_init(sysbus_fdc_register_types)
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