2009-08-20 15:22:19 +02:00
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#ifndef HW_IDE_H
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#define HW_IDE_H
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2010-06-24 19:59:29 +02:00
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#include "isa.h"
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#include "pci.h"
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2009-08-20 15:22:19 +02:00
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2011-01-28 11:21:40 +01:00
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#define MAX_IDE_DEVS 2
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2009-08-20 15:22:19 +02:00
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/* ide-isa.c */
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2010-06-24 19:59:29 +02:00
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ISADevice *isa_ide_init(int iobase, int iobase2, int isairq,
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DriveInfo *hd0, DriveInfo *hd1);
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2009-08-20 15:22:19 +02:00
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2009-08-20 15:22:20 +02:00
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/* ide-pci.c */
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2009-08-28 15:47:03 +02:00
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void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table,
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2009-08-20 15:22:20 +02:00
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int secondary_ide_enabled);
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2010-06-24 19:59:29 +02:00
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PCIDevice *pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
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PCIDevice *pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
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2010-06-29 04:49:50 +02:00
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void vt82c686b_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn);
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2009-08-20 15:22:20 +02:00
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2009-08-20 15:22:21 +02:00
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/* ide-macio.c */
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2009-08-28 15:47:03 +02:00
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int pmac_ide_init (DriveInfo **hd_table, qemu_irq irq,
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2009-08-20 15:22:21 +02:00
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void *dbdma, int channel, qemu_irq dma_irq);
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2009-08-20 15:22:22 +02:00
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/* ide-mmio.c */
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2009-10-01 23:12:16 +02:00
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void mmio_ide_init (target_phys_addr_t membase, target_phys_addr_t membase2,
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2009-08-20 15:22:22 +02:00
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qemu_irq irq, int shift,
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2009-08-28 15:47:03 +02:00
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DriveInfo *hd0, DriveInfo *hd1);
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2009-08-20 15:22:22 +02:00
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2010-06-24 19:58:20 +02:00
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void ide_get_bs(BlockDriverState *bs[], BusState *qbus);
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2011-04-03 13:32:46 +02:00
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/* ide/core.c */
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void ide_drive_get(DriveInfo **hd, int max_bus);
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2009-08-20 15:22:19 +02:00
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#endif /* HW_IDE_H */
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