2007-11-17 18:14:51 +01:00
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#ifndef QEMU_IRQ_H
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#define QEMU_IRQ_H
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2007-04-07 20:14:41 +02:00
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/* Generic IRQ/GPIO pin infrastructure. */
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typedef void (*qemu_irq_handler)(void *opaque, int n, int level);
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void qemu_set_irq(qemu_irq irq, int level);
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static inline void qemu_irq_raise(qemu_irq irq)
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{
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qemu_set_irq(irq, 1);
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}
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static inline void qemu_irq_lower(qemu_irq irq)
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{
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qemu_set_irq(irq, 0);
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}
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2007-12-05 04:23:39 +01:00
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static inline void qemu_irq_pulse(qemu_irq irq)
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{
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qemu_set_irq(irq, 1);
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qemu_set_irq(irq, 0);
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}
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2007-04-07 20:14:41 +02:00
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/* Returns an array of N IRQs. */
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qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n);
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2009-02-11 16:21:04 +01:00
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void qemu_free_irqs(qemu_irq *s);
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2007-04-07 20:14:41 +02:00
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2007-10-29 11:59:29 +01:00
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/* Returns a new IRQ with opposite polarity. */
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qemu_irq qemu_irq_invert(qemu_irq irq);
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2007-11-17 18:14:51 +01:00
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2011-02-21 21:57:52 +01:00
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/* Returns a new IRQ which feeds into both the passed IRQs */
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qemu_irq qemu_irq_split(qemu_irq irq1, qemu_irq irq2);
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2011-09-18 14:58:26 +02:00
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/* Returns a new IRQ set which connects 1:1 to another IRQ set, which
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* may be set later.
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*/
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qemu_irq *qemu_irq_proxy(qemu_irq **target, int n);
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2007-11-17 18:14:51 +01:00
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#endif
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