2007-09-16 23:08:06 +02:00
|
|
|
/*
|
2007-05-23 02:03:59 +02:00
|
|
|
* QEMU SMBus device emulation.
|
|
|
|
*
|
|
|
|
* Copyright (c) 2007 CodeSourcery.
|
|
|
|
* Written by Paul Brook
|
|
|
|
*
|
2011-06-26 04:21:35 +02:00
|
|
|
* This code is licensed under the LGPL.
|
2007-05-23 02:03:59 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
/* TODO: Implement PEC. */
|
|
|
|
|
2007-11-17 18:14:51 +01:00
|
|
|
#include "hw.h"
|
|
|
|
#include "i2c.h"
|
|
|
|
#include "smbus.h"
|
2007-05-23 02:03:59 +02:00
|
|
|
|
|
|
|
//#define DEBUG_SMBUS 1
|
|
|
|
|
|
|
|
#ifdef DEBUG_SMBUS
|
2009-05-13 19:53:17 +02:00
|
|
|
#define DPRINTF(fmt, ...) \
|
|
|
|
do { printf("smbus(%02x): " fmt , dev->i2c.address, ## __VA_ARGS__); } while (0)
|
|
|
|
#define BADF(fmt, ...) \
|
|
|
|
do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
|
2007-05-23 02:03:59 +02:00
|
|
|
#else
|
2009-05-13 19:53:17 +02:00
|
|
|
#define DPRINTF(fmt, ...) do {} while(0)
|
|
|
|
#define BADF(fmt, ...) \
|
|
|
|
do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__);} while (0)
|
2007-05-23 02:03:59 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
enum {
|
|
|
|
SMBUS_IDLE,
|
|
|
|
SMBUS_WRITE_DATA,
|
|
|
|
SMBUS_RECV_BYTE,
|
|
|
|
SMBUS_READ_DATA,
|
|
|
|
SMBUS_DONE,
|
|
|
|
SMBUS_CONFUSED = -1
|
|
|
|
};
|
|
|
|
|
|
|
|
static void smbus_do_quick_cmd(SMBusDevice *dev, int recv)
|
|
|
|
{
|
2011-12-05 03:39:20 +01:00
|
|
|
SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
|
2009-05-14 23:35:08 +02:00
|
|
|
|
2007-05-23 02:03:59 +02:00
|
|
|
DPRINTF("Quick Command %d\n", recv);
|
2011-12-05 03:39:20 +01:00
|
|
|
if (sc->quick_cmd) {
|
|
|
|
sc->quick_cmd(dev, recv);
|
|
|
|
}
|
2007-05-23 02:03:59 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void smbus_do_write(SMBusDevice *dev)
|
|
|
|
{
|
2011-12-05 03:39:20 +01:00
|
|
|
SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
|
2009-05-14 23:35:08 +02:00
|
|
|
|
2007-05-23 02:03:59 +02:00
|
|
|
if (dev->data_len == 0) {
|
|
|
|
smbus_do_quick_cmd(dev, 0);
|
|
|
|
} else if (dev->data_len == 1) {
|
|
|
|
DPRINTF("Send Byte\n");
|
2011-12-05 03:39:20 +01:00
|
|
|
if (sc->send_byte) {
|
|
|
|
sc->send_byte(dev, dev->data_buf[0]);
|
2007-05-23 02:03:59 +02:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
dev->command = dev->data_buf[0];
|
|
|
|
DPRINTF("Command %d len %d\n", dev->command, dev->data_len - 1);
|
2011-12-05 03:39:20 +01:00
|
|
|
if (sc->write_data) {
|
|
|
|
sc->write_data(dev, dev->command, dev->data_buf + 1,
|
|
|
|
dev->data_len - 1);
|
2007-05-23 02:03:59 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static void smbus_i2c_event(I2CSlave *s, enum i2c_event event)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
2011-12-05 03:39:20 +01:00
|
|
|
SMBusDevice *dev = SMBUS_DEVICE(s);
|
2009-05-14 23:35:08 +02:00
|
|
|
|
2007-05-23 02:03:59 +02:00
|
|
|
switch (event) {
|
|
|
|
case I2C_START_SEND:
|
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_IDLE:
|
|
|
|
DPRINTF("Incoming data\n");
|
|
|
|
dev->mode = SMBUS_WRITE_DATA;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BADF("Unexpected send start condition in state %d\n", dev->mode);
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case I2C_START_RECV:
|
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_IDLE:
|
|
|
|
DPRINTF("Read mode\n");
|
|
|
|
dev->mode = SMBUS_RECV_BYTE;
|
|
|
|
break;
|
|
|
|
case SMBUS_WRITE_DATA:
|
|
|
|
if (dev->data_len == 0) {
|
|
|
|
BADF("Read after write with no data\n");
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
} else {
|
|
|
|
if (dev->data_len > 1) {
|
|
|
|
smbus_do_write(dev);
|
|
|
|
} else {
|
|
|
|
dev->command = dev->data_buf[0];
|
|
|
|
DPRINTF("%02x: Command %d\n", dev->i2c.address,
|
|
|
|
dev->command);
|
|
|
|
}
|
|
|
|
DPRINTF("Read mode\n");
|
|
|
|
dev->data_len = 0;
|
|
|
|
dev->mode = SMBUS_READ_DATA;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BADF("Unexpected recv start condition in state %d\n", dev->mode);
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case I2C_FINISH:
|
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_WRITE_DATA:
|
|
|
|
smbus_do_write(dev);
|
|
|
|
break;
|
|
|
|
case SMBUS_RECV_BYTE:
|
|
|
|
smbus_do_quick_cmd(dev, 1);
|
|
|
|
break;
|
|
|
|
case SMBUS_READ_DATA:
|
|
|
|
BADF("Unexpected stop during receive\n");
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
/* Nothing to do. */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
dev->mode = SMBUS_IDLE;
|
|
|
|
dev->data_len = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case I2C_NACK:
|
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_DONE:
|
|
|
|
/* Nothing to do. */
|
|
|
|
break;
|
|
|
|
case SMBUS_READ_DATA:
|
|
|
|
dev->mode = SMBUS_DONE;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BADF("Unexpected NACK in state %d\n", dev->mode);
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static int smbus_i2c_recv(I2CSlave *s)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
2011-12-05 03:39:20 +01:00
|
|
|
SMBusDevice *dev = SMBUS_DEVICE(s);
|
|
|
|
SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
|
2007-05-23 02:03:59 +02:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_RECV_BYTE:
|
2011-12-05 03:39:20 +01:00
|
|
|
if (sc->receive_byte) {
|
|
|
|
ret = sc->receive_byte(dev);
|
2007-05-23 02:03:59 +02:00
|
|
|
} else {
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
DPRINTF("Receive Byte %02x\n", ret);
|
|
|
|
dev->mode = SMBUS_DONE;
|
|
|
|
break;
|
|
|
|
case SMBUS_READ_DATA:
|
2011-12-05 03:39:20 +01:00
|
|
|
if (sc->read_data) {
|
|
|
|
ret = sc->read_data(dev, dev->command, dev->data_len);
|
2007-05-23 02:03:59 +02:00
|
|
|
dev->data_len++;
|
|
|
|
} else {
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
DPRINTF("Read data %02x\n", ret);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BADF("Unexpected read in state %d\n", dev->mode);
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
ret = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static int smbus_i2c_send(I2CSlave *s, uint8_t data)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
2011-12-05 03:39:20 +01:00
|
|
|
SMBusDevice *dev = SMBUS_DEVICE(s);
|
2009-05-14 23:35:08 +02:00
|
|
|
|
2007-05-23 02:03:59 +02:00
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_WRITE_DATA:
|
|
|
|
DPRINTF("Write data %02x\n", data);
|
|
|
|
dev->data_buf[dev->data_len++] = data;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BADF("Unexpected write in state %d\n", dev->mode);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static int smbus_device_init(I2CSlave *i2c)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
2011-12-05 03:39:20 +01:00
|
|
|
SMBusDevice *dev = SMBUS_DEVICE(i2c);
|
|
|
|
SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
|
2007-05-23 02:03:59 +02:00
|
|
|
|
2011-12-05 03:39:20 +01:00
|
|
|
return sc->init(dev);
|
2009-05-14 23:35:08 +02:00
|
|
|
}
|
2007-05-23 02:03:59 +02:00
|
|
|
|
|
|
|
/* Master device commands. */
|
2009-09-29 22:48:26 +02:00
|
|
|
void smbus_quick_command(i2c_bus *bus, uint8_t addr, int read)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
|
|
|
i2c_start_transfer(bus, addr, read);
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:26 +02:00
|
|
|
uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
|
|
|
uint8_t data;
|
|
|
|
|
|
|
|
i2c_start_transfer(bus, addr, 1);
|
|
|
|
data = i2c_recv(bus);
|
|
|
|
i2c_nack(bus);
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:26 +02:00
|
|
|
void smbus_send_byte(i2c_bus *bus, uint8_t addr, uint8_t data)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
|
|
|
i2c_start_transfer(bus, addr, 0);
|
|
|
|
i2c_send(bus, data);
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:26 +02:00
|
|
|
uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
|
|
|
uint8_t data;
|
|
|
|
i2c_start_transfer(bus, addr, 0);
|
|
|
|
i2c_send(bus, command);
|
|
|
|
i2c_start_transfer(bus, addr, 1);
|
|
|
|
data = i2c_recv(bus);
|
|
|
|
i2c_nack(bus);
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:26 +02:00
|
|
|
void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
|
|
|
i2c_start_transfer(bus, addr, 0);
|
|
|
|
i2c_send(bus, command);
|
|
|
|
i2c_send(bus, data);
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:26 +02:00
|
|
|
uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
|
|
|
uint16_t data;
|
|
|
|
i2c_start_transfer(bus, addr, 0);
|
|
|
|
i2c_send(bus, command);
|
|
|
|
i2c_start_transfer(bus, addr, 1);
|
|
|
|
data = i2c_recv(bus);
|
|
|
|
data |= i2c_recv(bus) << 8;
|
|
|
|
i2c_nack(bus);
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:26 +02:00
|
|
|
void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
|
|
|
i2c_start_transfer(bus, addr, 0);
|
|
|
|
i2c_send(bus, command);
|
|
|
|
i2c_send(bus, data & 0xff);
|
|
|
|
i2c_send(bus, data >> 8);
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:26 +02:00
|
|
|
int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data)
|
2007-05-23 02:03:59 +02:00
|
|
|
{
|
|
|
|
int len;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
i2c_start_transfer(bus, addr, 0);
|
|
|
|
i2c_send(bus, command);
|
|
|
|
i2c_start_transfer(bus, addr, 1);
|
|
|
|
len = i2c_recv(bus);
|
|
|
|
if (len > 32)
|
|
|
|
len = 0;
|
|
|
|
for (i = 0; i < len; i++)
|
|
|
|
data[i] = i2c_recv(bus);
|
|
|
|
i2c_nack(bus);
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
return len;
|
|
|
|
}
|
|
|
|
|
2009-09-29 22:48:26 +02:00
|
|
|
void smbus_write_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data,
|
2007-05-23 02:03:59 +02:00
|
|
|
int len)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (len > 32)
|
|
|
|
len = 32;
|
|
|
|
|
|
|
|
i2c_start_transfer(bus, addr, 0);
|
|
|
|
i2c_send(bus, command);
|
|
|
|
i2c_send(bus, len);
|
|
|
|
for (i = 0; i < len; i++)
|
|
|
|
i2c_send(bus, data[i]);
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
}
|
2011-12-05 03:39:20 +01:00
|
|
|
|
|
|
|
static void smbus_device_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
|
|
|
|
|
|
|
|
sc->init = smbus_device_init;
|
|
|
|
sc->event = smbus_i2c_event;
|
|
|
|
sc->recv = smbus_i2c_recv;
|
|
|
|
sc->send = smbus_i2c_send;
|
|
|
|
}
|
|
|
|
|
2013-01-10 16:19:07 +01:00
|
|
|
static const TypeInfo smbus_device_type_info = {
|
2011-12-05 03:39:20 +01:00
|
|
|
.name = TYPE_SMBUS_DEVICE,
|
|
|
|
.parent = TYPE_I2C_SLAVE,
|
|
|
|
.instance_size = sizeof(SMBusDevice),
|
|
|
|
.abstract = true,
|
|
|
|
.class_size = sizeof(SMBusDeviceClass),
|
|
|
|
.class_init = smbus_device_class_init,
|
|
|
|
};
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
static void smbus_device_register_types(void)
|
2011-12-05 03:39:20 +01:00
|
|
|
{
|
|
|
|
type_register_static(&smbus_device_type_info);
|
|
|
|
}
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
type_init(smbus_device_register_types)
|