2011-02-17 23:45:15 +01:00
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LatticeMico32 target
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--------------------
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General
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-------
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All opcodes including the JUART CSRs are supported.
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JTAG UART
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---------
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JTAG UART is routed to a serial console device. For the current boards it
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is the second one. Ie to enable it in the qemu virtual console window use
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the following command line parameters:
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-serial vc -serial vc
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This will make serial0 (the lm32_uart) and serial1 (the JTAG UART)
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available as virtual consoles.
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2014-04-22 20:18:42 +02:00
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Semihosting
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-----------
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Semihosting on this target is supported. Some system calls like read, write
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and exit are executed on the host if semihosting is enabled. See
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target/lm32-semi.c for all supported system calls. Emulation aware programs
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can use this mechanism to shut down the virtual machine and print to the
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host console. See the tcg tests for an example.
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2011-02-17 23:45:15 +01:00
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Special instructions
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--------------------
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The translation recognizes one special instruction to halt the cpu:
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and r0, r0, r0
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On real hardware this instruction is a nop. It is not used by GCC and
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should (hopefully) not be used within hand-crafted assembly.
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Insert this instruction in your idle loop to reduce the cpu load on the
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host.
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Ignoring the MSB of the address bus
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-----------------------------------
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Some SoC ignores the MSB on the address bus. Thus creating a shadow memory
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area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
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0x80000000-0xffffffff is not cached and used to access IO devices. This
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behaviour can be enabled with:
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cpu_lm32_set_phys_msb_ignore(env, 1);
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