2012-11-14 21:54:06 +01:00
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/*
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* Q35 chipset based pc system emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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* Copyright (c) 2009, 2010
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* Isaku Yamahata <yamahata at valinux co jp>
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* VA Linux Systems Japan K.K.
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* Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
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*
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* This is based on pc.c, but heavily modified.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2018-02-01 12:18:31 +01:00
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2016-01-26 19:17:03 +01:00
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#include "qemu/osdep.h"
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2018-06-29 16:22:13 +02:00
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#include "qemu/units.h"
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2013-08-19 16:26:55 +02:00
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#include "hw/loader.h"
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2012-12-17 18:20:04 +01:00
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#include "sysemu/arch_init.h"
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2018-11-14 01:31:27 +01:00
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#include "hw/i2c/smbus_eeprom.h"
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2019-10-04 01:03:53 +02:00
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#include "hw/rtc/mc146818rtc.h"
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2012-12-17 18:20:04 +01:00
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#include "sysemu/kvm.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/kvm/clock.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/pci-host/q35.h"
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2019-08-12 07:23:51 +02:00
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#include "hw/qdev-properties.h"
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2012-12-17 18:19:49 +01:00
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#include "exec/address-spaces.h"
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2019-10-08 11:56:49 +02:00
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#include "hw/i386/x86.h"
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2016-03-07 20:22:05 +01:00
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#include "hw/i386/pc.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/i386/ich9.h"
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2017-11-25 16:16:10 +01:00
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#include "hw/i386/amd_iommu.h"
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#include "hw/i386/intel_iommu.h"
|
2018-06-13 14:29:46 +02:00
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#include "hw/display/ramfb.h"
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2018-12-11 17:34:06 +01:00
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#include "hw/firmware/smbios.h"
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2012-11-14 21:54:06 +01:00
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#include "hw/ide/pci.h"
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#include "hw/ide/ahci.h"
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#include "hw/usb.h"
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2018-02-01 12:18:31 +01:00
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#include "qapi/error.h"
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2014-06-20 03:40:25 +02:00
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#include "qemu/error-report.h"
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2017-05-02 18:29:55 +02:00
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#include "sysemu/numa.h"
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2020-04-24 14:34:42 +02:00
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#include "hw/hyperv/vmbus-bridge.h"
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hw/i386: Include "hw/mem/nvdimm.h"
All this files use methods/definitions declared in the NVDIMM
device header. Include it.
This fixes (when modifying unrelated headers):
hw/i386/acpi-build.c:2733:9: error: implicit declaration of function 'nvdimm_build_acpi' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
nvdimm_build_acpi(table_offsets, tables_blob, tables->linker,
^
hw/i386/pc.c:1996:61: error: use of undeclared identifier 'TYPE_NVDIMM'
const bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM);
^
hw/i386/pc.c:2032:55: error: use of undeclared identifier 'TYPE_NVDIMM'
bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM);
^
hw/i386/pc.c:2040:9: error: implicit declaration of function 'nvdimm_plug' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
nvdimm_plug(ms->nvdimms_state);
^
hw/i386/pc.c:2040:9: error: this function declaration is not a prototype [-Werror,-Wstrict-prototypes]
nvdimm_plug(ms->nvdimms_state);
^
hw/i386/pc.c:2065:42: error: use of undeclared identifier 'TYPE_NVDIMM'
if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
^
hw/i386/pc_i440fx.c:307:9: error: implicit declaration of function 'nvdimm_init_acpi_state' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
^
hw/i386/pc_q35.c:332:9: error: implicit declaration of function 'nvdimm_init_acpi_state' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
^
Acked-by: John Snow <jsnow@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200228114649.12818-17-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-02-28 12:46:47 +01:00
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#include "hw/mem/nvdimm.h"
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2020-04-21 14:59:29 +02:00
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#include "hw/i386/acpi-build.h"
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2012-11-14 21:54:06 +01:00
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/* ICH9 AHCI has 6 ports */
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#define MAX_SATA_PORTS 6
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|
2018-12-17 17:32:38 +01:00
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struct ehci_companions {
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const char *name;
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int func;
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int port;
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};
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static const struct ehci_companions ich9_1d[] = {
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{ .name = "ich9-usb-uhci1", .func = 0, .port = 0 },
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{ .name = "ich9-usb-uhci2", .func = 1, .port = 2 },
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{ .name = "ich9-usb-uhci3", .func = 2, .port = 4 },
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|
};
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static const struct ehci_companions ich9_1a[] = {
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{ .name = "ich9-usb-uhci4", .func = 0, .port = 0 },
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{ .name = "ich9-usb-uhci5", .func = 1, .port = 2 },
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{ .name = "ich9-usb-uhci6", .func = 2, .port = 4 },
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|
};
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static int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
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|
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{
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|
const struct ehci_companions *comp;
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PCIDevice *ehci, *uhci;
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BusState *usbbus;
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const char *name;
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int i;
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switch (slot) {
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case 0x1d:
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name = "ich9-usb-ehci1";
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comp = ich9_1d;
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break;
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case 0x1a:
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name = "ich9-usb-ehci2";
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comp = ich9_1a;
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break;
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default:
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return -1;
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}
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|
pci: Convert uses of pci_create() etc. with Coccinelle
Replace
dev = pci_create(bus, type_name);
...
qdev_init_nofail(dev);
by
dev = pci_new(type_name);
...
pci_realize_and_unref(dev, bus, &error_fatal);
and similarly for pci_create_multifunction().
Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains
why.
Coccinelle script:
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create(bus, args);
+ dev = pci_new(args);
... when != dev = expr
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
expression d;
@@
- dev = pci_create(bus, args);
+ dev = pci_new(args);
(
d = &dev->qdev;
|
d = DEVICE(dev);
)
... when != dev = expr
- qdev_init_nofail(d);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create(bus, args);
+ dev = pci_new(args);
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = DEVICE(pci_create(bus, args));
+ PCIDevice *pci_dev; // TODO move
+ pci_dev = pci_new(args);
+ dev = DEVICE(pci_dev);
... when != dev = expr
- qdev_init_nofail(dev);
+ pci_realize_and_unref(pci_dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create_multifunction(bus, args);
+ dev = pci_new_multifunction(args);
... when != dev = expr
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, expr;
expression list args;
identifier dev;
@@
- PCIDevice *dev = pci_create_multifunction(bus, args);
+ PCIDevice *dev = pci_new_multifunction(args);
... when != dev = expr
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create_multifunction(bus, args);
+ dev = pci_new_multifunction(args);
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ pci_realize_and_unref(dev, bus, &error_fatal);
Missing #include "qapi/error.h" added manually, whitespace changes
minimized manually, @pci_dev declarations moved manually.
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-16-armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
2020-06-10 07:32:04 +02:00
|
|
|
ehci = pci_new_multifunction(PCI_DEVFN(slot, 7), true, name);
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|
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|
pci_realize_and_unref(ehci, bus, &error_fatal);
|
2018-12-17 17:32:38 +01:00
|
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|
usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
|
|
|
|
|
|
|
|
for (i = 0; i < 3; i++) {
|
pci: Convert uses of pci_create() etc. with Coccinelle
Replace
dev = pci_create(bus, type_name);
...
qdev_init_nofail(dev);
by
dev = pci_new(type_name);
...
pci_realize_and_unref(dev, bus, &error_fatal);
and similarly for pci_create_multifunction().
Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains
why.
Coccinelle script:
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create(bus, args);
+ dev = pci_new(args);
... when != dev = expr
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
expression d;
@@
- dev = pci_create(bus, args);
+ dev = pci_new(args);
(
d = &dev->qdev;
|
d = DEVICE(dev);
)
... when != dev = expr
- qdev_init_nofail(d);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create(bus, args);
+ dev = pci_new(args);
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = DEVICE(pci_create(bus, args));
+ PCIDevice *pci_dev; // TODO move
+ pci_dev = pci_new(args);
+ dev = DEVICE(pci_dev);
... when != dev = expr
- qdev_init_nofail(dev);
+ pci_realize_and_unref(pci_dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create_multifunction(bus, args);
+ dev = pci_new_multifunction(args);
... when != dev = expr
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, expr;
expression list args;
identifier dev;
@@
- PCIDevice *dev = pci_create_multifunction(bus, args);
+ PCIDevice *dev = pci_new_multifunction(args);
... when != dev = expr
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create_multifunction(bus, args);
+ dev = pci_new_multifunction(args);
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ pci_realize_and_unref(dev, bus, &error_fatal);
Missing #include "qapi/error.h" added manually, whitespace changes
minimized manually, @pci_dev declarations moved manually.
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-16-armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
2020-06-10 07:32:04 +02:00
|
|
|
uhci = pci_new_multifunction(PCI_DEVFN(slot, comp[i].func), true,
|
|
|
|
comp[i].name);
|
2018-12-17 17:32:38 +01:00
|
|
|
qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
|
|
|
|
qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
|
pci: Convert uses of pci_create() etc. with Coccinelle
Replace
dev = pci_create(bus, type_name);
...
qdev_init_nofail(dev);
by
dev = pci_new(type_name);
...
pci_realize_and_unref(dev, bus, &error_fatal);
and similarly for pci_create_multifunction().
Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains
why.
Coccinelle script:
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create(bus, args);
+ dev = pci_new(args);
... when != dev = expr
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
expression d;
@@
- dev = pci_create(bus, args);
+ dev = pci_new(args);
(
d = &dev->qdev;
|
d = DEVICE(dev);
)
... when != dev = expr
- qdev_init_nofail(d);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create(bus, args);
+ dev = pci_new(args);
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = DEVICE(pci_create(bus, args));
+ PCIDevice *pci_dev; // TODO move
+ pci_dev = pci_new(args);
+ dev = DEVICE(pci_dev);
... when != dev = expr
- qdev_init_nofail(dev);
+ pci_realize_and_unref(pci_dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create_multifunction(bus, args);
+ dev = pci_new_multifunction(args);
... when != dev = expr
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, expr;
expression list args;
identifier dev;
@@
- PCIDevice *dev = pci_create_multifunction(bus, args);
+ PCIDevice *dev = pci_new_multifunction(args);
... when != dev = expr
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
@@
expression dev, bus, expr;
expression list args;
@@
- dev = pci_create_multifunction(bus, args);
+ dev = pci_new_multifunction(args);
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ pci_realize_and_unref(dev, bus, &error_fatal);
Missing #include "qapi/error.h" added manually, whitespace changes
minimized manually, @pci_dev declarations moved manually.
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-16-armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
2020-06-10 07:32:04 +02:00
|
|
|
pci_realize_and_unref(uhci, bus, &error_fatal);
|
2018-12-17 17:32:38 +01:00
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-11-14 21:54:06 +01:00
|
|
|
/* PC hardware initialisation */
|
2014-05-07 16:42:57 +02:00
|
|
|
static void pc_q35_init(MachineState *machine)
|
2012-11-14 21:54:06 +01:00
|
|
|
{
|
2015-08-07 21:55:45 +02:00
|
|
|
PCMachineState *pcms = PC_MACHINE(machine);
|
2015-12-01 23:58:03 +01:00
|
|
|
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
2019-10-22 09:39:50 +02:00
|
|
|
X86MachineState *x86ms = X86_MACHINE(machine);
|
2012-11-14 21:54:06 +01:00
|
|
|
Q35PCIHost *q35_host;
|
2013-07-01 12:18:22 +02:00
|
|
|
PCIHostState *phb;
|
2012-11-14 21:54:06 +01:00
|
|
|
PCIBus *host_bus;
|
|
|
|
PCIDevice *lpc;
|
2016-06-22 14:24:54 +02:00
|
|
|
DeviceState *lpc_dev;
|
2012-11-14 21:54:06 +01:00
|
|
|
BusState *idebus[MAX_SATA_PORTS];
|
|
|
|
ISADevice *rtc_state;
|
2016-03-04 17:00:32 +01:00
|
|
|
MemoryRegion *system_io = get_system_io();
|
2012-11-14 21:54:06 +01:00
|
|
|
MemoryRegion *pci_memory;
|
|
|
|
MemoryRegion *rom_memory;
|
|
|
|
MemoryRegion *ram_memory;
|
|
|
|
GSIState *gsi_state;
|
|
|
|
ISABus *isa_bus;
|
|
|
|
int i;
|
|
|
|
ICH9LPCState *ich9_lpc;
|
|
|
|
PCIDevice *ahci;
|
2014-06-20 03:40:25 +02:00
|
|
|
ram_addr_t lowmem;
|
2014-10-01 20:19:29 +02:00
|
|
|
DriveInfo *hd[MAX_SATA_PORTS];
|
2015-05-28 22:04:10 +02:00
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
2013-04-29 17:02:50 +02:00
|
|
|
|
2013-12-16 12:55:06 +01:00
|
|
|
/* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
|
|
|
|
* and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
|
|
|
|
* also known as MMCFG).
|
|
|
|
* If it doesn't, we need to split it in chunks below and above 4G.
|
|
|
|
* In any case, try to make sure that guest addresses aligned at
|
|
|
|
* 1G boundaries get mapped to host addresses aligned at 1G boundaries.
|
|
|
|
*/
|
2014-05-07 16:42:57 +02:00
|
|
|
if (machine->ram_size >= 0xb0000000) {
|
2016-01-23 17:02:13 +01:00
|
|
|
lowmem = 0x80000000;
|
2014-06-20 03:40:25 +02:00
|
|
|
} else {
|
|
|
|
lowmem = 0xb0000000;
|
|
|
|
}
|
|
|
|
|
2014-07-07 21:00:41 +02:00
|
|
|
/* Handle the machine opt max-ram-below-4g. It is basically doing
|
2014-06-20 03:40:25 +02:00
|
|
|
* min(qemu limit, user limit).
|
|
|
|
*/
|
2020-05-29 09:39:56 +02:00
|
|
|
if (!pcms->max_ram_below_4g) {
|
|
|
|
pcms->max_ram_below_4g = 4 * GiB;
|
2016-06-24 13:35:17 +02:00
|
|
|
}
|
2020-05-29 09:39:56 +02:00
|
|
|
if (lowmem > pcms->max_ram_below_4g) {
|
|
|
|
lowmem = pcms->max_ram_below_4g;
|
2014-06-20 03:40:25 +02:00
|
|
|
if (machine->ram_size - lowmem > lowmem &&
|
2018-06-29 16:22:13 +02:00
|
|
|
lowmem & (1 * GiB - 1)) {
|
2017-09-11 21:52:43 +02:00
|
|
|
warn_report("There is possibly poor performance as the ram size "
|
|
|
|
" (0x%" PRIx64 ") is more then twice the size of"
|
|
|
|
" max-ram-below-4g (%"PRIu64") and"
|
|
|
|
" max-ram-below-4g is not a multiple of 1G.",
|
2020-05-29 09:39:56 +02:00
|
|
|
(uint64_t)machine->ram_size, pcms->max_ram_below_4g);
|
2014-06-20 03:40:25 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (machine->ram_size >= lowmem) {
|
2019-10-22 09:39:50 +02:00
|
|
|
x86ms->above_4g_mem_size = machine->ram_size - lowmem;
|
|
|
|
x86ms->below_4g_mem_size = lowmem;
|
2012-11-14 21:54:06 +01:00
|
|
|
} else {
|
2019-10-22 09:39:50 +02:00
|
|
|
x86ms->above_4g_mem_size = 0;
|
|
|
|
x86ms->below_4g_mem_size = machine->ram_size;
|
2012-11-14 21:54:06 +01:00
|
|
|
}
|
|
|
|
|
2019-09-30 17:26:29 +02:00
|
|
|
x86_cpus_init(x86ms, pcmc->default_cpu_version);
|
2014-06-20 03:40:24 +02:00
|
|
|
|
2020-09-22 17:19:34 +02:00
|
|
|
kvmclock_create(pcmc->kvmclock_create_always);
|
2014-06-20 03:40:24 +02:00
|
|
|
|
2012-11-14 21:54:06 +01:00
|
|
|
/* pci enabled */
|
2015-12-01 23:58:03 +01:00
|
|
|
if (pcmc->pci_enabled) {
|
2012-11-14 21:54:06 +01:00
|
|
|
pci_memory = g_new(MemoryRegion, 1);
|
2013-11-06 19:18:08 +01:00
|
|
|
memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
|
2012-11-14 21:54:06 +01:00
|
|
|
rom_memory = pci_memory;
|
|
|
|
} else {
|
|
|
|
pci_memory = NULL;
|
|
|
|
rom_memory = get_system_memory();
|
|
|
|
}
|
|
|
|
|
2015-12-11 19:42:30 +01:00
|
|
|
pc_guest_info_init(pcms);
|
pc: hack for migration compatibility from QEMU 2.0
Changing the ACPI table size causes migration to break, and the memory
hotplug work opened our eyes on how horribly we were breaking things in
2.0 already.
The ACPI table size is rounded to the next 4k, which one would think
gives some headroom. In practice this is not the case, because the user
can control the ACPI table size (each CPU adds 97 bytes to the SSDT and
8 to the MADT) and so some "-smp" values will break the 4k boundary and
fail to migrate. Similarly, PCI bridges add ~1870 bytes to the SSDT.
This patch concerns itself with fixing migration from QEMU 2.0. It
computes the payload size of QEMU 2.0 and always uses that one.
The previous patch shrunk the ACPI tables enough that the QEMU 2.0 size
should always be enough; non-AML tables can change depending on the
configuration (especially MADT, SRAT, HPET) but they remain the same
between QEMU 2.0 and 2.1, so we only compute our padding based on the
sizes of the SSDT and DSDT.
Migration from QEMU 1.7 should work for guests that have a number of CPUs
other than 12, 13, 14, 54, 55, 56, 97, 98, 139, 140. It was already
broken from QEMU 1.7 to QEMU 2.0 in the same way, though.
Even with this patch, QEMU 1.7 and 2.0 have two different ideas of
"-M pc-i440fx-2.0" when there are PCI bridges. Igor sent a patch to
adopt the QEMU 1.7 definition. I think distributions should apply
it if they move directly from QEMU 1.7 to 2.1+ without ever packaging
version 2.0.
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2014-07-28 17:34:15 +02:00
|
|
|
|
2015-12-01 23:58:03 +01:00
|
|
|
if (pcmc->smbios_defaults) {
|
2013-10-30 13:56:40 +01:00
|
|
|
/* These values are guest ABI, do not change */
|
2014-04-23 15:42:38 +02:00
|
|
|
smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
|
2015-12-01 23:58:03 +01:00
|
|
|
mc->name, pcmc->smbios_legacy_mode,
|
|
|
|
pcmc->smbios_uuid_encoded,
|
2015-09-07 11:39:28 +02:00
|
|
|
SMBIOS_ENTRY_POINT_21);
|
2013-10-30 13:56:40 +01:00
|
|
|
}
|
|
|
|
|
2012-11-14 21:54:06 +01:00
|
|
|
/* allocate ram and load rom/bios */
|
2020-07-22 10:25:17 +02:00
|
|
|
pc_memory_init(pcms, get_system_memory(), rom_memory, &ram_memory);
|
2012-11-14 21:54:06 +01:00
|
|
|
|
|
|
|
/* create pci host bus */
|
qdev: Convert uses of qdev_create() with Coccinelle
This is the transformation explained in the commit before previous.
Takes care of just one pattern that needs conversion. More to come in
this series.
Coccinelle script:
@ depends on !(file in "hw/arm/highbank.c")@
expression bus, type_name, dev, expr;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr;
identifier DOWN;
@@
- dev = DOWN(qdev_create(bus, type_name));
+ dev = DOWN(qdev_new(type_name));
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal);
@@
expression bus, type_name, expr;
identifier dev;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr, errp;
symbol true;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
@@
expression bus, type_name, expr, errp;
identifier dev;
symbol true;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
The first rule exempts hw/arm/highbank.c, because it matches along two
control flow paths there, with different @type_name. Covered by the
next commit's manual conversions.
Missing #include "qapi/error.h" added manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-10-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:31:58 +02:00
|
|
|
q35_host = Q35_HOST_DEVICE(qdev_new(TYPE_Q35_HOST_DEVICE));
|
2012-11-14 21:54:06 +01:00
|
|
|
|
qom: Drop parameter @errp of object_property_add() & friends
The only way object_property_add() can fail is when a property with
the same name already exists. Since our property names are all
hardcoded, failure is a programming error, and the appropriate way to
handle it is passing &error_abort.
Same for its variants, except for object_property_add_child(), which
additionally fails when the child already has a parent. Parentage is
also under program control, so this is a programming error, too.
We have a bit over 500 callers. Almost half of them pass
&error_abort, slightly fewer ignore errors, one test case handles
errors, and the remaining few callers pass them to their own callers.
The previous few commits demonstrated once again that ignoring
programming errors is a bad idea.
Of the few ones that pass on errors, several violate the Error API.
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call. ich9_pm_add_properties(), sparc32_ledma_realize(),
sparc32_dma_realize(), xilinx_axidma_realize(), xilinx_enet_realize()
are wrong that way.
When the one appropriate choice of argument is &error_abort, letting
users pick the argument is a bad idea.
Drop parameter @errp and assert the preconditions instead.
There's one exception to "duplicate property name is a programming
error": the way object_property_add() implements the magic (and
undocumented) "automatic arrayification". Don't drop @errp there.
Instead, rename object_property_add() to object_property_try_add(),
and add the obvious wrapper object_property_add().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200505152926.18877-15-armbru@redhat.com>
[Two semantic rebase conflicts resolved]
2020-05-05 17:29:22 +02:00
|
|
|
object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host));
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_RAM_MEM,
|
|
|
|
OBJECT(ram_memory), NULL);
|
|
|
|
object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_PCI_MEM,
|
|
|
|
OBJECT(pci_memory), NULL);
|
|
|
|
object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_SYSTEM_MEM,
|
|
|
|
OBJECT(get_system_memory()), NULL);
|
|
|
|
object_property_set_link(OBJECT(q35_host), MCH_HOST_PROP_IO_MEM,
|
|
|
|
OBJECT(system_io), NULL);
|
|
|
|
object_property_set_int(OBJECT(q35_host), PCI_HOST_BELOW_4G_MEM_SIZE,
|
|
|
|
x86ms->below_4g_mem_size, NULL);
|
|
|
|
object_property_set_int(OBJECT(q35_host), PCI_HOST_ABOVE_4G_MEM_SIZE,
|
|
|
|
x86ms->above_4g_mem_size, NULL);
|
2012-11-14 21:54:06 +01:00
|
|
|
/* pci */
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:32:34 +02:00
|
|
|
sysbus_realize_and_unref(SYS_BUS_DEVICE(q35_host), &error_fatal);
|
2013-07-01 12:18:22 +02:00
|
|
|
phb = PCI_HOST_BRIDGE(q35_host);
|
|
|
|
host_bus = phb->bus;
|
2012-11-14 21:54:06 +01:00
|
|
|
/* create ISA bus */
|
|
|
|
lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
|
|
|
|
ICH9_LPC_FUNC), true,
|
|
|
|
TYPE_ICH9_LPC_DEVICE);
|
2014-06-02 15:25:24 +02:00
|
|
|
|
|
|
|
object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
|
|
|
|
TYPE_HOTPLUG_HANDLER,
|
2020-09-15 14:09:02 +02:00
|
|
|
(Object **)&x86ms->acpi_dev,
|
2014-06-02 15:25:24 +02:00
|
|
|
object_property_allow_set_link,
|
qom: Drop parameter @errp of object_property_add() & friends
The only way object_property_add() can fail is when a property with
the same name already exists. Since our property names are all
hardcoded, failure is a programming error, and the appropriate way to
handle it is passing &error_abort.
Same for its variants, except for object_property_add_child(), which
additionally fails when the child already has a parent. Parentage is
also under program control, so this is a programming error, too.
We have a bit over 500 callers. Almost half of them pass
&error_abort, slightly fewer ignore errors, one test case handles
errors, and the remaining few callers pass them to their own callers.
The previous few commits demonstrated once again that ignoring
programming errors is a bad idea.
Of the few ones that pass on errors, several violate the Error API.
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call. ich9_pm_add_properties(), sparc32_ledma_realize(),
sparc32_dma_realize(), xilinx_axidma_realize(), xilinx_enet_realize()
are wrong that way.
When the one appropriate choice of argument is &error_abort, letting
users pick the argument is a bad idea.
Drop parameter @errp and assert the preconditions instead.
There's one exception to "duplicate property name is a programming
error": the way object_property_add() implements the magic (and
undocumented) "automatic arrayification". Don't drop @errp there.
Instead, rename object_property_add() to object_property_try_add(),
and add the obvious wrapper object_property_add().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200505152926.18877-15-armbru@redhat.com>
[Two semantic rebase conflicts resolved]
2020-05-05 17:29:22 +02:00
|
|
|
OBJ_PROP_LINK_STRONG);
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
|
|
|
|
OBJECT(lpc), &error_abort);
|
2014-06-02 15:25:24 +02:00
|
|
|
|
2019-10-18 15:59:08 +02:00
|
|
|
/* irq lines */
|
|
|
|
gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
|
|
|
|
|
2012-11-14 21:54:06 +01:00
|
|
|
ich9_lpc = ICH9_LPC_DEVICE(lpc);
|
2016-06-22 14:24:54 +02:00
|
|
|
lpc_dev = DEVICE(lpc);
|
|
|
|
for (i = 0; i < GSI_NUM_PINS; i++) {
|
2019-10-22 09:39:50 +02:00
|
|
|
qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
|
2016-06-22 14:24:54 +02:00
|
|
|
}
|
2012-11-14 21:54:06 +01:00
|
|
|
pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
|
|
|
|
ICH9_LPC_NB_PIRQS);
|
2013-01-23 03:11:37 +01:00
|
|
|
pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
|
2012-11-14 21:54:06 +01:00
|
|
|
isa_bus = ich9_lpc->isa_bus;
|
|
|
|
|
2019-10-18 15:59:09 +02:00
|
|
|
pc_i8259_create(isa_bus, gsi_state->i8259_irq);
|
2016-07-14 14:27:17 +02:00
|
|
|
|
2015-12-01 23:58:03 +01:00
|
|
|
if (pcmc->pci_enabled) {
|
2014-08-04 23:11:19 +02:00
|
|
|
ioapic_init_gsi(gsi_state, "q35");
|
2012-11-14 21:54:06 +01:00
|
|
|
}
|
|
|
|
|
2019-10-16 10:18:10 +02:00
|
|
|
if (tcg_enabled()) {
|
|
|
|
x86_register_ferr_irq(x86ms->gsi[13]);
|
|
|
|
}
|
2012-11-14 21:54:06 +01:00
|
|
|
|
qapi: Don't let implicit enum MAX member collide
Now that we guarantee the user doesn't have any enum values
beginning with a single underscore, we can use that for our
own purposes. Renaming ENUM_MAX to ENUM__MAX makes it obvious
that the sentinel is generated.
This patch was mostly generated by applying a temporary patch:
|diff --git a/scripts/qapi.py b/scripts/qapi.py
|index e6d014b..b862ec9 100644
|--- a/scripts/qapi.py
|+++ b/scripts/qapi.py
|@@ -1570,6 +1570,7 @@ const char *const %(c_name)s_lookup[] = {
| max_index = c_enum_const(name, 'MAX', prefix)
| ret += mcgen('''
| [%(max_index)s] = NULL,
|+// %(max_index)s
| };
| ''',
| max_index=max_index)
then running:
$ cat qapi-{types,event}.c tests/test-qapi-types.c |
sed -n 's,^// \(.*\)MAX,s|\1MAX|\1_MAX|g,p' > list
$ git grep -l _MAX | xargs sed -i -f list
The only things not generated are the changes in scripts/qapi.py.
Rejecting enum members named 'MAX' is now useless, and will be dropped
in the next patch.
Signed-off-by: Eric Blake <eblake@redhat.com>
Message-Id: <1447836791-369-23-git-send-email-eblake@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
[Rebased to current master, commit message tweaked]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-11-18 09:52:57 +01:00
|
|
|
assert(pcms->vmport != ON_OFF_AUTO__MAX);
|
2015-08-07 21:55:45 +02:00
|
|
|
if (pcms->vmport == ON_OFF_AUTO_AUTO) {
|
2020-07-22 10:25:17 +02:00
|
|
|
pcms->vmport = ON_OFF_AUTO_ON;
|
2014-11-21 17:18:52 +01:00
|
|
|
}
|
|
|
|
|
2012-11-14 21:54:06 +01:00
|
|
|
/* init basic PC hardware */
|
2020-07-02 15:25:16 +02:00
|
|
|
pc_basic_device_init(pcms, isa_bus, x86ms->gsi, &rtc_state, !mc->no_floppy,
|
2016-11-05 08:19:50 +01:00
|
|
|
0xff0104);
|
2012-11-14 21:54:06 +01:00
|
|
|
|
|
|
|
/* connect pm stuff to lpc */
|
2019-12-12 17:28:01 +01:00
|
|
|
ich9_lpc_pm_init(lpc, x86_machine_is_smm_enabled(x86ms));
|
2012-11-14 21:54:06 +01:00
|
|
|
|
2018-11-07 16:24:34 +01:00
|
|
|
if (pcms->sata_enabled) {
|
2016-11-05 08:19:49 +01:00
|
|
|
/* ahci and SATA device, for q35 1 ahci controller is built-in */
|
|
|
|
ahci = pci_create_simple_multifunction(host_bus,
|
|
|
|
PCI_DEVFN(ICH9_SATA1_DEV,
|
|
|
|
ICH9_SATA1_FUNC),
|
|
|
|
true, "ich9-ahci");
|
|
|
|
idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
|
|
|
|
idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
|
2017-07-18 17:47:56 +02:00
|
|
|
g_assert(MAX_SATA_PORTS == ahci_get_num_ports(ahci));
|
|
|
|
ide_drive_get(hd, ahci_get_num_ports(ahci));
|
2016-11-05 08:19:49 +01:00
|
|
|
ahci_ide_create_devs(ahci, hd);
|
|
|
|
} else {
|
|
|
|
idebus[0] = idebus[1] = NULL;
|
|
|
|
}
|
2012-11-14 21:54:06 +01:00
|
|
|
|
2016-06-08 22:50:25 +02:00
|
|
|
if (machine_usb(machine)) {
|
2012-11-14 21:54:06 +01:00
|
|
|
/* Should we create 6 UHCI according to ich9 spec? */
|
|
|
|
ehci_create_ich9_with_companions(host_bus, 0x1d);
|
|
|
|
}
|
|
|
|
|
2018-11-07 16:24:34 +01:00
|
|
|
if (pcms->smbus_enabled) {
|
2016-11-05 08:19:48 +01:00
|
|
|
/* TODO: Populate SPD eeprom data. */
|
2016-05-13 03:43:45 +02:00
|
|
|
pcms->smbus = ich9_smb_init(host_bus,
|
|
|
|
PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
|
|
|
|
0xb100);
|
|
|
|
smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
|
2016-11-05 08:19:48 +01:00
|
|
|
}
|
2012-11-14 21:54:06 +01:00
|
|
|
|
2015-08-07 21:55:54 +02:00
|
|
|
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
|
2012-11-14 21:54:06 +01:00
|
|
|
|
|
|
|
/* the rest devices to which pci devfn is automatically assigned */
|
|
|
|
pc_vga_init(isa_bus, host_bus);
|
2018-03-02 10:29:06 +01:00
|
|
|
pc_nic_init(pcmc, isa_bus, host_bus);
|
2016-03-04 17:00:32 +01:00
|
|
|
|
2019-03-08 19:20:53 +01:00
|
|
|
if (machine->nvdimms_state->is_enabled) {
|
|
|
|
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
|
2020-04-21 14:59:29 +02:00
|
|
|
x86_nvdimm_acpi_dsmio,
|
2019-10-22 09:39:50 +02:00
|
|
|
x86ms->fw_cfg, OBJECT(pcms));
|
2016-03-04 17:00:32 +01:00
|
|
|
}
|
2012-11-14 21:54:06 +01:00
|
|
|
}
|
|
|
|
|
2015-05-15 19:19:01 +02:00
|
|
|
#define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
|
|
|
|
static void pc_init_##suffix(MachineState *machine) \
|
|
|
|
{ \
|
|
|
|
void (*compat)(MachineState *m) = (compatfn); \
|
|
|
|
if (compat) { \
|
|
|
|
compat(machine); \
|
|
|
|
} \
|
|
|
|
pc_q35_init(machine); \
|
|
|
|
} \
|
|
|
|
DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
|
2014-04-24 12:14:53 +02:00
|
|
|
|
pc: Kill the "use flash device for BIOS unless KVM" misfeature
Use of a flash memory device for the BIOS was added in series "[PATCH
v10 0/8] PC system flash support", commit 4732dca..1b89faf, v1.1.
Flash vs. ROM is a guest-visible difference. Thus, flash use had to
be suppressed for machine types pc-1.0 and older. This was
accomplished by adding a dummy device "pc-sysfw" with property
"rom_only":
* Non-zero rom_only means "use ROM". Default for pc-1.0 and older.
* Zero rom_only means "maybe use flash". Default for newer machines.
Not only is the dummy device ugly, it was also retroactively added to
the older machine types! Fortunately, it's not guest-visible (thus no
immediate guest ABI breakage), and has no vmstate (thus no immediate
migration breakage). Breakage occurs only if the user unwisely
enables flash by setting rom_only to zero. Patch review FAIL #1.
Why "maybe use flash"? Flash didn't (and still doesn't) work with
KVM. Therefore, rom_only=0 really means "use flash, except when KVM
is enabled, use ROM". This is a Bad Idea, because it makes enabling/
disabling KVM guest-visible. Patch review FAIL #2.
Aside: it also precludes migrating between KVM on and off, but that's
not possible for other reasons anyway.
Fix as follows:
1. Change the meaning of rom_only=0 to mean "use flash, no ifs, buts,
or maybes" for pc-i440fx-1.5 and pc-q35-1.5. Don't change anything
for older machines (to remain bug-compatible).
2. Change the default value from 0 to 1 for these machines.
Necessary, because 0 doesn't work with KVM. Once it does, we can flip
the default back to 0.
3. Don't revert the retroactive addition of device "pc-sysfw" to older
machine types. Seems not worth the trouble.
4. Add a TODO comment asking for device "pc-sysfw" to be dropped once
flash works with KVM.
Net effect is that you get a BIOS ROM again even when KVM is disabled,
just like for machines predating the introduction of flash.
To get flash instead, use "--global pc-sysfw.rom_only=0".
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id: 1365780303-26398-4-git-send-email-armbru@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-12 17:25:03 +02:00
|
|
|
|
2015-05-15 19:18:56 +02:00
|
|
|
static void pc_q35_machine_options(MachineClass *m)
|
2015-05-15 19:18:54 +02:00
|
|
|
{
|
2018-03-02 10:29:06 +01:00
|
|
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
|
|
|
|
pcmc->default_nic_model = "e1000e";
|
2021-03-01 20:59:18 +01:00
|
|
|
pcmc->pci_root_uid = 0;
|
2018-03-02 10:29:06 +01:00
|
|
|
|
2015-05-15 19:18:54 +02:00
|
|
|
m->family = "pc_q35";
|
|
|
|
m->desc = "Standard PC (Q35 + ICH9, 2009)";
|
|
|
|
m->units_per_default_bus = 1;
|
2015-09-11 22:14:23 +02:00
|
|
|
m->default_machine_opts = "firmware=bios-256k.bin";
|
|
|
|
m->default_display = "std";
|
2019-05-14 22:14:41 +02:00
|
|
|
m->default_kernel_irqchip_split = false;
|
2015-09-11 22:14:23 +02:00
|
|
|
m->no_floppy = 1;
|
2017-11-25 16:16:10 +01:00
|
|
|
machine_class_allow_dynamic_sysbus_dev(m, TYPE_AMD_IOMMU_DEVICE);
|
|
|
|
machine_class_allow_dynamic_sysbus_dev(m, TYPE_INTEL_IOMMU_DEVICE);
|
2018-06-13 14:29:46 +02:00
|
|
|
machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
|
2020-04-24 14:34:42 +02:00
|
|
|
machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
|
2016-10-19 14:05:43 +02:00
|
|
|
m->max_cpus = 288;
|
2015-05-15 19:18:54 +02:00
|
|
|
}
|
|
|
|
|
2020-11-09 18:39:28 +01:00
|
|
|
static void pc_q35_6_0_machine_options(MachineClass *m)
|
2015-09-11 22:14:25 +02:00
|
|
|
{
|
2019-06-28 02:28:42 +02:00
|
|
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
|
2015-09-11 22:14:25 +02:00
|
|
|
pc_q35_machine_options(m);
|
|
|
|
m->alias = "q35";
|
2019-06-28 02:28:42 +02:00
|
|
|
pcmc->default_cpu_version = 1;
|
2017-09-06 16:26:57 +02:00
|
|
|
}
|
|
|
|
|
2020-11-09 18:39:28 +01:00
|
|
|
DEFINE_Q35_MACHINE(v6_0, "pc-q35-6.0", NULL,
|
|
|
|
pc_q35_6_0_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_5_2_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_6_0_machine_options(m);
|
|
|
|
m->alias = NULL;
|
|
|
|
compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
|
|
|
|
}
|
|
|
|
|
2020-08-19 16:40:16 +02:00
|
|
|
DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL,
|
|
|
|
pc_q35_5_2_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_5_1_machine_options(MachineClass *m)
|
|
|
|
{
|
2020-09-22 17:19:34 +02:00
|
|
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
|
|
|
|
|
2020-08-19 16:40:16 +02:00
|
|
|
pc_q35_5_2_machine_options(m);
|
|
|
|
m->alias = NULL;
|
|
|
|
compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
|
2020-09-22 17:19:34 +02:00
|
|
|
pcmc->kvmclock_create_always = false;
|
2021-03-01 20:59:18 +01:00
|
|
|
pcmc->pci_root_uid = 1;
|
2020-08-19 16:40:16 +02:00
|
|
|
}
|
|
|
|
|
2020-04-29 16:46:05 +02:00
|
|
|
DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL,
|
|
|
|
pc_q35_5_1_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_5_0_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_5_1_machine_options(m);
|
|
|
|
m->alias = NULL;
|
2020-06-09 15:56:35 +02:00
|
|
|
m->numa_mem_supported = true;
|
2020-04-29 16:46:05 +02:00
|
|
|
compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
|
2020-08-20 11:48:28 +02:00
|
|
|
m->auto_enable_numa_with_memdev = false;
|
2020-04-29 16:46:05 +02:00
|
|
|
}
|
|
|
|
|
2019-11-12 11:48:11 +01:00
|
|
|
DEFINE_Q35_MACHINE(v5_0, "pc-q35-5.0", NULL,
|
|
|
|
pc_q35_5_0_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_4_2_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_5_0_machine_options(m);
|
|
|
|
m->alias = NULL;
|
|
|
|
compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
|
|
|
|
}
|
|
|
|
|
2019-07-24 12:35:24 +02:00
|
|
|
DEFINE_Q35_MACHINE(v4_2, "pc-q35-4.2", NULL,
|
|
|
|
pc_q35_4_2_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_4_1_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_4_2_machine_options(m);
|
|
|
|
m->alias = NULL;
|
|
|
|
compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
|
|
|
|
}
|
|
|
|
|
2019-04-11 12:20:25 +02:00
|
|
|
DEFINE_Q35_MACHINE(v4_1, "pc-q35-4.1", NULL,
|
|
|
|
pc_q35_4_1_machine_options);
|
|
|
|
|
2019-05-14 22:14:41 +02:00
|
|
|
static void pc_q35_4_0_1_machine_options(MachineClass *m)
|
2019-04-11 12:20:25 +02:00
|
|
|
{
|
2019-06-28 02:28:42 +02:00
|
|
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
|
2019-04-11 12:20:25 +02:00
|
|
|
pc_q35_4_1_machine_options(m);
|
|
|
|
m->alias = NULL;
|
2019-06-28 02:28:42 +02:00
|
|
|
pcmc->default_cpu_version = CPU_VERSION_LEGACY;
|
2019-06-14 15:09:02 +02:00
|
|
|
/*
|
|
|
|
* This is the default machine for the 4.0-stable branch. It is basically
|
|
|
|
* a 4.0 that doesn't use split irqchip by default. It MUST hence apply the
|
|
|
|
* 4.0 compat props.
|
|
|
|
*/
|
|
|
|
compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
|
2019-05-14 22:14:41 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
DEFINE_Q35_MACHINE(v4_0_1, "pc-q35-4.0.1", NULL,
|
|
|
|
pc_q35_4_0_1_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_4_0_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_4_0_1_machine_options(m);
|
|
|
|
m->default_kernel_irqchip_split = true;
|
|
|
|
m->alias = NULL;
|
2019-06-14 15:09:02 +02:00
|
|
|
/* Compat props are applied by the 4.0.1 machine */
|
2019-04-11 12:20:25 +02:00
|
|
|
}
|
|
|
|
|
2018-12-04 17:27:16 +01:00
|
|
|
DEFINE_Q35_MACHINE(v4_0, "pc-q35-4.0", NULL,
|
|
|
|
pc_q35_4_0_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_3_1_machine_options(MachineClass *m)
|
|
|
|
{
|
2019-01-22 13:10:48 +01:00
|
|
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
|
|
|
|
|
2018-12-04 17:27:16 +01:00
|
|
|
pc_q35_4_0_machine_options(m);
|
2018-12-20 06:40:35 +01:00
|
|
|
m->default_kernel_irqchip_split = false;
|
2016-05-13 03:43:45 +02:00
|
|
|
pcmc->do_not_add_smb_acpi = true;
|
2018-11-14 21:41:01 +01:00
|
|
|
m->smbus_no_migration_support = true;
|
2018-12-04 17:27:16 +01:00
|
|
|
m->alias = NULL;
|
2019-01-22 13:10:48 +01:00
|
|
|
pcmc->pvh_enabled = false;
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
|
2018-12-04 17:27:16 +01:00
|
|
|
}
|
|
|
|
|
2018-11-20 14:26:04 +01:00
|
|
|
DEFINE_Q35_MACHINE(v3_1, "pc-q35-3.1", NULL,
|
|
|
|
pc_q35_3_1_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_3_0_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_3_1_machine_options(m);
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
|
2018-11-20 14:26:04 +01:00
|
|
|
}
|
|
|
|
|
2018-05-22 12:39:57 +02:00
|
|
|
DEFINE_Q35_MACHINE(v3_0, "pc-q35-3.0", NULL,
|
|
|
|
pc_q35_3_0_machine_options);
|
2018-05-14 18:41:50 +02:00
|
|
|
|
|
|
|
static void pc_q35_2_12_machine_options(MachineClass *m)
|
|
|
|
{
|
2018-05-22 12:39:57 +02:00
|
|
|
pc_q35_3_0_machine_options(m);
|
2018-12-12 16:36:30 +01:00
|
|
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compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
|
2018-05-14 18:41:50 +02:00
|
|
|
}
|
|
|
|
|
2017-12-19 04:37:29 +01:00
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DEFINE_Q35_MACHINE(v2_12, "pc-q35-2.12", NULL,
|
|
|
|
pc_q35_2_12_machine_options);
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|
|
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|
|
|
|
static void pc_q35_2_11_machine_options(MachineClass *m)
|
|
|
|
{
|
2018-03-02 10:29:06 +01:00
|
|
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
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|
|
|
|
2017-12-19 04:37:29 +01:00
|
|
|
pc_q35_2_12_machine_options(m);
|
2018-03-02 10:29:06 +01:00
|
|
|
pcmc->default_nic_model = "e1000";
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
|
2017-12-19 04:37:29 +01:00
|
|
|
}
|
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|
2017-09-06 16:26:57 +02:00
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|
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DEFINE_Q35_MACHINE(v2_11, "pc-q35-2.11", NULL,
|
|
|
|
pc_q35_2_11_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_2_10_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_2_11_machine_options(m);
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
|
2017-11-14 03:34:01 +01:00
|
|
|
m->auto_enable_numa_with_memhp = false;
|
2015-09-11 22:14:25 +02:00
|
|
|
}
|
|
|
|
|
2017-04-25 11:49:13 +02:00
|
|
|
DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL,
|
|
|
|
pc_q35_2_10_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_2_9_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_2_10_machine_options(m);
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
|
2017-04-25 11:49:13 +02:00
|
|
|
}
|
|
|
|
|
2017-01-12 19:24:16 +01:00
|
|
|
DEFINE_Q35_MACHINE(v2_9, "pc-q35-2.9", NULL,
|
|
|
|
pc_q35_2_9_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_2_8_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_2_9_machine_options(m);
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
|
2017-01-12 19:24:16 +01:00
|
|
|
}
|
|
|
|
|
2016-09-07 07:21:12 +02:00
|
|
|
DEFINE_Q35_MACHINE(v2_8, "pc-q35-2.8", NULL,
|
|
|
|
pc_q35_2_8_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_2_7_machine_options(MachineClass *m)
|
|
|
|
{
|
|
|
|
pc_q35_2_8_machine_options(m);
|
2016-10-19 14:05:43 +02:00
|
|
|
m->max_cpus = 255;
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
|
2016-09-07 07:21:12 +02:00
|
|
|
}
|
|
|
|
|
2016-05-17 16:43:10 +02:00
|
|
|
DEFINE_Q35_MACHINE(v2_7, "pc-q35-2.7", NULL,
|
|
|
|
pc_q35_2_7_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_2_6_machine_options(MachineClass *m)
|
|
|
|
{
|
2016-06-15 11:25:23 +02:00
|
|
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
|
2018-12-12 15:01:23 +01:00
|
|
|
|
2016-05-17 16:43:10 +02:00
|
|
|
pc_q35_2_7_machine_options(m);
|
2016-06-15 11:25:23 +02:00
|
|
|
pcmc->legacy_cpu_hotplug = true;
|
2017-04-25 17:37:50 +02:00
|
|
|
pcmc->linuxboot_dma_enabled = false;
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
|
2016-05-17 16:43:10 +02:00
|
|
|
}
|
|
|
|
|
2015-11-30 15:56:36 +01:00
|
|
|
DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL,
|
|
|
|
pc_q35_2_6_machine_options);
|
|
|
|
|
|
|
|
static void pc_q35_2_5_machine_options(MachineClass *m)
|
|
|
|
{
|
2019-11-18 12:13:25 +01:00
|
|
|
X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
|
2018-12-12 15:01:23 +01:00
|
|
|
|
2015-11-30 15:56:36 +01:00
|
|
|
pc_q35_2_6_machine_options(m);
|
2019-11-18 12:13:25 +01:00
|
|
|
x86mc->save_tsc_khz = false;
|
2016-04-07 16:12:58 +02:00
|
|
|
m->legacy_fw_cfg_order = 1;
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
|
2015-11-30 15:56:36 +01:00
|
|
|
}
|
|
|
|
|
2015-09-11 22:14:25 +02:00
|
|
|
DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL,
|
|
|
|
pc_q35_2_5_machine_options);
|
|
|
|
|
2015-05-15 19:18:56 +02:00
|
|
|
static void pc_q35_2_4_machine_options(MachineClass *m)
|
2015-05-15 19:18:54 +02:00
|
|
|
{
|
2015-09-07 13:55:32 +02:00
|
|
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
|
2018-12-12 15:01:23 +01:00
|
|
|
|
2015-09-11 22:14:25 +02:00
|
|
|
pc_q35_2_5_machine_options(m);
|
2015-10-30 20:36:07 +01:00
|
|
|
m->hw_version = "2.4.0";
|
2015-09-07 13:55:32 +02:00
|
|
|
pcmc->broken_reserved_end = true;
|
2018-12-12 16:36:30 +01:00
|
|
|
compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
|
|
|
|
compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
|
2015-05-15 19:18:54 +02:00
|
|
|
}
|
2013-12-02 12:47:29 +01:00
|
|
|
|
2015-05-15 19:19:01 +02:00
|
|
|
DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
|
|
|
|
pc_q35_2_4_machine_options);
|