2023-10-09 11:09:04 +02:00
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES.
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*/
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#ifndef _IOMMUFD_H
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#define _IOMMUFD_H
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#include <linux/types.h>
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#include <linux/ioctl.h>
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#define IOMMUFD_TYPE (';')
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/**
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* DOC: General ioctl format
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*
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* The ioctl interface follows a general format to allow for extensibility. Each
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* ioctl is passed in a structure pointer as the argument providing the size of
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* the structure in the first u32. The kernel checks that any structure space
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* beyond what it understands is 0. This allows userspace to use the backward
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* compatible portion while consistently using the newer, larger, structures.
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*
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* ioctls use a standard meaning for common errnos:
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*
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* - ENOTTY: The IOCTL number itself is not supported at all
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* - E2BIG: The IOCTL number is supported, but the provided structure has
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* non-zero in a part the kernel does not understand.
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* - EOPNOTSUPP: The IOCTL number is supported, and the structure is
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* understood, however a known field has a value the kernel does not
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* understand or support.
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* - EINVAL: Everything about the IOCTL was understood, but a field is not
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* correct.
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* - ENOENT: An ID or IOVA provided does not exist.
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* - ENOMEM: Out of memory.
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* - EOVERFLOW: Mathematics overflowed.
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*
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* As well as additional errnos, within specific ioctls.
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*/
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enum {
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IOMMUFD_CMD_BASE = 0x80,
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IOMMUFD_CMD_DESTROY = IOMMUFD_CMD_BASE,
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IOMMUFD_CMD_IOAS_ALLOC,
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IOMMUFD_CMD_IOAS_ALLOW_IOVAS,
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IOMMUFD_CMD_IOAS_COPY,
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IOMMUFD_CMD_IOAS_IOVA_RANGES,
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IOMMUFD_CMD_IOAS_MAP,
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IOMMUFD_CMD_IOAS_UNMAP,
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IOMMUFD_CMD_OPTION,
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IOMMUFD_CMD_VFIO_IOAS,
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IOMMUFD_CMD_HWPT_ALLOC,
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IOMMUFD_CMD_GET_HW_INFO,
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2023-12-18 21:43:18 +01:00
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IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING,
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IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP,
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2024-03-04 14:47:31 +01:00
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IOMMUFD_CMD_HWPT_INVALIDATE,
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2023-10-09 11:09:04 +02:00
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};
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/**
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* struct iommu_destroy - ioctl(IOMMU_DESTROY)
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* @size: sizeof(struct iommu_destroy)
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* @id: iommufd object ID to destroy. Can be any destroyable object type.
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*
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* Destroy any object held within iommufd.
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*/
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struct iommu_destroy {
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__u32 size;
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__u32 id;
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};
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#define IOMMU_DESTROY _IO(IOMMUFD_TYPE, IOMMUFD_CMD_DESTROY)
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/**
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* struct iommu_ioas_alloc - ioctl(IOMMU_IOAS_ALLOC)
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* @size: sizeof(struct iommu_ioas_alloc)
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* @flags: Must be 0
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* @out_ioas_id: Output IOAS ID for the allocated object
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*
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* Allocate an IO Address Space (IOAS) which holds an IO Virtual Address (IOVA)
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* to memory mapping.
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*/
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struct iommu_ioas_alloc {
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__u32 size;
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__u32 flags;
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__u32 out_ioas_id;
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};
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#define IOMMU_IOAS_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_ALLOC)
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/**
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* struct iommu_iova_range - ioctl(IOMMU_IOVA_RANGE)
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* @start: First IOVA
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* @last: Inclusive last IOVA
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*
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* An interval in IOVA space.
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*/
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struct iommu_iova_range {
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__aligned_u64 start;
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__aligned_u64 last;
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};
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/**
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* struct iommu_ioas_iova_ranges - ioctl(IOMMU_IOAS_IOVA_RANGES)
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* @size: sizeof(struct iommu_ioas_iova_ranges)
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* @ioas_id: IOAS ID to read ranges from
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* @num_iovas: Input/Output total number of ranges in the IOAS
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* @__reserved: Must be 0
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* @allowed_iovas: Pointer to the output array of struct iommu_iova_range
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* @out_iova_alignment: Minimum alignment required for mapping IOVA
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*
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* Query an IOAS for ranges of allowed IOVAs. Mapping IOVA outside these ranges
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* is not allowed. num_iovas will be set to the total number of iovas and
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* the allowed_iovas[] will be filled in as space permits.
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*
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* The allowed ranges are dependent on the HW path the DMA operation takes, and
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* can change during the lifetime of the IOAS. A fresh empty IOAS will have a
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* full range, and each attached device will narrow the ranges based on that
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* device's HW restrictions. Detaching a device can widen the ranges. Userspace
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* should query ranges after every attach/detach to know what IOVAs are valid
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* for mapping.
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*
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* On input num_iovas is the length of the allowed_iovas array. On output it is
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* the total number of iovas filled in. The ioctl will return -EMSGSIZE and set
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* num_iovas to the required value if num_iovas is too small. In this case the
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* caller should allocate a larger output array and re-issue the ioctl.
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*
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* out_iova_alignment returns the minimum IOVA alignment that can be given
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* to IOMMU_IOAS_MAP/COPY. IOVA's must satisfy::
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*
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* starting_iova % out_iova_alignment == 0
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* (starting_iova + length) % out_iova_alignment == 0
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*
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* out_iova_alignment can be 1 indicating any IOVA is allowed. It cannot
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* be higher than the system PAGE_SIZE.
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*/
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struct iommu_ioas_iova_ranges {
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__u32 size;
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__u32 ioas_id;
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__u32 num_iovas;
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__u32 __reserved;
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__aligned_u64 allowed_iovas;
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__aligned_u64 out_iova_alignment;
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};
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#define IOMMU_IOAS_IOVA_RANGES _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_IOVA_RANGES)
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/**
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* struct iommu_ioas_allow_iovas - ioctl(IOMMU_IOAS_ALLOW_IOVAS)
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* @size: sizeof(struct iommu_ioas_allow_iovas)
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* @ioas_id: IOAS ID to allow IOVAs from
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* @num_iovas: Input/Output total number of ranges in the IOAS
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* @__reserved: Must be 0
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* @allowed_iovas: Pointer to array of struct iommu_iova_range
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*
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* Ensure a range of IOVAs are always available for allocation. If this call
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* succeeds then IOMMU_IOAS_IOVA_RANGES will never return a list of IOVA ranges
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* that are narrower than the ranges provided here. This call will fail if
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* IOMMU_IOAS_IOVA_RANGES is currently narrower than the given ranges.
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*
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* When an IOAS is first created the IOVA_RANGES will be maximally sized, and as
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* devices are attached the IOVA will narrow based on the device restrictions.
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* When an allowed range is specified any narrowing will be refused, ie device
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* attachment can fail if the device requires limiting within the allowed range.
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*
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* Automatic IOVA allocation is also impacted by this call. MAP will only
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* allocate within the allowed IOVAs if they are present.
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*
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* This call replaces the entire allowed list with the given list.
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*/
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struct iommu_ioas_allow_iovas {
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__u32 size;
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__u32 ioas_id;
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__u32 num_iovas;
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__u32 __reserved;
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__aligned_u64 allowed_iovas;
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};
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#define IOMMU_IOAS_ALLOW_IOVAS _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_ALLOW_IOVAS)
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/**
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* enum iommufd_ioas_map_flags - Flags for map and copy
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* @IOMMU_IOAS_MAP_FIXED_IOVA: If clear the kernel will compute an appropriate
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* IOVA to place the mapping at
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* @IOMMU_IOAS_MAP_WRITEABLE: DMA is allowed to write to this mapping
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* @IOMMU_IOAS_MAP_READABLE: DMA is allowed to read from this mapping
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*/
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enum iommufd_ioas_map_flags {
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IOMMU_IOAS_MAP_FIXED_IOVA = 1 << 0,
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IOMMU_IOAS_MAP_WRITEABLE = 1 << 1,
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IOMMU_IOAS_MAP_READABLE = 1 << 2,
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};
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/**
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* struct iommu_ioas_map - ioctl(IOMMU_IOAS_MAP)
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* @size: sizeof(struct iommu_ioas_map)
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* @flags: Combination of enum iommufd_ioas_map_flags
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* @ioas_id: IOAS ID to change the mapping of
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* @__reserved: Must be 0
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* @user_va: Userspace pointer to start mapping from
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* @length: Number of bytes to map
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* @iova: IOVA the mapping was placed at. If IOMMU_IOAS_MAP_FIXED_IOVA is set
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* then this must be provided as input.
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*
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* Set an IOVA mapping from a user pointer. If FIXED_IOVA is specified then the
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* mapping will be established at iova, otherwise a suitable location based on
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* the reserved and allowed lists will be automatically selected and returned in
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* iova.
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*
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* If IOMMU_IOAS_MAP_FIXED_IOVA is specified then the iova range must currently
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* be unused, existing IOVA cannot be replaced.
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*/
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struct iommu_ioas_map {
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__u32 size;
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__u32 flags;
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__u32 ioas_id;
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__u32 __reserved;
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__aligned_u64 user_va;
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__aligned_u64 length;
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__aligned_u64 iova;
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};
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#define IOMMU_IOAS_MAP _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP)
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/**
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* struct iommu_ioas_copy - ioctl(IOMMU_IOAS_COPY)
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* @size: sizeof(struct iommu_ioas_copy)
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* @flags: Combination of enum iommufd_ioas_map_flags
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* @dst_ioas_id: IOAS ID to change the mapping of
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* @src_ioas_id: IOAS ID to copy from
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* @length: Number of bytes to copy and map
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* @dst_iova: IOVA the mapping was placed at. If IOMMU_IOAS_MAP_FIXED_IOVA is
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* set then this must be provided as input.
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* @src_iova: IOVA to start the copy
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*
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* Copy an already existing mapping from src_ioas_id and establish it in
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* dst_ioas_id. The src iova/length must exactly match a range used with
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* IOMMU_IOAS_MAP.
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*
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* This may be used to efficiently clone a subset of an IOAS to another, or as a
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* kind of 'cache' to speed up mapping. Copy has an efficiency advantage over
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* establishing equivalent new mappings, as internal resources are shared, and
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* the kernel will pin the user memory only once.
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*/
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struct iommu_ioas_copy {
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__u32 size;
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__u32 flags;
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__u32 dst_ioas_id;
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__u32 src_ioas_id;
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__aligned_u64 length;
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__aligned_u64 dst_iova;
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__aligned_u64 src_iova;
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};
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#define IOMMU_IOAS_COPY _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_COPY)
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/**
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* struct iommu_ioas_unmap - ioctl(IOMMU_IOAS_UNMAP)
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* @size: sizeof(struct iommu_ioas_unmap)
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* @ioas_id: IOAS ID to change the mapping of
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* @iova: IOVA to start the unmapping at
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* @length: Number of bytes to unmap, and return back the bytes unmapped
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*
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* Unmap an IOVA range. The iova/length must be a superset of a previously
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* mapped range used with IOMMU_IOAS_MAP or IOMMU_IOAS_COPY. Splitting or
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* truncating ranges is not allowed. The values 0 to U64_MAX will unmap
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* everything.
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*/
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struct iommu_ioas_unmap {
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__u32 size;
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__u32 ioas_id;
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__aligned_u64 iova;
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__aligned_u64 length;
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};
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#define IOMMU_IOAS_UNMAP _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_UNMAP)
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/**
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* enum iommufd_option - ioctl(IOMMU_OPTION_RLIMIT_MODE) and
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* ioctl(IOMMU_OPTION_HUGE_PAGES)
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* @IOMMU_OPTION_RLIMIT_MODE:
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* Change how RLIMIT_MEMLOCK accounting works. The caller must have privilege
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* to invoke this. Value 0 (default) is user based accouting, 1 uses process
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* based accounting. Global option, object_id must be 0
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* @IOMMU_OPTION_HUGE_PAGES:
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* Value 1 (default) allows contiguous pages to be combined when generating
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* iommu mappings. Value 0 disables combining, everything is mapped to
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* PAGE_SIZE. This can be useful for benchmarking. This is a per-IOAS
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* option, the object_id must be the IOAS ID.
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*/
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enum iommufd_option {
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IOMMU_OPTION_RLIMIT_MODE = 0,
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IOMMU_OPTION_HUGE_PAGES = 1,
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};
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/**
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* enum iommufd_option_ops - ioctl(IOMMU_OPTION_OP_SET) and
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* ioctl(IOMMU_OPTION_OP_GET)
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* @IOMMU_OPTION_OP_SET: Set the option's value
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* @IOMMU_OPTION_OP_GET: Get the option's value
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*/
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enum iommufd_option_ops {
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IOMMU_OPTION_OP_SET = 0,
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IOMMU_OPTION_OP_GET = 1,
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};
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/**
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* struct iommu_option - iommu option multiplexer
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* @size: sizeof(struct iommu_option)
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* @option_id: One of enum iommufd_option
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* @op: One of enum iommufd_option_ops
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* @__reserved: Must be 0
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* @object_id: ID of the object if required
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* @val64: Option value to set or value returned on get
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*
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* Change a simple option value. This multiplexor allows controlling options
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* on objects. IOMMU_OPTION_OP_SET will load an option and IOMMU_OPTION_OP_GET
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* will return the current value.
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*/
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struct iommu_option {
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__u32 size;
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__u32 option_id;
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__u16 op;
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__u16 __reserved;
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__u32 object_id;
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__aligned_u64 val64;
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};
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#define IOMMU_OPTION _IO(IOMMUFD_TYPE, IOMMUFD_CMD_OPTION)
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/**
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* enum iommufd_vfio_ioas_op - IOMMU_VFIO_IOAS_* ioctls
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* @IOMMU_VFIO_IOAS_GET: Get the current compatibility IOAS
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* @IOMMU_VFIO_IOAS_SET: Change the current compatibility IOAS
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* @IOMMU_VFIO_IOAS_CLEAR: Disable VFIO compatibility
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|
|
|
*/
|
|
|
|
enum iommufd_vfio_ioas_op {
|
|
|
|
IOMMU_VFIO_IOAS_GET = 0,
|
|
|
|
IOMMU_VFIO_IOAS_SET = 1,
|
|
|
|
IOMMU_VFIO_IOAS_CLEAR = 2,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct iommu_vfio_ioas - ioctl(IOMMU_VFIO_IOAS)
|
|
|
|
* @size: sizeof(struct iommu_vfio_ioas)
|
|
|
|
* @ioas_id: For IOMMU_VFIO_IOAS_SET the input IOAS ID to set
|
|
|
|
* For IOMMU_VFIO_IOAS_GET will output the IOAS ID
|
|
|
|
* @op: One of enum iommufd_vfio_ioas_op
|
|
|
|
* @__reserved: Must be 0
|
|
|
|
*
|
|
|
|
* The VFIO compatibility support uses a single ioas because VFIO APIs do not
|
|
|
|
* support the ID field. Set or Get the IOAS that VFIO compatibility will use.
|
|
|
|
* When VFIO_GROUP_SET_CONTAINER is used on an iommufd it will get the
|
|
|
|
* compatibility ioas, either by taking what is already set, or auto creating
|
|
|
|
* one. From then on VFIO will continue to use that ioas and is not effected by
|
|
|
|
* this ioctl. SET or CLEAR does not destroy any auto-created IOAS.
|
|
|
|
*/
|
|
|
|
struct iommu_vfio_ioas {
|
|
|
|
__u32 size;
|
|
|
|
__u32 ioas_id;
|
|
|
|
__u16 op;
|
|
|
|
__u16 __reserved;
|
|
|
|
};
|
|
|
|
#define IOMMU_VFIO_IOAS _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VFIO_IOAS)
|
|
|
|
|
2023-12-18 21:43:18 +01:00
|
|
|
/**
|
|
|
|
* enum iommufd_hwpt_alloc_flags - Flags for HWPT allocation
|
|
|
|
* @IOMMU_HWPT_ALLOC_NEST_PARENT: If set, allocate a HWPT that can serve as
|
|
|
|
* the parent HWPT in a nesting configuration.
|
|
|
|
* @IOMMU_HWPT_ALLOC_DIRTY_TRACKING: Dirty tracking support for device IOMMU is
|
|
|
|
* enforced on device attachment
|
|
|
|
*/
|
|
|
|
enum iommufd_hwpt_alloc_flags {
|
|
|
|
IOMMU_HWPT_ALLOC_NEST_PARENT = 1 << 0,
|
|
|
|
IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* enum iommu_hwpt_vtd_s1_flags - Intel VT-d stage-1 page table
|
|
|
|
* entry attributes
|
|
|
|
* @IOMMU_VTD_S1_SRE: Supervisor request
|
|
|
|
* @IOMMU_VTD_S1_EAFE: Extended access enable
|
|
|
|
* @IOMMU_VTD_S1_WPE: Write protect enable
|
|
|
|
*/
|
|
|
|
enum iommu_hwpt_vtd_s1_flags {
|
|
|
|
IOMMU_VTD_S1_SRE = 1 << 0,
|
|
|
|
IOMMU_VTD_S1_EAFE = 1 << 1,
|
|
|
|
IOMMU_VTD_S1_WPE = 1 << 2,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct iommu_hwpt_vtd_s1 - Intel VT-d stage-1 page table
|
|
|
|
* info (IOMMU_HWPT_DATA_VTD_S1)
|
|
|
|
* @flags: Combination of enum iommu_hwpt_vtd_s1_flags
|
|
|
|
* @pgtbl_addr: The base address of the stage-1 page table.
|
|
|
|
* @addr_width: The address width of the stage-1 page table
|
|
|
|
* @__reserved: Must be 0
|
|
|
|
*/
|
|
|
|
struct iommu_hwpt_vtd_s1 {
|
|
|
|
__aligned_u64 flags;
|
|
|
|
__aligned_u64 pgtbl_addr;
|
|
|
|
__u32 addr_width;
|
|
|
|
__u32 __reserved;
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* enum iommu_hwpt_data_type - IOMMU HWPT Data Type
|
|
|
|
* @IOMMU_HWPT_DATA_NONE: no data
|
|
|
|
* @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
|
|
|
|
*/
|
|
|
|
enum iommu_hwpt_data_type {
|
|
|
|
IOMMU_HWPT_DATA_NONE,
|
|
|
|
IOMMU_HWPT_DATA_VTD_S1,
|
|
|
|
};
|
|
|
|
|
2023-10-09 11:09:04 +02:00
|
|
|
/**
|
|
|
|
* struct iommu_hwpt_alloc - ioctl(IOMMU_HWPT_ALLOC)
|
|
|
|
* @size: sizeof(struct iommu_hwpt_alloc)
|
2023-12-18 21:43:18 +01:00
|
|
|
* @flags: Combination of enum iommufd_hwpt_alloc_flags
|
2023-10-09 11:09:04 +02:00
|
|
|
* @dev_id: The device to allocate this HWPT for
|
2023-12-18 21:43:18 +01:00
|
|
|
* @pt_id: The IOAS or HWPT to connect this HWPT to
|
2023-10-09 11:09:04 +02:00
|
|
|
* @out_hwpt_id: The ID of the new HWPT
|
|
|
|
* @__reserved: Must be 0
|
2023-12-18 21:43:18 +01:00
|
|
|
* @data_type: One of enum iommu_hwpt_data_type
|
|
|
|
* @data_len: Length of the type specific data
|
|
|
|
* @data_uptr: User pointer to the type specific data
|
2023-10-09 11:09:04 +02:00
|
|
|
*
|
|
|
|
* Explicitly allocate a hardware page table object. This is the same object
|
|
|
|
* type that is returned by iommufd_device_attach() and represents the
|
|
|
|
* underlying iommu driver's iommu_domain kernel object.
|
|
|
|
*
|
2023-12-18 21:43:18 +01:00
|
|
|
* A kernel-managed HWPT will be created with the mappings from the given
|
|
|
|
* IOAS via the @pt_id. The @data_type for this allocation must be set to
|
|
|
|
* IOMMU_HWPT_DATA_NONE. The HWPT can be allocated as a parent HWPT for a
|
|
|
|
* nesting configuration by passing IOMMU_HWPT_ALLOC_NEST_PARENT via @flags.
|
|
|
|
*
|
|
|
|
* A user-managed nested HWPT will be created from a given parent HWPT via
|
|
|
|
* @pt_id, in which the parent HWPT must be allocated previously via the
|
|
|
|
* same ioctl from a given IOAS (@pt_id). In this case, the @data_type
|
|
|
|
* must be set to a pre-defined type corresponding to an I/O page table
|
|
|
|
* type supported by the underlying IOMMU hardware.
|
|
|
|
*
|
|
|
|
* If the @data_type is set to IOMMU_HWPT_DATA_NONE, @data_len and
|
|
|
|
* @data_uptr should be zero. Otherwise, both @data_len and @data_uptr
|
|
|
|
* must be given.
|
2023-10-09 11:09:04 +02:00
|
|
|
*/
|
|
|
|
struct iommu_hwpt_alloc {
|
|
|
|
__u32 size;
|
|
|
|
__u32 flags;
|
|
|
|
__u32 dev_id;
|
|
|
|
__u32 pt_id;
|
|
|
|
__u32 out_hwpt_id;
|
|
|
|
__u32 __reserved;
|
2023-12-18 21:43:18 +01:00
|
|
|
__u32 data_type;
|
|
|
|
__u32 data_len;
|
|
|
|
__aligned_u64 data_uptr;
|
2023-10-09 11:09:04 +02:00
|
|
|
};
|
|
|
|
#define IOMMU_HWPT_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_ALLOC)
|
|
|
|
|
2023-12-18 21:43:18 +01:00
|
|
|
/**
|
|
|
|
* enum iommu_hw_info_vtd_flags - Flags for VT-d hw_info
|
|
|
|
* @IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17: If set, disallow read-only mappings
|
|
|
|
* on a nested_parent domain.
|
|
|
|
* https://www.intel.com/content/www/us/en/content-details/772415/content-details.html
|
|
|
|
*/
|
|
|
|
enum iommu_hw_info_vtd_flags {
|
|
|
|
IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17 = 1 << 0,
|
|
|
|
};
|
|
|
|
|
2023-10-09 11:09:04 +02:00
|
|
|
/**
|
|
|
|
* struct iommu_hw_info_vtd - Intel VT-d hardware information
|
|
|
|
*
|
2023-12-18 21:43:18 +01:00
|
|
|
* @flags: Combination of enum iommu_hw_info_vtd_flags
|
2023-10-09 11:09:04 +02:00
|
|
|
* @__reserved: Must be 0
|
|
|
|
*
|
|
|
|
* @cap_reg: Value of Intel VT-d capability register defined in VT-d spec
|
|
|
|
* section 11.4.2 Capability Register.
|
|
|
|
* @ecap_reg: Value of Intel VT-d capability register defined in VT-d spec
|
|
|
|
* section 11.4.3 Extended Capability Register.
|
|
|
|
*
|
|
|
|
* User needs to understand the Intel VT-d specification to decode the
|
|
|
|
* register value.
|
|
|
|
*/
|
|
|
|
struct iommu_hw_info_vtd {
|
|
|
|
__u32 flags;
|
|
|
|
__u32 __reserved;
|
|
|
|
__aligned_u64 cap_reg;
|
|
|
|
__aligned_u64 ecap_reg;
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* enum iommu_hw_info_type - IOMMU Hardware Info Types
|
|
|
|
* @IOMMU_HW_INFO_TYPE_NONE: Used by the drivers that do not report hardware
|
|
|
|
* info
|
|
|
|
* @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
|
|
|
|
*/
|
|
|
|
enum iommu_hw_info_type {
|
|
|
|
IOMMU_HW_INFO_TYPE_NONE,
|
|
|
|
IOMMU_HW_INFO_TYPE_INTEL_VTD,
|
|
|
|
};
|
|
|
|
|
2023-12-18 21:43:18 +01:00
|
|
|
/**
|
|
|
|
* enum iommufd_hw_capabilities
|
|
|
|
* @IOMMU_HW_CAP_DIRTY_TRACKING: IOMMU hardware support for dirty tracking
|
|
|
|
* If available, it means the following APIs
|
|
|
|
* are supported:
|
|
|
|
*
|
|
|
|
* IOMMU_HWPT_GET_DIRTY_BITMAP
|
|
|
|
* IOMMU_HWPT_SET_DIRTY_TRACKING
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
enum iommufd_hw_capabilities {
|
|
|
|
IOMMU_HW_CAP_DIRTY_TRACKING = 1 << 0,
|
|
|
|
};
|
|
|
|
|
2023-10-09 11:09:04 +02:00
|
|
|
/**
|
|
|
|
* struct iommu_hw_info - ioctl(IOMMU_GET_HW_INFO)
|
|
|
|
* @size: sizeof(struct iommu_hw_info)
|
|
|
|
* @flags: Must be 0
|
|
|
|
* @dev_id: The device bound to the iommufd
|
|
|
|
* @data_len: Input the length of a user buffer in bytes. Output the length of
|
|
|
|
* data that kernel supports
|
|
|
|
* @data_uptr: User pointer to a user-space buffer used by the kernel to fill
|
|
|
|
* the iommu type specific hardware information data
|
|
|
|
* @out_data_type: Output the iommu hardware info type as defined in the enum
|
|
|
|
* iommu_hw_info_type.
|
2023-12-18 21:43:18 +01:00
|
|
|
* @out_capabilities: Output the generic iommu capability info type as defined
|
|
|
|
* in the enum iommu_hw_capabilities.
|
2023-10-09 11:09:04 +02:00
|
|
|
* @__reserved: Must be 0
|
|
|
|
*
|
|
|
|
* Query an iommu type specific hardware information data from an iommu behind
|
|
|
|
* a given device that has been bound to iommufd. This hardware info data will
|
|
|
|
* be used to sync capabilities between the virtual iommu and the physical
|
|
|
|
* iommu, e.g. a nested translation setup needs to check the hardware info, so
|
|
|
|
* a guest stage-1 page table can be compatible with the physical iommu.
|
|
|
|
*
|
|
|
|
* To capture an iommu type specific hardware information data, @data_uptr and
|
|
|
|
* its length @data_len must be provided. Trailing bytes will be zeroed if the
|
|
|
|
* user buffer is larger than the data that kernel has. Otherwise, kernel only
|
|
|
|
* fills the buffer using the given length in @data_len. If the ioctl succeeds,
|
|
|
|
* @data_len will be updated to the length that kernel actually supports,
|
|
|
|
* @out_data_type will be filled to decode the data filled in the buffer
|
|
|
|
* pointed by @data_uptr. Input @data_len == zero is allowed.
|
|
|
|
*/
|
|
|
|
struct iommu_hw_info {
|
|
|
|
__u32 size;
|
|
|
|
__u32 flags;
|
|
|
|
__u32 dev_id;
|
|
|
|
__u32 data_len;
|
|
|
|
__aligned_u64 data_uptr;
|
|
|
|
__u32 out_data_type;
|
|
|
|
__u32 __reserved;
|
2023-12-18 21:43:18 +01:00
|
|
|
__aligned_u64 out_capabilities;
|
2023-10-09 11:09:04 +02:00
|
|
|
};
|
|
|
|
#define IOMMU_GET_HW_INFO _IO(IOMMUFD_TYPE, IOMMUFD_CMD_GET_HW_INFO)
|
2023-12-18 21:43:18 +01:00
|
|
|
|
|
|
|
/*
|
|
|
|
* enum iommufd_hwpt_set_dirty_tracking_flags - Flags for steering dirty
|
|
|
|
* tracking
|
|
|
|
* @IOMMU_HWPT_DIRTY_TRACKING_ENABLE: Enable dirty tracking
|
|
|
|
*/
|
|
|
|
enum iommufd_hwpt_set_dirty_tracking_flags {
|
|
|
|
IOMMU_HWPT_DIRTY_TRACKING_ENABLE = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct iommu_hwpt_set_dirty_tracking - ioctl(IOMMU_HWPT_SET_DIRTY_TRACKING)
|
|
|
|
* @size: sizeof(struct iommu_hwpt_set_dirty_tracking)
|
|
|
|
* @flags: Combination of enum iommufd_hwpt_set_dirty_tracking_flags
|
|
|
|
* @hwpt_id: HW pagetable ID that represents the IOMMU domain
|
|
|
|
* @__reserved: Must be 0
|
|
|
|
*
|
|
|
|
* Toggle dirty tracking on an HW pagetable.
|
|
|
|
*/
|
|
|
|
struct iommu_hwpt_set_dirty_tracking {
|
|
|
|
__u32 size;
|
|
|
|
__u32 flags;
|
|
|
|
__u32 hwpt_id;
|
|
|
|
__u32 __reserved;
|
|
|
|
};
|
|
|
|
#define IOMMU_HWPT_SET_DIRTY_TRACKING _IO(IOMMUFD_TYPE, \
|
|
|
|
IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING)
|
|
|
|
|
|
|
|
/**
|
|
|
|
* enum iommufd_hwpt_get_dirty_bitmap_flags - Flags for getting dirty bits
|
|
|
|
* @IOMMU_HWPT_GET_DIRTY_BITMAP_NO_CLEAR: Just read the PTEs without clearing
|
|
|
|
* any dirty bits metadata. This flag
|
|
|
|
* can be passed in the expectation
|
|
|
|
* where the next operation is an unmap
|
|
|
|
* of the same IOVA range.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
enum iommufd_hwpt_get_dirty_bitmap_flags {
|
|
|
|
IOMMU_HWPT_GET_DIRTY_BITMAP_NO_CLEAR = 1,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct iommu_hwpt_get_dirty_bitmap - ioctl(IOMMU_HWPT_GET_DIRTY_BITMAP)
|
|
|
|
* @size: sizeof(struct iommu_hwpt_get_dirty_bitmap)
|
|
|
|
* @hwpt_id: HW pagetable ID that represents the IOMMU domain
|
|
|
|
* @flags: Combination of enum iommufd_hwpt_get_dirty_bitmap_flags
|
|
|
|
* @__reserved: Must be 0
|
|
|
|
* @iova: base IOVA of the bitmap first bit
|
|
|
|
* @length: IOVA range size
|
|
|
|
* @page_size: page size granularity of each bit in the bitmap
|
|
|
|
* @data: bitmap where to set the dirty bits. The bitmap bits each
|
|
|
|
* represent a page_size which you deviate from an arbitrary iova.
|
|
|
|
*
|
|
|
|
* Checking a given IOVA is dirty:
|
|
|
|
*
|
|
|
|
* data[(iova / page_size) / 64] & (1ULL << ((iova / page_size) % 64))
|
|
|
|
*
|
|
|
|
* Walk the IOMMU pagetables for a given IOVA range to return a bitmap
|
|
|
|
* with the dirty IOVAs. In doing so it will also by default clear any
|
|
|
|
* dirty bit metadata set in the IOPTE.
|
|
|
|
*/
|
|
|
|
struct iommu_hwpt_get_dirty_bitmap {
|
|
|
|
__u32 size;
|
|
|
|
__u32 hwpt_id;
|
|
|
|
__u32 flags;
|
|
|
|
__u32 __reserved;
|
|
|
|
__aligned_u64 iova;
|
|
|
|
__aligned_u64 length;
|
|
|
|
__aligned_u64 page_size;
|
|
|
|
__aligned_u64 data;
|
|
|
|
};
|
|
|
|
#define IOMMU_HWPT_GET_DIRTY_BITMAP _IO(IOMMUFD_TYPE, \
|
|
|
|
IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP)
|
|
|
|
|
2024-03-04 14:47:31 +01:00
|
|
|
/**
|
|
|
|
* enum iommu_hwpt_invalidate_data_type - IOMMU HWPT Cache Invalidation
|
|
|
|
* Data Type
|
|
|
|
* @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1
|
|
|
|
*/
|
|
|
|
enum iommu_hwpt_invalidate_data_type {
|
|
|
|
IOMMU_HWPT_INVALIDATE_DATA_VTD_S1,
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* enum iommu_hwpt_vtd_s1_invalidate_flags - Flags for Intel VT-d
|
|
|
|
* stage-1 cache invalidation
|
|
|
|
* @IOMMU_VTD_INV_FLAGS_LEAF: Indicates whether the invalidation applies
|
|
|
|
* to all-levels page structure cache or just
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* the leaf PTE cache.
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*/
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enum iommu_hwpt_vtd_s1_invalidate_flags {
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IOMMU_VTD_INV_FLAGS_LEAF = 1 << 0,
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};
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/**
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* struct iommu_hwpt_vtd_s1_invalidate - Intel VT-d cache invalidation
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* (IOMMU_HWPT_INVALIDATE_DATA_VTD_S1)
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* @addr: The start address of the range to be invalidated. It needs to
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* be 4KB aligned.
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* @npages: Number of contiguous 4K pages to be invalidated.
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* @flags: Combination of enum iommu_hwpt_vtd_s1_invalidate_flags
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* @__reserved: Must be 0
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*
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* The Intel VT-d specific invalidation data for user-managed stage-1 cache
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* invalidation in nested translation. Userspace uses this structure to
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* tell the impacted cache scope after modifying the stage-1 page table.
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*
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* Invalidating all the caches related to the page table by setting @addr
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* to be 0 and @npages to be U64_MAX.
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*
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* The device TLB will be invalidated automatically if ATS is enabled.
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|
*/
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struct iommu_hwpt_vtd_s1_invalidate {
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__aligned_u64 addr;
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__aligned_u64 npages;
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__u32 flags;
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__u32 __reserved;
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};
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|
/**
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* struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE)
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* @size: sizeof(struct iommu_hwpt_invalidate)
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* @hwpt_id: ID of a nested HWPT for cache invalidation
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|
* @data_uptr: User pointer to an array of driver-specific cache invalidation
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|
|
* data.
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* @data_type: One of enum iommu_hwpt_invalidate_data_type, defining the data
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|
|
* type of all the entries in the invalidation request array. It
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|
* should be a type supported by the hwpt pointed by @hwpt_id.
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* @entry_len: Length (in bytes) of a request entry in the request array
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* @entry_num: Input the number of cache invalidation requests in the array.
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|
|
* Output the number of requests successfully handled by kernel.
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* @__reserved: Must be 0.
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|
|
*
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|
|
* Invalidate the iommu cache for user-managed page table. Modifications on a
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|
|
* user-managed page table should be followed by this operation to sync cache.
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|
|
* Each ioctl can support one or more cache invalidation requests in the array
|
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|
|
* that has a total size of @entry_len * @entry_num.
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|
|
*
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|
|
* An empty invalidation request array by setting @entry_num==0 is allowed, and
|
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|
|
* @entry_len and @data_uptr would be ignored in this case. This can be used to
|
|
|
|
* check if the given @data_type is supported or not by kernel.
|
|
|
|
*/
|
|
|
|
struct iommu_hwpt_invalidate {
|
|
|
|
__u32 size;
|
|
|
|
__u32 hwpt_id;
|
|
|
|
__aligned_u64 data_uptr;
|
|
|
|
__u32 data_type;
|
|
|
|
__u32 entry_len;
|
|
|
|
__u32 entry_num;
|
|
|
|
__u32 __reserved;
|
|
|
|
};
|
|
|
|
#define IOMMU_HWPT_INVALIDATE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_INVALIDATE)
|
2023-10-09 11:09:04 +02:00
|
|
|
#endif
|