2007-11-11 01:04:49 +01:00
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|
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/*
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* ARMV7M System emulation.
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*
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* Copyright (c) 2006-2007 CodeSourcery.
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* Written by Paul Brook
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*
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2011-06-23 02:59:26 +02:00
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* This code is licensed under the GPL.
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2007-11-11 01:04:49 +01:00
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*/
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2015-12-07 17:23:45 +01:00
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#include "qemu/osdep.h"
|
2017-02-20 16:35:57 +01:00
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#include "hw/arm/armv7m.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 09:01:28 +01:00
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#include "qapi/error.h"
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2016-01-19 21:51:44 +01:00
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#include "cpu.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/sysbus.h"
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2019-05-23 15:47:43 +02:00
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#include "hw/arm/boot.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/loader.h"
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2019-08-12 07:23:51 +02:00
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#include "hw/qdev-properties.h"
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2009-09-20 16:58:02 +02:00
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#include "elf.h"
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2013-07-29 18:36:59 +02:00
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#include "sysemu/qtest.h"
|
2019-08-12 07:23:38 +02:00
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#include "sysemu/reset.h"
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2013-07-29 18:36:59 +02:00
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#include "qemu/error-report.h"
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2019-05-23 16:35:07 +02:00
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#include "qemu/module.h"
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2017-02-20 16:35:59 +01:00
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#include "exec/address-spaces.h"
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2018-03-02 11:45:36 +01:00
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#include "target/arm/idau.h"
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2007-11-11 01:04:49 +01:00
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/* Bitbanded IO. Each word corresponds to a single bit. */
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2011-06-23 02:59:26 +02:00
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/* Get the byte address of the real memory for a bitband access. */
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2017-02-20 16:36:01 +01:00
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static inline hwaddr bitband_addr(BitBandState *s, hwaddr offset)
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2007-11-11 01:04:49 +01:00
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{
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2017-02-20 16:36:01 +01:00
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return s->base | (offset & 0x1ffffff) >> 5;
|
2007-11-11 01:04:49 +01:00
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|
}
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2017-02-20 16:36:01 +01:00
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static MemTxResult bitband_read(void *opaque, hwaddr offset,
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uint64_t *data, unsigned size, MemTxAttrs attrs)
|
2007-11-11 01:04:49 +01:00
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{
|
2017-02-20 16:36:01 +01:00
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BitBandState *s = opaque;
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uint8_t buf[4];
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MemTxResult res;
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int bitpos, bit;
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hwaddr addr;
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assert(size <= 4);
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/* Find address in underlying memory and round down to multiple of size */
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addr = bitband_addr(s, offset) & (-size);
|
2017-09-21 10:51:08 +02:00
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res = address_space_read(&s->source_as, addr, attrs, buf, size);
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2017-02-20 16:36:01 +01:00
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if (res) {
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return res;
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|
}
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/* Bit position in the N bytes read... */
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bitpos = (offset >> 2) & ((size * 8) - 1);
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/* ...converted to byte in buffer and bit in byte */
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bit = (buf[bitpos >> 3] >> (bitpos & 7)) & 1;
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*data = bit;
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return MEMTX_OK;
|
2007-11-11 01:04:49 +01:00
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|
|
}
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|
2017-02-20 16:36:01 +01:00
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static MemTxResult bitband_write(void *opaque, hwaddr offset, uint64_t value,
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unsigned size, MemTxAttrs attrs)
|
2007-11-11 01:04:49 +01:00
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|
|
{
|
2017-02-20 16:36:01 +01:00
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BitBandState *s = opaque;
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uint8_t buf[4];
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MemTxResult res;
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int bitpos, bit;
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hwaddr addr;
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assert(size <= 4);
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/* Find address in underlying memory and round down to multiple of size */
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addr = bitband_addr(s, offset) & (-size);
|
2017-09-21 10:51:08 +02:00
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res = address_space_read(&s->source_as, addr, attrs, buf, size);
|
2017-02-20 16:36:01 +01:00
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if (res) {
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return res;
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}
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/* Bit position in the N bytes read... */
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bitpos = (offset >> 2) & ((size * 8) - 1);
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/* ...converted to byte in buffer and bit in byte */
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bit = 1 << (bitpos & 7);
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if (value & 1) {
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buf[bitpos >> 3] |= bit;
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|
} else {
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buf[bitpos >> 3] &= ~bit;
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}
|
2017-09-21 10:51:08 +02:00
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return address_space_write(&s->source_as, addr, attrs, buf, size);
|
2007-11-11 01:04:49 +01:00
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|
|
}
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|
2011-08-15 16:17:20 +02:00
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static const MemoryRegionOps bitband_ops = {
|
2017-02-20 16:36:01 +01:00
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.read_with_attrs = bitband_read,
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.write_with_attrs = bitband_write,
|
2011-08-15 16:17:20 +02:00
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.endianness = DEVICE_NATIVE_ENDIAN,
|
2017-02-20 16:36:01 +01:00
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|
|
.impl.min_access_size = 1,
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|
.impl.max_access_size = 4,
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|
.valid.min_access_size = 1,
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|
.valid.max_access_size = 4,
|
2007-11-11 01:04:49 +01:00
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};
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|
2016-03-07 08:05:42 +01:00
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|
|
static void bitband_init(Object *obj)
|
2007-11-11 01:04:49 +01:00
|
|
|
{
|
2016-03-07 08:05:42 +01:00
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|
|
BitBandState *s = BITBAND(obj);
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|
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
|
2007-11-11 01:04:49 +01:00
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|
2017-02-20 16:36:01 +01:00
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memory_region_init_io(&s->iomem, obj, &bitband_ops, s,
|
2013-06-07 03:25:08 +02:00
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"bitband", 0x02000000);
|
2011-11-27 10:38:10 +01:00
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sysbus_init_mmio(dev, &s->iomem);
|
2009-06-03 16:16:49 +02:00
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}
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|
2017-02-20 16:36:01 +01:00
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|
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static void bitband_realize(DeviceState *dev, Error **errp)
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|
{
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BitBandState *s = BITBAND(dev);
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if (!s->source_memory) {
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error_setg(errp, "source-memory property not set");
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return;
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}
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|
2017-09-21 10:51:08 +02:00
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address_space_init(&s->source_as, s->source_memory, "bitband-source");
|
2017-02-20 16:36:01 +01:00
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}
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|
2007-11-11 01:04:49 +01:00
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/* Board init. */
|
2010-04-05 20:34:51 +02:00
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|
2017-02-20 16:35:57 +01:00
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static const hwaddr bitband_input_addr[ARMV7M_NUM_BITBANDS] = {
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0x20000000, 0x40000000
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};
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static const hwaddr bitband_output_addr[ARMV7M_NUM_BITBANDS] = {
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0x22000000, 0x42000000
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};
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static void armv7m_instance_init(Object *obj)
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{
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ARMv7MState *s = ARMV7M(obj);
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int i;
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/* Can't init the cpu here, we don't yet know which model to use */
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|
2017-02-20 16:35:59 +01:00
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memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX);
|
|
|
|
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2
This is the same transformation as in the previous commit, except
sysbus_init_child_obj() and realize are too separated for the commit's
Coccinelle script to handle, typically because sysbus_init_child_obj()
is in a device's instance_init() method, and the matching realize is
in its realize() method.
Perhaps a Coccinelle wizard could make it transform that pattern, but
I'm just a bungler, and the best I can do is transforming the two
separate parts separately:
@@
expression errp;
expression child;
symbol true;
@@
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression errp;
expression child;
symbol true;
@@
- object_property_set_bool(child, true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression child;
@@
- qdev_init_nofail(DEVICE(child));
+ sysbus_realize(SYS_BUS_DEVICE(child), &error_fatal);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression child;
expression dev;
@@
dev = DEVICE(child);
...
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression child;
identifier dev;
@@
DeviceState *dev = DEVICE(child);
...
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression parent, name, size, type;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
This script is *unsound*: we need to manually verify init and realize
conversions are properly paired.
This commit has only the pairs where object_initialize_child()'s
@child and sysbus_realize()'s @dev argument text match exactly within
the same source file.
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-49-armbru@redhat.com>
2020-06-10 07:32:37 +02:00
|
|
|
object_initialize_child(obj, "nvnic", &s->nvic, TYPE_NVIC);
|
2017-02-20 16:35:57 +01:00
|
|
|
object_property_add_alias(obj, "num-irq",
|
qom: Drop parameter @errp of object_property_add() & friends
The only way object_property_add() can fail is when a property with
the same name already exists. Since our property names are all
hardcoded, failure is a programming error, and the appropriate way to
handle it is passing &error_abort.
Same for its variants, except for object_property_add_child(), which
additionally fails when the child already has a parent. Parentage is
also under program control, so this is a programming error, too.
We have a bit over 500 callers. Almost half of them pass
&error_abort, slightly fewer ignore errors, one test case handles
errors, and the remaining few callers pass them to their own callers.
The previous few commits demonstrated once again that ignoring
programming errors is a bad idea.
Of the few ones that pass on errors, several violate the Error API.
The Error ** argument must be NULL, &error_abort, &error_fatal, or a
pointer to a variable containing NULL. Passing an argument of the
latter kind twice without clearing it in between is wrong: if the
first call sets an error, it no longer points to NULL for the second
call. ich9_pm_add_properties(), sparc32_ledma_realize(),
sparc32_dma_realize(), xilinx_axidma_realize(), xilinx_enet_realize()
are wrong that way.
When the one appropriate choice of argument is &error_abort, letting
users pick the argument is a bad idea.
Drop parameter @errp and assert the preconditions instead.
There's one exception to "duplicate property name is a programming
error": the way object_property_add() implements the magic (and
undocumented) "automatic arrayification". Don't drop @errp there.
Instead, rename object_property_add() to object_property_try_add(),
and add the obvious wrapper object_property_add().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200505152926.18877-15-armbru@redhat.com>
[Two semantic rebase conflicts resolved]
2020-05-05 17:29:22 +02:00
|
|
|
OBJECT(&s->nvic), "num-irq");
|
2017-02-20 16:35:57 +01:00
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
|
2020-06-10 07:32:38 +02:00
|
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|
object_initialize_child(obj, "bitband[*]", &s->bitband[i],
|
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|
TYPE_BITBAND);
|
2017-02-20 16:35:57 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
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|
|
static void armv7m_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
ARMv7MState *s = ARMV7M(dev);
|
2017-02-20 16:36:00 +01:00
|
|
|
SysBusDevice *sbd;
|
2017-02-20 16:35:57 +01:00
|
|
|
Error *err = NULL;
|
|
|
|
int i;
|
|
|
|
|
2017-02-20 16:35:59 +01:00
|
|
|
if (!s->board_memory) {
|
|
|
|
error_setg(errp, "memory property was not set");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
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|
memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
|
|
|
|
|
2019-02-01 15:55:41 +01:00
|
|
|
s->cpu = ARM_CPU(object_new_with_props(s->cpu_type, OBJECT(s), "cpu",
|
|
|
|
&err, NULL));
|
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
2017-02-20 16:35:57 +01:00
|
|
|
|
2017-02-20 16:35:59 +01:00
|
|
|
object_property_set_link(OBJECT(s->cpu), OBJECT(&s->container), "memory",
|
|
|
|
&error_abort);
|
2018-03-02 11:45:36 +01:00
|
|
|
if (object_property_find(OBJECT(s->cpu), "idau", NULL)) {
|
|
|
|
object_property_set_link(OBJECT(s->cpu), s->idau, "idau", &err);
|
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
2018-03-02 11:45:37 +01:00
|
|
|
if (object_property_find(OBJECT(s->cpu), "init-svtor", NULL)) {
|
|
|
|
object_property_set_uint(OBJECT(s->cpu), s->init_svtor,
|
|
|
|
"init-svtor", &err);
|
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
2019-02-01 15:55:41 +01:00
|
|
|
if (object_property_find(OBJECT(s->cpu), "start-powered-off", NULL)) {
|
|
|
|
object_property_set_bool(OBJECT(s->cpu), s->start_powered_off,
|
|
|
|
"start-powered-off", &err);
|
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
2019-05-17 19:40:45 +02:00
|
|
|
if (object_property_find(OBJECT(s->cpu), "vfp", NULL)) {
|
|
|
|
object_property_set_bool(OBJECT(s->cpu), s->vfp,
|
|
|
|
"vfp", &err);
|
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (object_property_find(OBJECT(s->cpu), "dsp", NULL)) {
|
|
|
|
object_property_set_bool(OBJECT(s->cpu), s->dsp,
|
|
|
|
"dsp", &err);
|
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
2018-06-15 15:57:13 +02:00
|
|
|
|
2019-02-01 15:55:41 +01:00
|
|
|
/*
|
|
|
|
* Tell the CPU where the NVIC is; it will fail realize if it doesn't
|
|
|
|
* have one. Similarly, tell the NVIC where its CPU is.
|
2018-06-15 15:57:13 +02:00
|
|
|
*/
|
|
|
|
s->cpu->env.nvic = &s->nvic;
|
2019-02-01 15:55:41 +01:00
|
|
|
s->nvic.cpu = s->cpu;
|
2018-06-15 15:57:13 +02:00
|
|
|
|
qdev: Convert bus-less devices to qdev_realize() with Coccinelle
All remaining conversions to qdev_realize() are for bus-less devices.
Coccinelle script:
// only correct for bus-less @dev!
@@
expression errp;
expression dev;
@@
- qdev_init_nofail(dev);
+ qdev_realize(dev, NULL, &error_fatal);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(dev, true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-57-armbru@redhat.com>
2020-06-10 07:32:45 +02:00
|
|
|
qdev_realize(DEVICE(s->cpu), NULL, &err);
|
2017-02-20 16:35:57 +01:00
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Note that we must realize the NVIC after the CPU */
|
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2
This is the same transformation as in the previous commit, except
sysbus_init_child_obj() and realize are too separated for the commit's
Coccinelle script to handle, typically because sysbus_init_child_obj()
is in a device's instance_init() method, and the matching realize is
in its realize() method.
Perhaps a Coccinelle wizard could make it transform that pattern, but
I'm just a bungler, and the best I can do is transforming the two
separate parts separately:
@@
expression errp;
expression child;
symbol true;
@@
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression errp;
expression child;
symbol true;
@@
- object_property_set_bool(child, true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression child;
@@
- qdev_init_nofail(DEVICE(child));
+ sysbus_realize(SYS_BUS_DEVICE(child), &error_fatal);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression child;
expression dev;
@@
dev = DEVICE(child);
...
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression child;
identifier dev;
@@
DeviceState *dev = DEVICE(child);
...
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression parent, name, size, type;
expression child;
symbol true;
@@
- sysbus_init_child_obj(parent, name, child, size, type);
+ sysbus_init_child_XXX(parent, name, child, size, type);
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, child, sizeof(*child), type)
+ object_initialize_child(parent, propname, child, type)
@@
expression parent, propname, type;
expression child;
@@
- sysbus_init_child_XXX(parent, propname, &child, sizeof(child), type)
+ object_initialize_child(parent, propname, &child, type)
This script is *unsound*: we need to manually verify init and realize
conversions are properly paired.
This commit has only the pairs where object_initialize_child()'s
@child and sysbus_realize()'s @dev argument text match exactly within
the same source file.
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-49-armbru@redhat.com>
2020-06-10 07:32:37 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(&s->nvic), &err);
|
2017-02-20 16:35:57 +01:00
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Alias the NVIC's input and output GPIOs as our own so the board
|
|
|
|
* code can wire them up. (We do this in realize because the
|
|
|
|
* NVIC doesn't create the input GPIO array until realize.)
|
|
|
|
*/
|
|
|
|
qdev_pass_gpios(DEVICE(&s->nvic), dev, NULL);
|
|
|
|
qdev_pass_gpios(DEVICE(&s->nvic), dev, "SYSRESETREQ");
|
2018-08-20 12:24:33 +02:00
|
|
|
qdev_pass_gpios(DEVICE(&s->nvic), dev, "NMI");
|
2017-02-20 16:35:57 +01:00
|
|
|
|
|
|
|
/* Wire the NVIC up to the CPU */
|
2017-02-20 16:36:00 +01:00
|
|
|
sbd = SYS_BUS_DEVICE(&s->nvic);
|
|
|
|
sysbus_connect_irq(sbd, 0,
|
2017-02-20 16:35:57 +01:00
|
|
|
qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
|
|
|
|
|
2017-02-20 16:36:00 +01:00
|
|
|
memory_region_add_subregion(&s->container, 0xe000e000,
|
|
|
|
sysbus_mmio_get_region(sbd, 0));
|
|
|
|
|
armv7m: Delete unused "ARM,bitband-memory" devices
These devices are optional, and enabled by property "enable-bitband".
armv7m_instance_init() creates them unconditionally, because the
property has not been set then. armv7m_realize() realizes them only
when the property is true. Works, although it leaves unrealized
devices hanging around in the QOM composition tree. Affects machines
microbit, mps2-an505, mps2-an521, musca-a, and musca-b1.
Delete the unused devices by making armv7m_realize() unparent them.
Visible in "info qom-tree"; here's the change for microbit:
/machine (microbit-machine)
/microbit.twi (microbit.i2c)
/microbit.twi[0] (qemu:memory-region)
/nrf51 (nrf51-soc)
/armv6m (armv7m)
/armv7m-container[0] (qemu:memory-region)
- /bitband[0] (ARM,bitband-memory)
- /bitband[0] (qemu:memory-region)
- /bitband[1] (ARM,bitband-memory)
- /bitband[0] (qemu:memory-region)
/cpu (cortex-m0-arm-cpu)
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200609122339.937862-7-armbru@redhat.com>
2020-06-09 14:23:21 +02:00
|
|
|
for (i = 0; i < ARRAY_SIZE(s->bitband); i++) {
|
|
|
|
if (s->enable_bitband) {
|
2018-08-16 15:05:28 +02:00
|
|
|
Object *obj = OBJECT(&s->bitband[i]);
|
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(&s->bitband[i]);
|
|
|
|
|
|
|
|
object_property_set_int(obj, bitband_input_addr[i], "base", &err);
|
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
object_property_set_link(obj, OBJECT(s->board_memory),
|
|
|
|
"source-memory", &error_abort);
|
2020-06-10 07:32:38 +02:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(obj), &err);
|
2018-08-16 15:05:28 +02:00
|
|
|
if (err != NULL) {
|
|
|
|
error_propagate(errp, err);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
memory_region_add_subregion(&s->container, bitband_output_addr[i],
|
|
|
|
sysbus_mmio_get_region(sbd, 0));
|
armv7m: Delete unused "ARM,bitband-memory" devices
These devices are optional, and enabled by property "enable-bitband".
armv7m_instance_init() creates them unconditionally, because the
property has not been set then. armv7m_realize() realizes them only
when the property is true. Works, although it leaves unrealized
devices hanging around in the QOM composition tree. Affects machines
microbit, mps2-an505, mps2-an521, musca-a, and musca-b1.
Delete the unused devices by making armv7m_realize() unparent them.
Visible in "info qom-tree"; here's the change for microbit:
/machine (microbit-machine)
/microbit.twi (microbit.i2c)
/microbit.twi[0] (qemu:memory-region)
/nrf51 (nrf51-soc)
/armv6m (armv7m)
/armv7m-container[0] (qemu:memory-region)
- /bitband[0] (ARM,bitband-memory)
- /bitband[0] (qemu:memory-region)
- /bitband[1] (ARM,bitband-memory)
- /bitband[0] (qemu:memory-region)
/cpu (cortex-m0-arm-cpu)
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200609122339.937862-7-armbru@redhat.com>
2020-06-09 14:23:21 +02:00
|
|
|
} else {
|
|
|
|
object_unparent(OBJECT(&s->bitband[i]));
|
2017-02-20 16:35:57 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static Property armv7m_properties[] = {
|
2017-09-13 18:04:57 +02:00
|
|
|
DEFINE_PROP_STRING("cpu-type", ARMv7MState, cpu_type),
|
2017-09-07 14:54:51 +02:00
|
|
|
DEFINE_PROP_LINK("memory", ARMv7MState, board_memory, TYPE_MEMORY_REGION,
|
|
|
|
MemoryRegion *),
|
2018-03-02 11:45:36 +01:00
|
|
|
DEFINE_PROP_LINK("idau", ARMv7MState, idau, TYPE_IDAU_INTERFACE, Object *),
|
2018-03-02 11:45:37 +01:00
|
|
|
DEFINE_PROP_UINT32("init-svtor", ARMv7MState, init_svtor, 0),
|
2018-08-16 15:05:28 +02:00
|
|
|
DEFINE_PROP_BOOL("enable-bitband", ARMv7MState, enable_bitband, false),
|
2019-02-01 15:55:41 +01:00
|
|
|
DEFINE_PROP_BOOL("start-powered-off", ARMv7MState, start_powered_off,
|
|
|
|
false),
|
2019-05-17 19:40:45 +02:00
|
|
|
DEFINE_PROP_BOOL("vfp", ARMv7MState, vfp, true),
|
|
|
|
DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
|
2017-02-20 16:35:57 +01:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void armv7m_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
|
|
|
dc->realize = armv7m_realize;
|
2020-01-10 16:30:32 +01:00
|
|
|
device_class_set_props(dc, armv7m_properties);
|
2017-02-20 16:35:57 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo armv7m_info = {
|
|
|
|
.name = TYPE_ARMV7M,
|
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
|
|
|
.instance_size = sizeof(ARMv7MState),
|
|
|
|
.instance_init = armv7m_instance_init,
|
|
|
|
.class_init = armv7m_class_init,
|
|
|
|
};
|
|
|
|
|
2010-04-05 20:34:51 +02:00
|
|
|
static void armv7m_reset(void *opaque)
|
|
|
|
{
|
2012-05-04 16:11:34 +02:00
|
|
|
ARMCPU *cpu = opaque;
|
|
|
|
|
|
|
|
cpu_reset(CPU(cpu));
|
2010-04-05 20:34:51 +02:00
|
|
|
}
|
|
|
|
|
2017-02-20 16:35:55 +01:00
|
|
|
void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)
|
|
|
|
{
|
|
|
|
int image_size;
|
|
|
|
uint64_t entry;
|
|
|
|
uint64_t lowaddr;
|
|
|
|
int big_endian;
|
2018-03-02 11:45:36 +01:00
|
|
|
AddressSpace *as;
|
|
|
|
int asidx;
|
|
|
|
CPUState *cs = CPU(cpu);
|
2007-11-11 01:04:49 +01:00
|
|
|
|
2009-09-20 16:58:02 +02:00
|
|
|
#ifdef TARGET_WORDS_BIGENDIAN
|
|
|
|
big_endian = 1;
|
|
|
|
#else
|
|
|
|
big_endian = 0;
|
|
|
|
#endif
|
|
|
|
|
2018-03-02 11:45:36 +01:00
|
|
|
if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) {
|
|
|
|
asidx = ARMASIdx_S;
|
|
|
|
} else {
|
|
|
|
asidx = ARMASIdx_NS;
|
|
|
|
}
|
|
|
|
as = cpu_get_address_space(cs, asidx);
|
|
|
|
|
2013-07-29 18:36:59 +02:00
|
|
|
if (kernel_filename) {
|
2019-01-15 13:18:03 +01:00
|
|
|
image_size = load_elf_as(kernel_filename, NULL, NULL, NULL,
|
2020-01-26 23:55:04 +01:00
|
|
|
&entry, &lowaddr, NULL,
|
2018-03-02 11:45:36 +01:00
|
|
|
NULL, big_endian, EM_ARM, 1, 0, as);
|
2013-07-29 18:36:59 +02:00
|
|
|
if (image_size < 0) {
|
2018-03-02 11:45:36 +01:00
|
|
|
image_size = load_image_targphys_as(kernel_filename, 0,
|
|
|
|
mem_size, as);
|
2013-07-29 18:36:59 +02:00
|
|
|
lowaddr = 0;
|
|
|
|
}
|
|
|
|
if (image_size < 0) {
|
|
|
|
error_report("Could not load kernel '%s'", kernel_filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
2007-11-11 01:04:49 +01:00
|
|
|
}
|
|
|
|
|
2017-02-20 16:35:55 +01:00
|
|
|
/* CPU objects (unlike devices) are not automatically reset on system
|
|
|
|
* reset, so we must always register a handler to do so. Unlike
|
|
|
|
* A-profile CPUs, we don't need to do anything special in the
|
|
|
|
* handler to arrange that it starts correctly.
|
|
|
|
* This is arguably the wrong place to do this, but it matches the
|
|
|
|
* way A-profile does it. Note that this means that every M profile
|
|
|
|
* board must call this function!
|
|
|
|
*/
|
2012-05-04 16:11:34 +02:00
|
|
|
qemu_register_reset(armv7m_reset, cpu);
|
2007-11-11 01:04:49 +01:00
|
|
|
}
|
2009-06-03 16:16:49 +02:00
|
|
|
|
2012-01-24 20:12:29 +01:00
|
|
|
static Property bitband_properties[] = {
|
|
|
|
DEFINE_PROP_UINT32("base", BitBandState, base, 0),
|
2017-09-07 14:54:50 +02:00
|
|
|
DEFINE_PROP_LINK("source-memory", BitBandState, source_memory,
|
|
|
|
TYPE_MEMORY_REGION, MemoryRegion *),
|
2012-01-24 20:12:29 +01:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void bitband_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
2011-12-08 04:34:16 +01:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
2012-01-24 20:12:29 +01:00
|
|
|
|
2017-02-20 16:36:01 +01:00
|
|
|
dc->realize = bitband_realize;
|
2020-01-10 16:30:32 +01:00
|
|
|
device_class_set_props(dc, bitband_properties);
|
2012-01-24 20:12:29 +01:00
|
|
|
}
|
|
|
|
|
2013-01-10 16:19:07 +01:00
|
|
|
static const TypeInfo bitband_info = {
|
2013-07-24 00:46:43 +02:00
|
|
|
.name = TYPE_BITBAND,
|
2011-12-08 04:34:16 +01:00
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
|
|
|
.instance_size = sizeof(BitBandState),
|
2016-03-07 08:05:42 +01:00
|
|
|
.instance_init = bitband_init,
|
2011-12-08 04:34:16 +01:00
|
|
|
.class_init = bitband_class_init,
|
2009-07-15 13:43:31 +02:00
|
|
|
};
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
static void armv7m_register_types(void)
|
2009-06-03 16:16:49 +02:00
|
|
|
{
|
2011-12-08 04:34:16 +01:00
|
|
|
type_register_static(&bitband_info);
|
2017-02-20 16:35:57 +01:00
|
|
|
type_register_static(&armv7m_info);
|
2009-06-03 16:16:49 +02:00
|
|
|
}
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
type_init(armv7m_register_types)
|