2006-06-14 14:56:19 +02:00
|
|
|
/*
|
|
|
|
* MIPS emulation micro-operations templates for floating point reg
|
|
|
|
* load & store for qemu.
|
|
|
|
*
|
|
|
|
* Copyright (c) 2006 Marius Groeger
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
|
|
|
* version 2 of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
|
|
* License along with this library; if not, write to the Free Software
|
|
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
|
|
*/
|
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
#if defined(FREG)
|
2006-06-14 14:56:19 +02:00
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
#define OP_WLOAD_FREG(treg, tregname, FREG) \
|
|
|
|
void glue(glue(op_load_fpr_,tregname), FREG) (void) \
|
|
|
|
{ \
|
|
|
|
treg = env->fpr[FREG].fs[FP_ENDIAN_IDX]; \
|
|
|
|
RETURN(); \
|
2006-06-14 14:56:19 +02:00
|
|
|
}
|
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
#define OP_WSTORE_FREG(treg, tregname, FREG) \
|
|
|
|
void glue(glue(op_store_fpr_,tregname), FREG) (void) \
|
|
|
|
{ \
|
|
|
|
env->fpr[FREG].fs[FP_ENDIAN_IDX] = treg; \
|
|
|
|
RETURN(); \
|
2006-06-14 14:56:19 +02:00
|
|
|
}
|
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
/* WT0 = FREG.w: op_load_fpr_WT0_fprFREG */
|
|
|
|
OP_WLOAD_FREG(WT0, WT0_fpr, FREG)
|
|
|
|
/* FREG.w = WT0: op_store_fpr_WT0_fprFREG */
|
|
|
|
OP_WSTORE_FREG(WT0, WT0_fpr, FREG)
|
|
|
|
|
|
|
|
OP_WLOAD_FREG(WT1, WT1_fpr, FREG)
|
|
|
|
OP_WSTORE_FREG(WT1, WT1_fpr, FREG)
|
|
|
|
|
|
|
|
OP_WLOAD_FREG(WT2, WT2_fpr, FREG)
|
|
|
|
OP_WSTORE_FREG(WT2, WT2_fpr, FREG)
|
|
|
|
|
|
|
|
#define OP_DLOAD_FREG(treg, tregname, FREG) \
|
|
|
|
void glue(glue(op_load_fpr_,tregname), FREG) (void) \
|
|
|
|
{ \
|
|
|
|
if (env->CP0_Status & (1 << CP0St_FR)) \
|
|
|
|
treg = env->fpr[FREG].fd; \
|
|
|
|
else \
|
|
|
|
treg = (uint64_t)(env->fpr[FREG | 1].fs[FP_ENDIAN_IDX]) << 32 | \
|
|
|
|
env->fpr[FREG & ~1].fs[FP_ENDIAN_IDX]; \
|
|
|
|
RETURN(); \
|
|
|
|
}
|
2006-06-14 14:56:19 +02:00
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
#define OP_DSTORE_FREG(treg, tregname, FREG) \
|
|
|
|
void glue(glue(op_store_fpr_,tregname), FREG) (void) \
|
|
|
|
{ \
|
|
|
|
if (env->CP0_Status & (1 << CP0St_FR)) \
|
|
|
|
env->fpr[FREG].fd = treg; \
|
|
|
|
else { \
|
|
|
|
env->fpr[FREG | 1].fs[FP_ENDIAN_IDX] = treg >> 32; \
|
|
|
|
env->fpr[FREG & ~1].fs[FP_ENDIAN_IDX] = treg; \
|
|
|
|
} \
|
|
|
|
RETURN(); \
|
|
|
|
}
|
2006-06-14 14:56:19 +02:00
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
OP_DLOAD_FREG(DT0, DT0_fpr, FREG)
|
|
|
|
OP_DSTORE_FREG(DT0, DT0_fpr, FREG)
|
2006-06-14 14:56:19 +02:00
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
OP_DLOAD_FREG(DT1, DT1_fpr, FREG)
|
|
|
|
OP_DSTORE_FREG(DT1, DT1_fpr, FREG)
|
2006-06-14 14:56:19 +02:00
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
OP_DLOAD_FREG(DT2, DT2_fpr, FREG)
|
|
|
|
OP_DSTORE_FREG(DT2, DT2_fpr, FREG)
|
2006-06-14 14:56:19 +02:00
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
#define OP_PSLOAD_FREG(treg, tregname, FREG) \
|
|
|
|
void glue(glue(op_load_fpr_,tregname), FREG) (void) \
|
|
|
|
{ \
|
|
|
|
treg = env->fpr[FREG].fs[!FP_ENDIAN_IDX]; \
|
|
|
|
RETURN(); \
|
2006-06-14 14:56:19 +02:00
|
|
|
}
|
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
#define OP_PSSTORE_FREG(treg, tregname, FREG) \
|
|
|
|
void glue(glue(op_store_fpr_,tregname), FREG) (void) \
|
|
|
|
{ \
|
|
|
|
env->fpr[FREG].fs[!FP_ENDIAN_IDX] = treg; \
|
|
|
|
RETURN(); \
|
2006-06-14 14:56:19 +02:00
|
|
|
}
|
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
OP_PSLOAD_FREG(WTH0, WTH0_fpr, FREG)
|
|
|
|
OP_PSSTORE_FREG(WTH0, WTH0_fpr, FREG)
|
2006-06-14 14:56:19 +02:00
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
OP_PSLOAD_FREG(WTH1, WTH1_fpr, FREG)
|
|
|
|
OP_PSSTORE_FREG(WTH1, WTH1_fpr, FREG)
|
2006-06-14 14:56:19 +02:00
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
OP_PSLOAD_FREG(WTH2, WTH2_fpr, FREG)
|
|
|
|
OP_PSSTORE_FREG(WTH2, WTH2_fpr, FREG)
|
2006-06-14 14:56:19 +02:00
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if defined (FTN)
|
|
|
|
|
2007-05-07 15:55:33 +02:00
|
|
|
#define SET_RESET(treg, tregname) \
|
2006-06-14 14:56:19 +02:00
|
|
|
void glue(op_set, tregname)(void) \
|
2007-05-07 15:55:33 +02:00
|
|
|
{ \
|
|
|
|
treg = PARAM1; \
|
|
|
|
RETURN(); \
|
|
|
|
} \
|
2006-06-14 14:56:19 +02:00
|
|
|
void glue(op_reset, tregname)(void) \
|
2007-05-07 15:55:33 +02:00
|
|
|
{ \
|
|
|
|
treg = 0; \
|
|
|
|
RETURN(); \
|
|
|
|
}
|
2006-06-14 14:56:19 +02:00
|
|
|
|
|
|
|
SET_RESET(WT0, _WT0)
|
|
|
|
SET_RESET(WT1, _WT1)
|
|
|
|
SET_RESET(WT2, _WT2)
|
|
|
|
SET_RESET(DT0, _DT0)
|
|
|
|
SET_RESET(DT1, _DT1)
|
|
|
|
SET_RESET(DT2, _DT2)
|
2007-05-07 15:55:33 +02:00
|
|
|
SET_RESET(WTH0, _WTH0)
|
|
|
|
SET_RESET(WTH1, _WTH1)
|
|
|
|
SET_RESET(WTH2, _WTH2)
|
2006-06-14 14:56:19 +02:00
|
|
|
|
2006-12-21 02:19:56 +01:00
|
|
|
#undef SET_RESET
|
2006-06-14 14:56:19 +02:00
|
|
|
#endif
|