2009-08-23 15:38:50 +02:00
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/*
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* Bit-Bang i2c emulation extracted from
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* Marvell MV88W8618 / Freecom MusicPal emulation.
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*
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* Copyright (c) 2008 Jan Kiszka
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*
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2011-06-26 04:21:35 +02:00
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* This code is licensed under the GNU GPL v2.
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2012-01-13 17:44:23 +01:00
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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2009-08-23 15:38:50 +02:00
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*/
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2019-05-23 16:35:07 +02:00
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2016-01-26 19:17:30 +01:00
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#include "qemu/osdep.h"
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2019-08-12 07:23:42 +02:00
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#include "hw/irq.h"
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2019-06-20 12:55:23 +02:00
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#include "hw/i2c/bitbang_i2c.h"
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2013-02-04 15:40:22 +01:00
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#include "hw/sysbus.h"
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2019-05-23 16:35:07 +02:00
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#include "qemu/module.h"
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2020-09-03 22:43:22 +02:00
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#include "qom/object.h"
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2009-08-23 15:38:50 +02:00
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2009-11-21 00:37:15 +01:00
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//#define DEBUG_BITBANG_I2C
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#ifdef DEBUG_BITBANG_I2C
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#define DPRINTF(fmt, ...) \
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do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define DPRINTF(fmt, ...) do {} while(0)
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#endif
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2009-08-23 15:38:50 +02:00
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static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c)
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{
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2009-11-21 00:37:15 +01:00
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DPRINTF("STOP\n");
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2009-08-23 15:38:50 +02:00
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if (i2c->current_addr >= 0)
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i2c_end_transfer(i2c->bus);
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i2c->current_addr = -1;
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i2c->state = STOPPED;
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}
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2009-11-21 00:37:15 +01:00
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/* Set device data pin. */
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static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level)
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{
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i2c->device_out = level;
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//DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out);
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return level & i2c->last_data;
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}
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/* Leave device data pin unodified. */
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static int bitbang_i2c_nop(bitbang_i2c_interface *i2c)
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{
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return bitbang_i2c_ret(i2c, i2c->device_out);
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}
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/* Returns data line level. */
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int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level)
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2009-08-23 15:38:50 +02:00
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{
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int data;
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2009-11-21 00:37:15 +01:00
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if (level != 0 && level != 1) {
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abort();
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}
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2009-08-23 15:38:50 +02:00
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2009-11-21 00:37:15 +01:00
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if (line == BITBANG_I2C_SDA) {
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if (level == i2c->last_data) {
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return bitbang_i2c_nop(i2c);
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}
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i2c->last_data = level;
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if (i2c->last_clock == 0) {
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return bitbang_i2c_nop(i2c);
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}
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if (level == 0) {
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DPRINTF("START\n");
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/* START condition. */
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2009-08-23 15:38:50 +02:00
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i2c->state = SENDING_BIT7;
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2009-11-21 00:37:15 +01:00
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i2c->current_addr = -1;
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} else {
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/* STOP condition. */
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2009-08-23 15:38:50 +02:00
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bitbang_i2c_enter_stop(i2c);
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2009-11-21 00:37:15 +01:00
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}
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return bitbang_i2c_ret(i2c, 1);
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}
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data = i2c->last_data;
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if (i2c->last_clock == level) {
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return bitbang_i2c_nop(i2c);
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}
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i2c->last_clock = level;
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if (level == 0) {
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/* State is set/read at the start of the clock pulse.
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release the data line at the end. */
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return bitbang_i2c_ret(i2c, 1);
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}
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switch (i2c->state) {
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case STOPPED:
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2011-05-28 16:55:52 +02:00
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case SENT_NACK:
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2009-11-21 00:37:15 +01:00
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return bitbang_i2c_ret(i2c, 1);
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2009-08-23 15:38:50 +02:00
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case SENDING_BIT7 ... SENDING_BIT0:
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2009-11-21 00:37:15 +01:00
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i2c->buffer = (i2c->buffer << 1) | data;
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/* will end up in WAITING_FOR_ACK */
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i2c->state++;
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return bitbang_i2c_ret(i2c, 1);
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2009-08-23 15:38:50 +02:00
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case WAITING_FOR_ACK:
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2016-10-24 20:12:29 +02:00
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{
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int ret;
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2009-11-21 00:37:15 +01:00
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if (i2c->current_addr < 0) {
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i2c->current_addr = i2c->buffer;
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DPRINTF("Address 0x%02x\n", i2c->current_addr);
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2016-10-24 20:12:29 +02:00
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ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1,
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i2c->current_addr & 1);
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2009-11-21 00:37:15 +01:00
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} else {
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DPRINTF("Sent 0x%02x\n", i2c->buffer);
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2016-10-24 20:12:29 +02:00
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ret = i2c_send(i2c->bus, i2c->buffer);
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}
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if (ret) {
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/* NACK (either addressing a nonexistent device, or the
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* device we were sending to decided to NACK us).
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*/
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DPRINTF("Got NACK\n");
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bitbang_i2c_enter_stop(i2c);
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return bitbang_i2c_ret(i2c, 1);
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2009-11-21 00:37:15 +01:00
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}
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if (i2c->current_addr & 1) {
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i2c->state = RECEIVING_BIT7;
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} else {
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i2c->state = SENDING_BIT7;
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}
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return bitbang_i2c_ret(i2c, 0);
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2016-10-24 20:12:29 +02:00
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}
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2009-11-21 00:37:15 +01:00
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case RECEIVING_BIT7:
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i2c->buffer = i2c_recv(i2c->bus);
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DPRINTF("RX byte 0x%02x\n", i2c->buffer);
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/* Fall through... */
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case RECEIVING_BIT6 ... RECEIVING_BIT0:
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data = i2c->buffer >> 7;
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/* will end up in SENDING_ACK */
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i2c->state++;
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i2c->buffer <<= 1;
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return bitbang_i2c_ret(i2c, data);
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2009-08-23 15:38:50 +02:00
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case SENDING_ACK:
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2009-11-21 00:37:15 +01:00
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i2c->state = RECEIVING_BIT7;
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if (data != 0) {
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DPRINTF("NACKED\n");
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2011-05-28 16:55:52 +02:00
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i2c->state = SENT_NACK;
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2009-11-21 00:37:15 +01:00
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i2c_nack(i2c->bus);
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} else {
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DPRINTF("ACKED\n");
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}
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return bitbang_i2c_ret(i2c, 1);
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2009-08-23 15:38:50 +02:00
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}
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2009-11-21 00:37:15 +01:00
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abort();
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}
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2019-07-02 18:38:44 +02:00
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void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus)
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2009-11-21 00:37:15 +01:00
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{
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s->bus = bus;
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s->last_data = 1;
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s->last_clock = 1;
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s->device_out = 1;
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}
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2009-08-23 15:38:50 +02:00
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2009-11-21 00:37:15 +01:00
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/* GPIO interface. */
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2013-07-26 18:13:46 +02:00
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#define TYPE_GPIO_I2C "gpio_i2c"
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2020-09-16 20:25:19 +02:00
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OBJECT_DECLARE_SIMPLE_TYPE(GPIOI2CState, GPIO_I2C)
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2013-07-26 18:13:46 +02:00
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2020-09-03 22:43:22 +02:00
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struct GPIOI2CState {
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2013-07-26 18:13:46 +02:00
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SysBusDevice parent_obj;
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2011-11-14 11:59:29 +01:00
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MemoryRegion dummy_iomem;
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2019-07-02 18:38:44 +02:00
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bitbang_i2c_interface bitbang;
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2009-11-21 00:37:15 +01:00
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int last_level;
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qemu_irq out;
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2020-09-03 22:43:22 +02:00
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};
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2009-11-21 00:37:15 +01:00
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static void bitbang_i2c_gpio_set(void *opaque, int irq, int level)
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{
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GPIOI2CState *s = opaque;
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2019-07-02 18:38:44 +02:00
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level = bitbang_i2c_set(&s->bitbang, irq, level);
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2009-11-21 00:37:15 +01:00
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if (level != s->last_level) {
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s->last_level = level;
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qemu_set_irq(s->out, level);
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}
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2009-08-23 15:38:50 +02:00
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}
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2016-06-14 16:59:13 +02:00
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static void gpio_i2c_init(Object *obj)
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2009-08-23 15:38:50 +02:00
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{
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2016-06-14 16:59:13 +02:00
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DeviceState *dev = DEVICE(obj);
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GPIOI2CState *s = GPIO_I2C(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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2013-08-03 00:18:51 +02:00
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I2CBus *bus;
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2009-08-23 15:38:50 +02:00
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2016-06-14 16:59:13 +02:00
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memory_region_init(&s->dummy_iomem, obj, "gpio_i2c", 0);
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2013-07-26 18:13:46 +02:00
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sysbus_init_mmio(sbd, &s->dummy_iomem);
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2009-08-23 15:38:50 +02:00
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2013-07-26 18:13:46 +02:00
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bus = i2c_init_bus(dev, "i2c");
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2019-07-02 18:38:44 +02:00
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bitbang_i2c_init(&s->bitbang, bus);
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2009-08-23 15:38:50 +02:00
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2013-07-26 18:13:46 +02:00
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qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2);
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qdev_init_gpio_out(dev, &s->out, 1);
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2009-08-23 15:38:50 +02:00
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}
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2012-01-24 20:12:29 +01:00
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static void gpio_i2c_class_init(ObjectClass *klass, void *data)
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{
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2011-12-08 04:34:16 +01:00
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DeviceClass *dc = DEVICE_CLASS(klass);
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2012-01-24 20:12:29 +01:00
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2013-07-29 16:17:45 +02:00
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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2011-12-08 04:34:16 +01:00
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dc->desc = "Virtual GPIO to I2C bridge";
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2012-01-24 20:12:29 +01:00
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}
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2013-01-10 16:19:07 +01:00
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static const TypeInfo gpio_i2c_info = {
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2013-07-26 18:13:46 +02:00
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.name = TYPE_GPIO_I2C,
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2011-12-08 04:34:16 +01:00
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(GPIOI2CState),
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2016-06-14 16:59:13 +02:00
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.instance_init = gpio_i2c_init,
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2011-12-08 04:34:16 +01:00
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.class_init = gpio_i2c_class_init,
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2009-11-21 00:37:15 +01:00
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};
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2012-02-09 15:20:55 +01:00
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static void bitbang_i2c_register_types(void)
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2009-08-23 15:38:50 +02:00
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{
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2011-12-08 04:34:16 +01:00
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type_register_static(&gpio_i2c_info);
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2009-08-23 15:38:50 +02:00
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}
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2012-02-09 15:20:55 +01:00
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type_init(bitbang_i2c_register_types)
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