2013-12-10 14:24:51 +01:00
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/*
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* Global peripheral timer block for ARM A9MP
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*
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* (C) 2013 Xilinx Inc.
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*
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* Written by François LEGAL
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* Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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2016-01-26 19:17:05 +01:00
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#include "qemu/osdep.h"
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2019-08-12 07:23:48 +02:00
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#include "hw/hw.h"
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2019-08-12 07:23:42 +02:00
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#include "hw/irq.h"
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2019-08-12 07:23:51 +02:00
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#include "hw/qdev-properties.h"
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2013-12-10 14:24:51 +01:00
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#include "hw/timer/a9gtimer.h"
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2019-08-12 07:23:45 +02:00
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#include "migration/vmstate.h"
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include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 09:01:28 +01:00
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#include "qapi/error.h"
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2013-12-10 14:24:51 +01:00
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#include "qemu/timer.h"
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#include "qemu/bitops.h"
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#include "qemu/log.h"
|
2019-05-23 16:35:07 +02:00
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#include "qemu/module.h"
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2019-07-09 17:20:52 +02:00
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#include "hw/core/cpu.h"
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2013-12-10 14:24:51 +01:00
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#ifndef A9_GTIMER_ERR_DEBUG
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#define A9_GTIMER_ERR_DEBUG 0
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#endif
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#define DB_PRINT_L(level, ...) do { \
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if (A9_GTIMER_ERR_DEBUG > (level)) { \
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fprintf(stderr, ": %s: ", __func__); \
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fprintf(stderr, ## __VA_ARGS__); \
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} \
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maint: Fix macros with broken 'do/while(0); ' usage
The point of writing a macro embedded in a 'do { ... } while (0)'
loop (particularly if the macro has multiple statements or would
otherwise end with an 'if' statement) is so that the macro can be
used as a drop-in statement with the caller supplying the
trailing ';'. Although our coding style frowns on brace-less 'if':
if (cond)
statement;
else
something else;
that is the classic case where failure to use do/while(0) wrapping
would cause the 'else' to pair with any embedded 'if' in the macro
rather than the intended outer 'if'. But conversely, if the macro
includes an embedded ';', then the same brace-less coding style
would now have two statements, making the 'else' a syntax error
rather than pairing with the outer 'if'. Thus, even though our
coding style with required braces is not impacted, ending a macro
with ';' makes our code harder to port to projects that use
brace-less styles.
The change should have no semantic impact. I was not able to
fully compile-test all of the changes (as some of them are
examples of the ugly bit-rotting debug print statements that are
completely elided by default, and I didn't want to recompile
with the necessary -D witnesses - cleaning those up is left as a
bite-sized task for another day); I did, however, audit that for
all files touched, all callers of the changed macros DID supply
a trailing ';' at the callsite, and did not appear to be used
as part of a brace-less conditional.
Found mechanically via: $ git grep -B1 'while (0);' | grep -A1 \\\\
Signed-off-by: Eric Blake <eblake@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <20171201232433.25193-7-eblake@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-02 00:24:32 +01:00
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} while (0)
|
2013-12-10 14:24:51 +01:00
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#define DB_PRINT(...) DB_PRINT_L(0, ## __VA_ARGS__)
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static inline int a9_gtimer_get_current_cpu(A9GTimerState *s)
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{
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if (current_cpu->cpu_index >= s->num_cpu) {
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hw_error("a9gtimer: num-cpu %d but this cpu is %d!\n",
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s->num_cpu, current_cpu->cpu_index);
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}
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return current_cpu->cpu_index;
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}
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static inline uint64_t a9_gtimer_get_conv(A9GTimerState *s)
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{
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uint64_t prescale = extract32(s->control, R_CONTROL_PRESCALER_SHIFT,
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R_CONTROL_PRESCALER_LEN);
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return (prescale + 1) * 10;
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}
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static A9GTimerUpdate a9_gtimer_get_update(A9GTimerState *s)
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{
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A9GTimerUpdate ret;
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ret.now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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ret.new = s->ref_counter +
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(ret.now - s->cpu_ref_time) / a9_gtimer_get_conv(s);
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return ret;
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}
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static void a9_gtimer_update(A9GTimerState *s, bool sync)
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{
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A9GTimerUpdate update = a9_gtimer_get_update(s);
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int i;
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int64_t next_cdiff = 0;
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for (i = 0; i < s->num_cpu; ++i) {
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A9GTimerPerCPU *gtb = &s->per_cpu[i];
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int64_t cdiff = 0;
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if ((s->control & R_CONTROL_TIMER_ENABLE) &&
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(gtb->control & R_CONTROL_COMP_ENABLE)) {
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/* R2p0+, where the compare function is >= */
|
2016-10-24 17:26:54 +02:00
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if (gtb->compare < update.new) {
|
2013-12-10 14:24:51 +01:00
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DB_PRINT("Compare event happened for CPU %d\n", i);
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gtb->status = 1;
|
2016-10-24 17:26:54 +02:00
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if (gtb->control & R_CONTROL_AUTO_INCREMENT && gtb->inc) {
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uint64_t inc =
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QEMU_ALIGN_UP(update.new - gtb->compare, gtb->inc);
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DB_PRINT("Auto incrementing timer compare by %"
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PRId64 "\n", inc);
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gtb->compare += inc;
|
2013-12-10 14:24:51 +01:00
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}
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}
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cdiff = (int64_t)gtb->compare - (int64_t)update.new + 1;
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if (cdiff > 0 && (cdiff < next_cdiff || !next_cdiff)) {
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next_cdiff = cdiff;
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}
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}
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qemu_set_irq(gtb->irq,
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gtb->status && (gtb->control & R_CONTROL_IRQ_ENABLE));
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}
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timer_del(s->timer);
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if (next_cdiff) {
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DB_PRINT("scheduling qemu_timer to fire again in %"
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PRIx64 " cycles\n", next_cdiff);
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timer_mod(s->timer, update.now + next_cdiff * a9_gtimer_get_conv(s));
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}
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if (s->control & R_CONTROL_TIMER_ENABLE) {
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s->counter = update.new;
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}
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if (sync) {
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s->cpu_ref_time = update.now;
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s->ref_counter = s->counter;
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}
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}
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static void a9_gtimer_update_no_sync(void *opaque)
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{
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A9GTimerState *s = A9_GTIMER(opaque);
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|
|
2015-03-08 19:30:01 +01:00
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|
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a9_gtimer_update(s, false);
|
2013-12-10 14:24:51 +01:00
|
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|
}
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static uint64_t a9_gtimer_read(void *opaque, hwaddr addr, unsigned size)
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|
|
{
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A9GTimerPerCPU *gtb = (A9GTimerPerCPU *)opaque;
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A9GTimerState *s = gtb->parent;
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A9GTimerUpdate update;
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uint64_t ret = 0;
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int shift = 0;
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switch (addr) {
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|
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case R_COUNTER_HI:
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shift = 32;
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/* fallthrough */
|
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case R_COUNTER_LO:
|
|
|
|
update = a9_gtimer_get_update(s);
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|
|
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ret = extract64(update.new, shift, 32);
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|
|
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break;
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|
|
|
case R_CONTROL:
|
|
|
|
ret = s->control | gtb->control;
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|
|
|
break;
|
|
|
|
case R_INTERRUPT_STATUS:
|
|
|
|
ret = gtb->status;
|
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|
|
break;
|
|
|
|
case R_COMPARATOR_HI:
|
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shift = 32;
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|
|
/* fallthrough */
|
|
|
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case R_COMPARATOR_LO:
|
|
|
|
ret = extract64(gtb->compare, shift, 32);
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|
|
|
break;
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|
|
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case R_AUTO_INCREMENT:
|
|
|
|
ret = gtb->inc;
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|
|
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break;
|
|
|
|
default:
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "bad a9gtimer register: %x\n",
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|
|
|
(unsigned)addr);
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|
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|
return 0;
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|
|
|
}
|
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|
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|
|
DB_PRINT("addr:%#x data:%#08" PRIx64 "\n", (unsigned)addr, ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void a9_gtimer_write(void *opaque, hwaddr addr, uint64_t value,
|
|
|
|
unsigned size)
|
|
|
|
{
|
|
|
|
A9GTimerPerCPU *gtb = (A9GTimerPerCPU *)opaque;
|
|
|
|
A9GTimerState *s = gtb->parent;
|
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|
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int shift = 0;
|
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|
|
|
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|
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DB_PRINT("addr:%#x data:%#08" PRIx64 "\n", (unsigned)addr, value);
|
|
|
|
|
|
|
|
switch (addr) {
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|
|
|
case R_COUNTER_HI:
|
|
|
|
shift = 32;
|
|
|
|
/* fallthrough */
|
|
|
|
case R_COUNTER_LO:
|
|
|
|
/*
|
|
|
|
* Keep it simple - ARM docco explicitly says to disable timer before
|
2016-03-23 15:59:57 +01:00
|
|
|
* modding it, so don't bother trying to do all the difficult on the fly
|
2013-12-10 14:24:51 +01:00
|
|
|
* timer modifications - (if they even work in real hardware??).
|
|
|
|
*/
|
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|
if (s->control & R_CONTROL_TIMER_ENABLE) {
|
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|
|
qemu_log_mask(LOG_GUEST_ERROR, "Cannot mod running ARM gtimer\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
s->counter = deposit64(s->counter, shift, 32, value);
|
|
|
|
return;
|
|
|
|
case R_CONTROL:
|
|
|
|
a9_gtimer_update(s, (value ^ s->control) & R_CONTROL_NEEDS_SYNC);
|
|
|
|
gtb->control = value & R_CONTROL_BANKED;
|
|
|
|
s->control = value & ~R_CONTROL_BANKED;
|
|
|
|
break;
|
|
|
|
case R_INTERRUPT_STATUS:
|
|
|
|
a9_gtimer_update(s, false);
|
|
|
|
gtb->status &= ~value;
|
|
|
|
break;
|
|
|
|
case R_COMPARATOR_HI:
|
|
|
|
shift = 32;
|
|
|
|
/* fallthrough */
|
|
|
|
case R_COMPARATOR_LO:
|
|
|
|
a9_gtimer_update(s, false);
|
|
|
|
gtb->compare = deposit64(gtb->compare, shift, 32, value);
|
|
|
|
break;
|
|
|
|
case R_AUTO_INCREMENT:
|
|
|
|
gtb->inc = value;
|
|
|
|
return;
|
|
|
|
default:
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
a9_gtimer_update(s, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Wrapper functions to implement the "read global timer for
|
|
|
|
* the current CPU" memory regions.
|
|
|
|
*/
|
|
|
|
static uint64_t a9_gtimer_this_read(void *opaque, hwaddr addr,
|
|
|
|
unsigned size)
|
|
|
|
{
|
|
|
|
A9GTimerState *s = A9_GTIMER(opaque);
|
|
|
|
int id = a9_gtimer_get_current_cpu(s);
|
|
|
|
|
|
|
|
/* no \n so concatenates with message from read fn */
|
|
|
|
DB_PRINT("CPU:%d:", id);
|
|
|
|
|
|
|
|
return a9_gtimer_read(&s->per_cpu[id], addr, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void a9_gtimer_this_write(void *opaque, hwaddr addr,
|
|
|
|
uint64_t value, unsigned size)
|
|
|
|
{
|
|
|
|
A9GTimerState *s = A9_GTIMER(opaque);
|
|
|
|
int id = a9_gtimer_get_current_cpu(s);
|
|
|
|
|
|
|
|
/* no \n so concatenates with message from write fn */
|
|
|
|
DB_PRINT("CPU:%d:", id);
|
|
|
|
|
|
|
|
a9_gtimer_write(&s->per_cpu[id], addr, value, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const MemoryRegionOps a9_gtimer_this_ops = {
|
|
|
|
.read = a9_gtimer_this_read,
|
|
|
|
.write = a9_gtimer_this_write,
|
|
|
|
.valid = {
|
|
|
|
.min_access_size = 4,
|
|
|
|
.max_access_size = 4,
|
|
|
|
},
|
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const MemoryRegionOps a9_gtimer_ops = {
|
|
|
|
.read = a9_gtimer_read,
|
|
|
|
.write = a9_gtimer_write,
|
|
|
|
.valid = {
|
|
|
|
.min_access_size = 4,
|
|
|
|
.max_access_size = 4,
|
|
|
|
},
|
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void a9_gtimer_reset(DeviceState *dev)
|
|
|
|
{
|
|
|
|
A9GTimerState *s = A9_GTIMER(dev);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
s->counter = 0;
|
|
|
|
s->control = 0;
|
|
|
|
|
|
|
|
for (i = 0; i < s->num_cpu; i++) {
|
|
|
|
A9GTimerPerCPU *gtb = &s->per_cpu[i];
|
|
|
|
|
|
|
|
gtb->control = 0;
|
|
|
|
gtb->status = 0;
|
|
|
|
gtb->compare = 0;
|
|
|
|
gtb->inc = 0;
|
|
|
|
}
|
|
|
|
a9_gtimer_update(s, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void a9_gtimer_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
A9GTimerState *s = A9_GTIMER(dev);
|
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (s->num_cpu < 1 || s->num_cpu > A9_GTIMER_MAX_CPUS) {
|
2015-02-25 05:22:28 +01:00
|
|
|
error_setg(errp, "%s: num-cpu must be between 1 and %d",
|
2013-12-10 14:24:51 +01:00
|
|
|
__func__, A9_GTIMER_MAX_CPUS);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
memory_region_init_io(&s->iomem, OBJECT(dev), &a9_gtimer_this_ops, s,
|
|
|
|
"a9gtimer shared", 0x20);
|
|
|
|
sysbus_init_mmio(sbd, &s->iomem);
|
|
|
|
s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, a9_gtimer_update_no_sync, s);
|
|
|
|
|
|
|
|
for (i = 0; i < s->num_cpu; i++) {
|
|
|
|
A9GTimerPerCPU *gtb = &s->per_cpu[i];
|
|
|
|
|
|
|
|
gtb->parent = s;
|
|
|
|
sysbus_init_irq(sbd, >b->irq);
|
|
|
|
memory_region_init_io(>b->iomem, OBJECT(dev), &a9_gtimer_ops, gtb,
|
|
|
|
"a9gtimer per cpu", 0x20);
|
|
|
|
sysbus_init_mmio(sbd, >b->iomem);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_a9_gtimer_per_cpu = {
|
|
|
|
.name = "arm.cortex-a9-global-timer.percpu",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT32(control, A9GTimerPerCPU),
|
|
|
|
VMSTATE_UINT64(compare, A9GTimerPerCPU),
|
|
|
|
VMSTATE_UINT32(status, A9GTimerPerCPU),
|
|
|
|
VMSTATE_UINT32(inc, A9GTimerPerCPU),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_a9_gtimer = {
|
|
|
|
.name = "arm.cortex-a9-global-timer",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.fields = (VMStateField[]) {
|
2015-01-08 10:18:59 +01:00
|
|
|
VMSTATE_TIMER_PTR(timer, A9GTimerState),
|
2013-12-10 14:24:51 +01:00
|
|
|
VMSTATE_UINT64(counter, A9GTimerState),
|
|
|
|
VMSTATE_UINT64(ref_counter, A9GTimerState),
|
|
|
|
VMSTATE_UINT64(cpu_ref_time, A9GTimerState),
|
|
|
|
VMSTATE_STRUCT_VARRAY_UINT32(per_cpu, A9GTimerState, num_cpu,
|
|
|
|
1, vmstate_a9_gtimer_per_cpu,
|
|
|
|
A9GTimerPerCPU),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static Property a9_gtimer_properties[] = {
|
|
|
|
DEFINE_PROP_UINT32("num-cpu", A9GTimerState, num_cpu, 0),
|
|
|
|
DEFINE_PROP_END_OF_LIST()
|
|
|
|
};
|
|
|
|
|
|
|
|
static void a9_gtimer_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
|
|
|
dc->realize = a9_gtimer_realize;
|
|
|
|
dc->vmsd = &vmstate_a9_gtimer;
|
|
|
|
dc->reset = a9_gtimer_reset;
|
2020-01-10 16:30:32 +01:00
|
|
|
device_class_set_props(dc, a9_gtimer_properties);
|
2013-12-10 14:24:51 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo a9_gtimer_info = {
|
|
|
|
.name = TYPE_A9_GTIMER,
|
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
|
|
|
.instance_size = sizeof(A9GTimerState),
|
|
|
|
.class_init = a9_gtimer_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void a9_gtimer_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&a9_gtimer_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(a9_gtimer_register_types)
|