311 lines
10 KiB
C
311 lines
10 KiB
C
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/*
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* SPDX-License-Identifer: GPL-2.0-or-later
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*
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* QEMU Vitual M68K Machine
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*
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* (c) 2020 Laurent Vivier <laurent@vivier.eu>
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*
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qemu-common.h"
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#include "sysemu/sysemu.h"
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#include "cpu.h"
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#include "hw/boards.h"
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#include "hw/qdev-properties.h"
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#include "elf.h"
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#include "hw/loader.h"
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#include "ui/console.h"
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#include "hw/sysbus.h"
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#include "standard-headers/asm-m68k/bootinfo.h"
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#include "standard-headers/asm-m68k/bootinfo-virt.h"
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#include "bootinfo.h"
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#include "net/net.h"
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#include "qapi/error.h"
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#include "sysemu/qtest.h"
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#include "sysemu/runstate.h"
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#include "sysemu/reset.h"
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#include "hw/intc/m68k_irqc.h"
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#include "hw/misc/virt_ctrl.h"
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#include "hw/char/goldfish_tty.h"
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#include "hw/rtc/goldfish_rtc.h"
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#include "hw/intc/goldfish_pic.h"
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#include "hw/virtio/virtio-mmio.h"
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#include "hw/virtio/virtio-blk.h"
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/*
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* 6 goldfish-pic for CPU IRQ #1 to IRQ #6
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* CPU IRQ #1 -> PIC #1
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* IRQ #1 to IRQ #31 -> unused
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* IRQ #32 -> goldfish-tty
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* CPU IRQ #2 -> PIC #2
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* IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
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* CPU IRQ #3 -> PIC #3
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* IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
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* CPU IRQ #4 -> PIC #4
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* IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96
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* CPU IRQ #5 -> PIC #5
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* IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128
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* CPU IRQ #6 -> PIC #6
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* IRQ #1 -> goldfish-rtc
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* IRQ #2 to IRQ #32 -> unused
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* CPU IRQ #7 -> NMI
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*/
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#define PIC_IRQ_BASE(num) (8 + (num - 1) * 32)
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#define PIC_IRQ(num, irq) (PIC_IRQ_BASE(num) + irq - 1)
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#define PIC_GPIO(pic_irq) (qdev_get_gpio_in(pic_dev[(pic_irq - 8) / 32], \
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(pic_irq - 8) % 32))
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#define VIRT_GF_PIC_MMIO_BASE 0xff000000 /* MMIO: 0xff000000 - 0xff005fff */
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#define VIRT_GF_PIC_IRQ_BASE 1 /* IRQ: #1 -> #6 */
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#define VIRT_GF_PIC_NB 6
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/* 2 goldfish-rtc (and timer) */
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#define VIRT_GF_RTC_MMIO_BASE 0xff006000 /* MMIO: 0xff006000 - 0xff007fff */
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#define VIRT_GF_RTC_IRQ_BASE PIC_IRQ(6, 1) /* PIC: #6, IRQ: #1 */
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#define VIRT_GF_RTC_NB 2
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/* 1 goldfish-tty */
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#define VIRT_GF_TTY_MMIO_BASE 0xff008000 /* MMIO: 0xff008000 - 0xff008fff */
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#define VIRT_GF_TTY_IRQ_BASE PIC_IRQ(1, 32) /* PIC: #1, IRQ: #32 */
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/* 1 virt-ctrl */
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#define VIRT_CTRL_MMIO_BASE 0xff009000 /* MMIO: 0xff009000 - 0xff009fff */
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#define VIRT_CTRL_IRQ_BASE PIC_IRQ(1, 1) /* PIC: #1, IRQ: #1 */
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/*
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* virtio-mmio size is 0x200 bytes
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* we use 4 goldfish-pic to attach them,
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* we can attach 32 virtio devices / goldfish-pic
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* -> we can manage 32 * 4 = 128 virtio devices
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*/
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#define VIRT_VIRTIO_MMIO_BASE 0xff010000 /* MMIO: 0xff010000 - 0xff01ffff */
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#define VIRT_VIRTIO_IRQ_BASE PIC_IRQ(2, 1) /* PIC: 2, 3, 4, 5, IRQ: ALL */
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static void main_cpu_reset(void *opaque)
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{
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M68kCPU *cpu = opaque;
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CPUState *cs = CPU(cpu);
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cpu_reset(cs);
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cpu->env.aregs[7] = ldl_phys(cs->as, 0);
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cpu->env.pc = ldl_phys(cs->as, 4);
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}
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static void virt_init(MachineState *machine)
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{
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M68kCPU *cpu = NULL;
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int32_t kernel_size;
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uint64_t elf_entry;
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ram_addr_t initrd_base;
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int32_t initrd_size;
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ram_addr_t ram_size = machine->ram_size;
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const char *kernel_filename = machine->kernel_filename;
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const char *initrd_filename = machine->initrd_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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hwaddr parameters_base;
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DeviceState *dev;
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DeviceState *irqc_dev;
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DeviceState *pic_dev[VIRT_GF_PIC_NB];
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SysBusDevice *sysbus;
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hwaddr io_base;
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int i;
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if (ram_size > 3399672 * KiB) {
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/*
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* The physical memory can be up to 4 GiB - 16 MiB, but linux
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* kernel crashes after this limit (~ 3.2 GiB)
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*/
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error_report("Too much memory for this machine: %" PRId64 " KiB, "
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"maximum 3399672 KiB", ram_size / KiB);
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exit(1);
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}
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/* init CPUs */
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cpu = M68K_CPU(cpu_create(machine->cpu_type));
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qemu_register_reset(main_cpu_reset, cpu);
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/* RAM */
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memory_region_add_subregion(get_system_memory(), 0, machine->ram);
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/* IRQ Controller */
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irqc_dev = qdev_new(TYPE_M68K_IRQC);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal);
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/*
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* 6 goldfish-pic
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*
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* map: 0xff000000 - 0xff006fff = 28 KiB
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* IRQ: #1 (lower priority) -> #6 (higher priority)
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*
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*/
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io_base = VIRT_GF_PIC_MMIO_BASE;
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for (i = 0; i < VIRT_GF_PIC_NB; i++) {
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pic_dev[i] = qdev_new(TYPE_GOLDFISH_PIC);
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sysbus = SYS_BUS_DEVICE(pic_dev[i]);
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qdev_prop_set_uint8(pic_dev[i], "index", i);
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sysbus_realize_and_unref(sysbus, &error_fatal);
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sysbus_mmio_map(sysbus, 0, io_base);
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sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(irqc_dev, i));
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io_base += 0x1000;
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}
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/* goldfish-rtc */
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io_base = VIRT_GF_RTC_MMIO_BASE;
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for (i = 0; i < VIRT_GF_RTC_NB; i++) {
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dev = qdev_new(TYPE_GOLDFISH_RTC);
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sysbus = SYS_BUS_DEVICE(dev);
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sysbus_realize_and_unref(sysbus, &error_fatal);
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sysbus_mmio_map(sysbus, 0, io_base);
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sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_RTC_IRQ_BASE + i));
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io_base += 0x1000;
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}
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/* goldfish-tty */
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dev = qdev_new(TYPE_GOLDFISH_TTY);
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sysbus = SYS_BUS_DEVICE(dev);
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qdev_prop_set_chr(dev, "chardev", serial_hd(0));
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sysbus_realize_and_unref(sysbus, &error_fatal);
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sysbus_mmio_map(sysbus, 0, VIRT_GF_TTY_MMIO_BASE);
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sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE));
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/* virt controller */
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dev = qdev_new(TYPE_VIRT_CTRL);
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sysbus = SYS_BUS_DEVICE(dev);
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sysbus_realize_and_unref(sysbus, &error_fatal);
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sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE);
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sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE));
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/* virtio-mmio */
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io_base = VIRT_VIRTIO_MMIO_BASE;
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for (i = 0; i < 128; i++) {
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dev = qdev_new(TYPE_VIRTIO_MMIO);
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qdev_prop_set_bit(dev, "force-legacy", false);
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sysbus = SYS_BUS_DEVICE(dev);
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sysbus_realize_and_unref(sysbus, &error_fatal);
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sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_VIRTIO_IRQ_BASE + i));
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sysbus_mmio_map(sysbus, 0, io_base);
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io_base += 0x200;
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}
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if (kernel_filename) {
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CPUState *cs = CPU(cpu);
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uint64_t high;
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kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
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&elf_entry, NULL, &high, NULL, 1,
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EM_68K, 0, 0);
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if (kernel_size < 0) {
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error_report("could not load kernel '%s'", kernel_filename);
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exit(1);
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}
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stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
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parameters_base = (high + 1) & ~1;
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BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_VIRT);
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BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040);
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BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040);
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BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040);
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BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size);
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BOOTINFO1(cs->as, parameters_base, BI_VIRT_QEMU_VERSION,
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((QEMU_VERSION_MAJOR << 24) | (QEMU_VERSION_MINOR << 16) |
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(QEMU_VERSION_MICRO << 8)));
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BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_PIC_BASE,
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VIRT_GF_PIC_MMIO_BASE, VIRT_GF_PIC_IRQ_BASE);
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BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_RTC_BASE,
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VIRT_GF_RTC_MMIO_BASE, VIRT_GF_RTC_IRQ_BASE);
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BOOTINFO2(cs->as, parameters_base, BI_VIRT_GF_TTY_BASE,
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VIRT_GF_TTY_MMIO_BASE, VIRT_GF_TTY_IRQ_BASE);
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BOOTINFO2(cs->as, parameters_base, BI_VIRT_CTRL_BASE,
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VIRT_CTRL_MMIO_BASE, VIRT_CTRL_IRQ_BASE);
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BOOTINFO2(cs->as, parameters_base, BI_VIRT_VIRTIO_BASE,
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VIRT_VIRTIO_MMIO_BASE, VIRT_VIRTIO_IRQ_BASE);
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if (kernel_cmdline) {
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BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE,
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kernel_cmdline);
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}
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/* load initrd */
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if (initrd_filename) {
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initrd_size = get_image_size(initrd_filename);
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if (initrd_size < 0) {
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error_report("could not load initial ram disk '%s'",
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initrd_filename);
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exit(1);
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}
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initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
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load_image_targphys(initrd_filename, initrd_base,
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ram_size - initrd_base);
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BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base,
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initrd_size);
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} else {
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initrd_base = 0;
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initrd_size = 0;
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}
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BOOTINFO0(cs->as, parameters_base, BI_LAST);
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}
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}
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static void virt_machine_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "QEMU M68K Virtual Machine";
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mc->init = virt_init;
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mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
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mc->max_cpus = 1;
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mc->no_floppy = 1;
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mc->no_parallel = 1;
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mc->default_ram_id = "m68k_virt.ram";
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}
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static const TypeInfo virt_machine_info = {
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.name = MACHINE_TYPE_NAME("virt"),
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.parent = TYPE_MACHINE,
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.abstract = true,
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.class_init = virt_machine_class_init,
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};
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static void virt_machine_register_types(void)
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{
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type_register_static(&virt_machine_info);
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}
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type_init(virt_machine_register_types)
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#define DEFINE_VIRT_MACHINE(major, minor, latest) \
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static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
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void *data) \
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{ \
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MachineClass *mc = MACHINE_CLASS(oc); \
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virt_machine_##major##_##minor##_options(mc); \
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mc->desc = "QEMU " # major "." # minor " M68K Virtual Machine"; \
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if (latest) { \
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mc->alias = "virt"; \
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} \
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} \
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static const TypeInfo machvirt_##major##_##minor##_info = { \
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.name = MACHINE_TYPE_NAME("virt-" # major "." # minor), \
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.parent = MACHINE_TYPE_NAME("virt"), \
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.class_init = virt_##major##_##minor##_class_init, \
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}; \
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static void machvirt_machine_##major##_##minor##_init(void) \
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{ \
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type_register_static(&machvirt_##major##_##minor##_info); \
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} \
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type_init(machvirt_machine_##major##_##minor##_init);
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static void virt_machine_6_0_options(MachineClass *mc)
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{
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}
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DEFINE_VIRT_MACHINE(6, 0, true)
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