2018-04-24 21:26:16 +02:00
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/*
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* Emulation of Linux signals
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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2018-04-24 21:26:32 +02:00
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#include "qemu/osdep.h"
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#include "qemu.h"
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#include "signal-common.h"
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#include "linux-user/trace.h"
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#define __SUNOS_MAXWIN 31
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/* This is what SunOS does, so shall I. */
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struct target_sigcontext {
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abi_ulong sigc_onstack; /* state to restore */
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abi_ulong sigc_mask; /* sigmask to restore */
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abi_ulong sigc_sp; /* stack pointer */
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abi_ulong sigc_pc; /* program counter */
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abi_ulong sigc_npc; /* next program counter */
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abi_ulong sigc_psr; /* for condition codes etc */
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abi_ulong sigc_g1; /* User uses these two registers */
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abi_ulong sigc_o0; /* within the trampoline code. */
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/* Now comes information regarding the users window set
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* at the time of the signal.
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*/
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abi_ulong sigc_oswins; /* outstanding windows */
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/* stack ptrs for each regwin buf */
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char *sigc_spbuf[__SUNOS_MAXWIN];
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/* Windows to restore after signal */
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struct {
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abi_ulong locals[8];
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abi_ulong ins[8];
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} sigc_wbuf[__SUNOS_MAXWIN];
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};
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/* A Sparc stack frame */
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struct sparc_stackf {
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abi_ulong locals[8];
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abi_ulong ins[8];
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/* It's simpler to treat fp and callers_pc as elements of ins[]
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* since we never need to access them ourselves.
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*/
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char *structptr;
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abi_ulong xargs[6];
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abi_ulong xxargs[1];
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};
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typedef struct {
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struct {
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abi_ulong psr;
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abi_ulong pc;
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abi_ulong npc;
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abi_ulong y;
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abi_ulong u_regs[16]; /* globals and ins */
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} si_regs;
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int si_mask;
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} __siginfo_t;
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typedef struct {
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abi_ulong si_float_regs[32];
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unsigned long si_fsr;
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unsigned long si_fpqdepth;
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struct {
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unsigned long *insn_addr;
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unsigned long insn;
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} si_fpqueue [16];
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} qemu_siginfo_fpu_t;
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struct target_signal_frame {
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struct sparc_stackf ss;
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__siginfo_t info;
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abi_ulong fpu_save;
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abi_ulong insns[2] __attribute__ ((aligned (8)));
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abi_ulong extramask[TARGET_NSIG_WORDS - 1];
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abi_ulong extra_size; /* Should be 0 */
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qemu_siginfo_fpu_t fpu_state;
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};
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struct target_rt_signal_frame {
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struct sparc_stackf ss;
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siginfo_t info;
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abi_ulong regs[20];
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sigset_t mask;
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abi_ulong fpu_save;
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unsigned int insns[2];
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stack_t stack;
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unsigned int extra_size; /* Should be 0 */
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qemu_siginfo_fpu_t fpu_state;
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};
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static inline abi_ulong get_sigframe(struct target_sigaction *sa,
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CPUSPARCState *env,
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unsigned long framesize)
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{
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2018-04-11 21:23:47 +02:00
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abi_ulong sp = get_sp_from_cpustate(env);
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2018-04-24 21:26:32 +02:00
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2018-04-11 21:23:47 +02:00
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/*
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* If we are on the alternate signal stack and would overflow it, don't.
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* Return an always-bogus address instead so we will die with SIGSEGV.
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*/
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if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize))) {
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return -1;
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}
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2018-04-24 21:26:32 +02:00
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/* This is the X/Open sanctioned signal stack switching. */
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2018-04-11 21:23:47 +02:00
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sp = target_sigsp(sp, sa) - framesize;
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/* Always align the stack frame. This handles two cases. First,
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* sigaltstack need not be mindful of platform specific stack
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* alignment. Second, if we took this signal because the stack
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* is not aligned properly, we'd like to take the signal cleanly
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* and report that.
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*/
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sp &= ~15UL;
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return sp;
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2018-04-24 21:26:32 +02:00
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}
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static int
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setup___siginfo(__siginfo_t *si, CPUSPARCState *env, abi_ulong mask)
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{
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int err = 0, i;
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__put_user(env->psr, &si->si_regs.psr);
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__put_user(env->pc, &si->si_regs.pc);
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__put_user(env->npc, &si->si_regs.npc);
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__put_user(env->y, &si->si_regs.y);
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for (i=0; i < 8; i++) {
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__put_user(env->gregs[i], &si->si_regs.u_regs[i]);
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}
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for (i=0; i < 8; i++) {
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2019-11-06 12:33:11 +01:00
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__put_user(env->regwptr[WREG_O0 + i], &si->si_regs.u_regs[i + 8]);
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2018-04-24 21:26:32 +02:00
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}
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__put_user(mask, &si->si_mask);
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return err;
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}
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#define NF_ALIGNEDSZ (((sizeof(struct target_signal_frame) + 7) & (~7)))
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void setup_frame(int sig, struct target_sigaction *ka,
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target_sigset_t *set, CPUSPARCState *env)
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{
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abi_ulong sf_addr;
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struct target_signal_frame *sf;
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int sigframe_size, err, i;
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/* 1. Make sure everything is clean */
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//synchronize_user_stack();
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sigframe_size = NF_ALIGNEDSZ;
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sf_addr = get_sigframe(ka, env, sigframe_size);
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trace_user_setup_frame(env, sf_addr);
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sf = lock_user(VERIFY_WRITE, sf_addr,
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sizeof(struct target_signal_frame), 0);
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if (!sf) {
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goto sigsegv;
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}
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#if 0
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if (invalid_frame_pointer(sf, sigframe_size))
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goto sigill_and_return;
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#endif
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/* 2. Save the current process state */
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err = setup___siginfo(&sf->info, env, set->sig[0]);
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__put_user(0, &sf->extra_size);
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//save_fpu_state(regs, &sf->fpu_state);
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//__put_user(&sf->fpu_state, &sf->fpu_save);
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__put_user(set->sig[0], &sf->info.si_mask);
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for (i = 0; i < TARGET_NSIG_WORDS - 1; i++) {
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__put_user(set->sig[i + 1], &sf->extramask[i]);
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}
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for (i = 0; i < 8; i++) {
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2019-11-06 12:33:11 +01:00
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__put_user(env->regwptr[i + WREG_L0], &sf->ss.locals[i]);
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2018-04-24 21:26:32 +02:00
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}
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for (i = 0; i < 8; i++) {
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2019-11-06 12:33:11 +01:00
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__put_user(env->regwptr[i + WREG_O0], &sf->ss.ins[i]);
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2018-04-24 21:26:32 +02:00
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}
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if (err)
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goto sigsegv;
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/* 3. signal handler back-trampoline and parameters */
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2019-11-06 12:33:12 +01:00
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env->regwptr[WREG_SP] = sf_addr;
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2019-11-06 12:33:11 +01:00
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env->regwptr[WREG_O0] = sig;
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env->regwptr[WREG_O1] = sf_addr +
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2018-04-24 21:26:32 +02:00
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offsetof(struct target_signal_frame, info);
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2019-11-06 12:33:11 +01:00
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env->regwptr[WREG_O2] = sf_addr +
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2018-04-24 21:26:32 +02:00
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offsetof(struct target_signal_frame, info);
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/* 4. signal handler */
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env->pc = ka->_sa_handler;
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env->npc = (env->pc + 4);
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/* 5. return to kernel instructions */
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if (ka->ka_restorer) {
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2019-11-06 12:33:11 +01:00
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env->regwptr[WREG_O7] = ka->ka_restorer;
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2018-04-24 21:26:32 +02:00
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} else {
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uint32_t val32;
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2019-11-06 12:33:11 +01:00
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env->regwptr[WREG_O7] = sf_addr +
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2018-04-24 21:26:32 +02:00
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offsetof(struct target_signal_frame, insns) - 2 * 4;
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/* mov __NR_sigreturn, %g1 */
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val32 = 0x821020d8;
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__put_user(val32, &sf->insns[0]);
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/* t 0x10 */
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val32 = 0x91d02010;
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__put_user(val32, &sf->insns[1]);
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}
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unlock_user(sf, sf_addr, sizeof(struct target_signal_frame));
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return;
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#if 0
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sigill_and_return:
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force_sig(TARGET_SIGILL);
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#endif
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sigsegv:
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unlock_user(sf, sf_addr, sizeof(struct target_signal_frame));
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force_sigsegv(sig);
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}
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void setup_rt_frame(int sig, struct target_sigaction *ka,
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target_siginfo_t *info,
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target_sigset_t *set, CPUSPARCState *env)
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{
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2018-07-06 17:51:26 +02:00
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qemu_log_mask(LOG_UNIMP, "setup_rt_frame: not implemented\n");
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2018-04-24 21:26:32 +02:00
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}
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long do_sigreturn(CPUSPARCState *env)
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{
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abi_ulong sf_addr;
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struct target_signal_frame *sf;
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uint32_t up_psr, pc, npc;
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target_sigset_t set;
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sigset_t host_set;
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2018-11-15 12:46:16 +01:00
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int i;
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2018-04-24 21:26:32 +02:00
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2019-11-06 12:33:12 +01:00
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sf_addr = env->regwptr[WREG_SP];
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2018-04-24 21:26:32 +02:00
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trace_user_do_sigreturn(env, sf_addr);
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if (!lock_user_struct(VERIFY_READ, sf, sf_addr, 1)) {
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goto segv_and_exit;
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}
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/* 1. Make sure we are not getting garbage from the user */
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if (sf_addr & 3)
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goto segv_and_exit;
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__get_user(pc, &sf->info.si_regs.pc);
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__get_user(npc, &sf->info.si_regs.npc);
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if ((pc | npc) & 3) {
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goto segv_and_exit;
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}
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/* 2. Restore the state */
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__get_user(up_psr, &sf->info.si_regs.psr);
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/* User can only change condition codes and FPU enabling in %psr. */
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env->psr = (up_psr & (PSR_ICC /* | PSR_EF */))
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| (env->psr & ~(PSR_ICC /* | PSR_EF */));
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env->pc = pc;
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env->npc = npc;
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__get_user(env->y, &sf->info.si_regs.y);
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for (i=0; i < 8; i++) {
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__get_user(env->gregs[i], &sf->info.si_regs.u_regs[i]);
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}
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for (i=0; i < 8; i++) {
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2019-11-06 12:33:11 +01:00
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__get_user(env->regwptr[i + WREG_O0], &sf->info.si_regs.u_regs[i + 8]);
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2018-04-24 21:26:32 +02:00
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}
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/* FIXME: implement FPU save/restore:
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2018-11-15 12:46:16 +01:00
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* __get_user(fpu_save, &sf->fpu_save);
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* if (fpu_save) {
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* if (restore_fpu_state(env, fpu_save)) {
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* goto segv_and_exit;
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* }
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* }
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*/
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2018-04-24 21:26:32 +02:00
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/* This is pretty much atomic, no amount locking would prevent
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* the races which exist anyways.
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*/
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__get_user(set.sig[0], &sf->info.si_mask);
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for(i = 1; i < TARGET_NSIG_WORDS; i++) {
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__get_user(set.sig[i], &sf->extramask[i - 1]);
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}
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target_to_host_sigset_internal(&host_set, &set);
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set_sigmask(&host_set);
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unlock_user_struct(sf, sf_addr, 0);
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return -TARGET_QEMU_ESIGRETURN;
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segv_and_exit:
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unlock_user_struct(sf, sf_addr, 0);
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force_sig(TARGET_SIGSEGV);
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return -TARGET_QEMU_ESIGRETURN;
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}
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long do_rt_sigreturn(CPUSPARCState *env)
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{
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trace_user_do_rt_sigreturn(env, 0);
|
2018-07-06 17:51:26 +02:00
|
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qemu_log_mask(LOG_UNIMP, "do_rt_sigreturn: not implemented\n");
|
2018-04-24 21:26:32 +02:00
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return -TARGET_ENOSYS;
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}
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#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
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|
|
#define SPARC_MC_TSTATE 0
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#define SPARC_MC_PC 1
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#define SPARC_MC_NPC 2
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#define SPARC_MC_Y 3
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#define SPARC_MC_G1 4
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#define SPARC_MC_G2 5
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#define SPARC_MC_G3 6
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#define SPARC_MC_G4 7
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#define SPARC_MC_G5 8
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|
#define SPARC_MC_G6 9
|
|
|
|
#define SPARC_MC_G7 10
|
|
|
|
#define SPARC_MC_O0 11
|
|
|
|
#define SPARC_MC_O1 12
|
|
|
|
#define SPARC_MC_O2 13
|
|
|
|
#define SPARC_MC_O3 14
|
|
|
|
#define SPARC_MC_O4 15
|
|
|
|
#define SPARC_MC_O5 16
|
|
|
|
#define SPARC_MC_O6 17
|
|
|
|
#define SPARC_MC_O7 18
|
|
|
|
#define SPARC_MC_NGREG 19
|
|
|
|
|
|
|
|
typedef abi_ulong target_mc_greg_t;
|
|
|
|
typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG];
|
|
|
|
|
|
|
|
struct target_mc_fq {
|
|
|
|
abi_ulong *mcfq_addr;
|
|
|
|
uint32_t mcfq_insn;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct target_mc_fpu {
|
|
|
|
union {
|
|
|
|
uint32_t sregs[32];
|
|
|
|
uint64_t dregs[32];
|
|
|
|
//uint128_t qregs[16];
|
|
|
|
} mcfpu_fregs;
|
|
|
|
abi_ulong mcfpu_fsr;
|
|
|
|
abi_ulong mcfpu_fprs;
|
|
|
|
abi_ulong mcfpu_gsr;
|
|
|
|
struct target_mc_fq *mcfpu_fq;
|
|
|
|
unsigned char mcfpu_qcnt;
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|
|
unsigned char mcfpu_qentsz;
|
|
|
|
unsigned char mcfpu_enab;
|
|
|
|
};
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|
|
typedef struct target_mc_fpu target_mc_fpu_t;
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|
|
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|
|
typedef struct {
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|
|
|
target_mc_gregset_t mc_gregs;
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|
|
target_mc_greg_t mc_fp;
|
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|
|
target_mc_greg_t mc_i7;
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|
|
target_mc_fpu_t mc_fpregs;
|
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|
|
} target_mcontext_t;
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|
|
|
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|
|
struct target_ucontext {
|
|
|
|
struct target_ucontext *tuc_link;
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|
|
abi_ulong tuc_flags;
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|
|
target_sigset_t tuc_sigmask;
|
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|
|
target_mcontext_t tuc_mcontext;
|
|
|
|
};
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|
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|
|
|
/* A V9 register window */
|
|
|
|
struct target_reg_window {
|
|
|
|
abi_ulong locals[8];
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|
|
abi_ulong ins[8];
|
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|
|
};
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|
|
#define TARGET_STACK_BIAS 2047
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|
|
/* {set, get}context() needed for 64-bit SparcLinux userland. */
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|
|
void sparc64_set_context(CPUSPARCState *env)
|
|
|
|
{
|
|
|
|
abi_ulong ucp_addr;
|
|
|
|
struct target_ucontext *ucp;
|
|
|
|
target_mc_gregset_t *grp;
|
|
|
|
abi_ulong pc, npc, tstate;
|
|
|
|
abi_ulong fp, i7, w_addr;
|
|
|
|
unsigned int i;
|
|
|
|
|
2019-11-06 12:33:11 +01:00
|
|
|
ucp_addr = env->regwptr[WREG_O0];
|
2018-04-24 21:26:32 +02:00
|
|
|
if (!lock_user_struct(VERIFY_READ, ucp, ucp_addr, 1)) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
|
|
|
grp = &ucp->tuc_mcontext.mc_gregs;
|
|
|
|
__get_user(pc, &((*grp)[SPARC_MC_PC]));
|
|
|
|
__get_user(npc, &((*grp)[SPARC_MC_NPC]));
|
|
|
|
if ((pc | npc) & 3) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
2019-11-06 12:33:11 +01:00
|
|
|
if (env->regwptr[WREG_O1]) {
|
2018-04-24 21:26:32 +02:00
|
|
|
target_sigset_t target_set;
|
|
|
|
sigset_t set;
|
|
|
|
|
|
|
|
if (TARGET_NSIG_WORDS == 1) {
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|
|
|
__get_user(target_set.sig[0], &ucp->tuc_sigmask.sig[0]);
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|
|
|
} else {
|
|
|
|
abi_ulong *src, *dst;
|
|
|
|
src = ucp->tuc_sigmask.sig;
|
|
|
|
dst = target_set.sig;
|
|
|
|
for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) {
|
|
|
|
__get_user(*dst, src);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
target_to_host_sigset_internal(&set, &target_set);
|
|
|
|
set_sigmask(&set);
|
|
|
|
}
|
|
|
|
env->pc = pc;
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|
|
|
env->npc = npc;
|
|
|
|
__get_user(env->y, &((*grp)[SPARC_MC_Y]));
|
|
|
|
__get_user(tstate, &((*grp)[SPARC_MC_TSTATE]));
|
|
|
|
env->asi = (tstate >> 24) & 0xff;
|
|
|
|
cpu_put_ccr(env, tstate >> 32);
|
|
|
|
cpu_put_cwp64(env, tstate & 0x1f);
|
|
|
|
__get_user(env->gregs[1], (&(*grp)[SPARC_MC_G1]));
|
|
|
|
__get_user(env->gregs[2], (&(*grp)[SPARC_MC_G2]));
|
|
|
|
__get_user(env->gregs[3], (&(*grp)[SPARC_MC_G3]));
|
|
|
|
__get_user(env->gregs[4], (&(*grp)[SPARC_MC_G4]));
|
|
|
|
__get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5]));
|
|
|
|
__get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6]));
|
|
|
|
__get_user(env->gregs[7], (&(*grp)[SPARC_MC_G7]));
|
2019-11-06 12:33:11 +01:00
|
|
|
__get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0]));
|
|
|
|
__get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1]));
|
|
|
|
__get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2]));
|
|
|
|
__get_user(env->regwptr[WREG_O3], (&(*grp)[SPARC_MC_O3]));
|
|
|
|
__get_user(env->regwptr[WREG_O4], (&(*grp)[SPARC_MC_O4]));
|
|
|
|
__get_user(env->regwptr[WREG_O5], (&(*grp)[SPARC_MC_O5]));
|
|
|
|
__get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6]));
|
|
|
|
__get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7]));
|
2018-04-24 21:26:32 +02:00
|
|
|
|
|
|
|
__get_user(fp, &(ucp->tuc_mcontext.mc_fp));
|
|
|
|
__get_user(i7, &(ucp->tuc_mcontext.mc_i7));
|
|
|
|
|
2019-11-06 12:33:11 +01:00
|
|
|
w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_O6];
|
2018-04-24 21:26:32 +02:00
|
|
|
if (put_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]),
|
|
|
|
abi_ulong) != 0) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
|
|
|
if (put_user(i7, w_addr + offsetof(struct target_reg_window, ins[7]),
|
|
|
|
abi_ulong) != 0) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
|
|
|
/* FIXME this does not match how the kernel handles the FPU in
|
|
|
|
* its sparc64_set_context implementation. In particular the FPU
|
|
|
|
* is only restored if fenab is non-zero in:
|
|
|
|
* __get_user(fenab, &(ucp->tuc_mcontext.mc_fpregs.mcfpu_enab));
|
|
|
|
*/
|
|
|
|
__get_user(env->fprs, &(ucp->tuc_mcontext.mc_fpregs.mcfpu_fprs));
|
|
|
|
{
|
|
|
|
uint32_t *src = ucp->tuc_mcontext.mc_fpregs.mcfpu_fregs.sregs;
|
|
|
|
for (i = 0; i < 64; i++, src++) {
|
|
|
|
if (i & 1) {
|
|
|
|
__get_user(env->fpr[i/2].l.lower, src);
|
|
|
|
} else {
|
|
|
|
__get_user(env->fpr[i/2].l.upper, src);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
__get_user(env->fsr,
|
|
|
|
&(ucp->tuc_mcontext.mc_fpregs.mcfpu_fsr));
|
|
|
|
__get_user(env->gsr,
|
|
|
|
&(ucp->tuc_mcontext.mc_fpregs.mcfpu_gsr));
|
|
|
|
unlock_user_struct(ucp, ucp_addr, 0);
|
|
|
|
return;
|
|
|
|
do_sigsegv:
|
|
|
|
unlock_user_struct(ucp, ucp_addr, 0);
|
|
|
|
force_sig(TARGET_SIGSEGV);
|
|
|
|
}
|
|
|
|
|
|
|
|
void sparc64_get_context(CPUSPARCState *env)
|
|
|
|
{
|
|
|
|
abi_ulong ucp_addr;
|
|
|
|
struct target_ucontext *ucp;
|
|
|
|
target_mc_gregset_t *grp;
|
|
|
|
target_mcontext_t *mcp;
|
|
|
|
abi_ulong fp, i7, w_addr;
|
|
|
|
int err;
|
|
|
|
unsigned int i;
|
|
|
|
target_sigset_t target_set;
|
|
|
|
sigset_t set;
|
|
|
|
|
2019-11-06 12:33:11 +01:00
|
|
|
ucp_addr = env->regwptr[WREG_O0];
|
2018-04-24 21:26:32 +02:00
|
|
|
if (!lock_user_struct(VERIFY_WRITE, ucp, ucp_addr, 0)) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
|
|
|
|
|
|
|
mcp = &ucp->tuc_mcontext;
|
|
|
|
grp = &mcp->mc_gregs;
|
|
|
|
|
|
|
|
/* Skip over the trap instruction, first. */
|
|
|
|
env->pc = env->npc;
|
|
|
|
env->npc += 4;
|
|
|
|
|
|
|
|
/* If we're only reading the signal mask then do_sigprocmask()
|
|
|
|
* is guaranteed not to fail, which is important because we don't
|
|
|
|
* have any way to signal a failure or restart this operation since
|
|
|
|
* this is not a normal syscall.
|
|
|
|
*/
|
|
|
|
err = do_sigprocmask(0, NULL, &set);
|
|
|
|
assert(err == 0);
|
|
|
|
host_to_target_sigset_internal(&target_set, &set);
|
|
|
|
if (TARGET_NSIG_WORDS == 1) {
|
|
|
|
__put_user(target_set.sig[0],
|
|
|
|
(abi_ulong *)&ucp->tuc_sigmask);
|
|
|
|
} else {
|
|
|
|
abi_ulong *src, *dst;
|
|
|
|
src = target_set.sig;
|
|
|
|
dst = ucp->tuc_sigmask.sig;
|
|
|
|
for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) {
|
|
|
|
__put_user(*src, dst);
|
|
|
|
}
|
|
|
|
if (err)
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* XXX: tstate must be saved properly */
|
|
|
|
// __put_user(env->tstate, &((*grp)[SPARC_MC_TSTATE]));
|
|
|
|
__put_user(env->pc, &((*grp)[SPARC_MC_PC]));
|
|
|
|
__put_user(env->npc, &((*grp)[SPARC_MC_NPC]));
|
|
|
|
__put_user(env->y, &((*grp)[SPARC_MC_Y]));
|
|
|
|
__put_user(env->gregs[1], &((*grp)[SPARC_MC_G1]));
|
|
|
|
__put_user(env->gregs[2], &((*grp)[SPARC_MC_G2]));
|
|
|
|
__put_user(env->gregs[3], &((*grp)[SPARC_MC_G3]));
|
|
|
|
__put_user(env->gregs[4], &((*grp)[SPARC_MC_G4]));
|
|
|
|
__put_user(env->gregs[5], &((*grp)[SPARC_MC_G5]));
|
|
|
|
__put_user(env->gregs[6], &((*grp)[SPARC_MC_G6]));
|
|
|
|
__put_user(env->gregs[7], &((*grp)[SPARC_MC_G7]));
|
2019-11-06 12:33:11 +01:00
|
|
|
__put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0]));
|
|
|
|
__put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1]));
|
|
|
|
__put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2]));
|
|
|
|
__put_user(env->regwptr[WREG_O3], &((*grp)[SPARC_MC_O3]));
|
|
|
|
__put_user(env->regwptr[WREG_O4], &((*grp)[SPARC_MC_O4]));
|
|
|
|
__put_user(env->regwptr[WREG_O5], &((*grp)[SPARC_MC_O5]));
|
|
|
|
__put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6]));
|
|
|
|
__put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7]));
|
|
|
|
|
|
|
|
w_addr = TARGET_STACK_BIAS + env->regwptr[WREG_O6];
|
2018-04-24 21:26:32 +02:00
|
|
|
fp = i7 = 0;
|
|
|
|
if (get_user(fp, w_addr + offsetof(struct target_reg_window, ins[6]),
|
|
|
|
abi_ulong) != 0) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
|
|
|
if (get_user(i7, w_addr + offsetof(struct target_reg_window, ins[7]),
|
|
|
|
abi_ulong) != 0) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
|
|
|
__put_user(fp, &(mcp->mc_fp));
|
|
|
|
__put_user(i7, &(mcp->mc_i7));
|
|
|
|
|
|
|
|
{
|
|
|
|
uint32_t *dst = ucp->tuc_mcontext.mc_fpregs.mcfpu_fregs.sregs;
|
|
|
|
for (i = 0; i < 64; i++, dst++) {
|
|
|
|
if (i & 1) {
|
|
|
|
__put_user(env->fpr[i/2].l.lower, dst);
|
|
|
|
} else {
|
|
|
|
__put_user(env->fpr[i/2].l.upper, dst);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
__put_user(env->fsr, &(mcp->mc_fpregs.mcfpu_fsr));
|
|
|
|
__put_user(env->gsr, &(mcp->mc_fpregs.mcfpu_gsr));
|
|
|
|
__put_user(env->fprs, &(mcp->mc_fpregs.mcfpu_fprs));
|
|
|
|
|
|
|
|
if (err)
|
|
|
|
goto do_sigsegv;
|
|
|
|
unlock_user_struct(ucp, ucp_addr, 1);
|
|
|
|
return;
|
|
|
|
do_sigsegv:
|
|
|
|
unlock_user_struct(ucp, ucp_addr, 1);
|
|
|
|
force_sig(TARGET_SIGSEGV);
|
|
|
|
}
|
|
|
|
#endif
|