63 lines
1.4 KiB
C
63 lines
1.4 KiB
C
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/*
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* PMU emulation helpers for TCG IBM POWER chips
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*
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* Copyright IBM Corp. 2021
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*
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* Authors:
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* Daniel Henrique Barboza <danielhb413@gmail.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "power8-pmu.h"
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#include "cpu.h"
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#include "helper_regs.h"
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#include "exec/exec-all.h"
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#include "exec/helper-proto.h"
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#include "qemu/error-report.h"
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#include "qemu/main-loop.h"
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#include "hw/ppc/ppc.h"
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#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
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static void fire_PMC_interrupt(PowerPCCPU *cpu)
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{
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CPUPPCState *env = &cpu->env;
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if (!(env->spr[SPR_POWER_MMCR0] & MMCR0_EBE)) {
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return;
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}
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/* PMC interrupt not implemented yet */
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return;
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}
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static void cpu_ppc_pmu_timer_cb(void *opaque)
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{
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PowerPCCPU *cpu = opaque;
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fire_PMC_interrupt(cpu);
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}
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void cpu_ppc_pmu_init(CPUPPCState *env)
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{
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PowerPCCPU *cpu = env_archcpu(env);
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int i, sprn;
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for (sprn = SPR_POWER_PMC1; sprn <= SPR_POWER_PMC6; sprn++) {
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if (sprn == SPR_POWER_PMC5) {
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continue;
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}
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i = sprn - SPR_POWER_PMC1;
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env->pmu_cyc_overflow_timers[i] = timer_new_ns(QEMU_CLOCK_VIRTUAL,
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&cpu_ppc_pmu_timer_cb,
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cpu);
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}
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}
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#endif /* defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) */
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