93 lines
3.6 KiB
Plaintext
93 lines
3.6 KiB
Plaintext
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General Description
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===================
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This document describes VMWare PVSCSI device interface specification.
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Created by Dmitry Fleytman (dmitry@daynix.com), Daynix Computing LTD.
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Based on source code of PVSCSI Linux driver from kernel 3.0.4
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PVSCSI Device Interface Overview
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================================
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The interface is based on memory area shared between hypervisor and VM.
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Memory area is obtained by driver as device IO memory resource of
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PVSCSI_MEM_SPACE_SIZE length.
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The shared memory consists of registers area and rings area.
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The registers area is used to raise hypervisor interrupts and issue device
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commands. The rings area is used to transfer data descriptors and SCSI
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commands from VM to hypervisor and to transfer messages produced by
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hypervisor to VM. Data itself is transferred via virtual scatter-gather DMA.
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PVSCSI Device Registers
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=======================
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The length of the registers area is 1 page (PVSCSI_MEM_SPACE_COMMAND_NUM_PAGES).
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The structure of the registers area is described by the PVSCSIRegOffset enum.
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There are registers to issue device command (with optional short data),
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issue device interrupt, control interrupts masking.
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PVSCSI Device Rings
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===================
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There are three rings in shared memory:
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1. Request ring (struct PVSCSIRingReqDesc *req_ring)
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- ring for OS to device requests
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2. Completion ring (struct PVSCSIRingCmpDesc *cmp_ring)
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- ring for device request completions
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3. Message ring (struct PVSCSIRingMsgDesc *msg_ring)
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- ring for messages from device.
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This ring is optional and the guest might not configure it.
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There is a control area (struct PVSCSIRingsState *rings_state) used to control
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rings operation.
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PVSCSI Device to Host Interrupts
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================================
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There are following interrupt types supported by PVSCSI device:
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1. Completion interrupts (completion ring notifications):
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PVSCSI_INTR_CMPL_0
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PVSCSI_INTR_CMPL_1
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2. Message interrupts (message ring notifications):
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PVSCSI_INTR_MSG_0
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PVSCSI_INTR_MSG_1
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Interrupts are controlled via PVSCSI_REG_OFFSET_INTR_MASK register
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Bit set means interrupt enabled, bit cleared - disabled
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Interrupt modes supported are legacy, MSI and MSI-X
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In case of legacy interrupts, register PVSCSI_REG_OFFSET_INTR_STATUS
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is used to check which interrupt has arrived. Interrupts are
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acknowledged when the corresponding bit is written to the interrupt
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status register.
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PVSCSI Device Operation Sequences
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=================================
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1. Startup sequence:
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a. Issue PVSCSI_CMD_ADAPTER_RESET command;
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aa. Windows driver reads interrupt status register here;
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b. Issue PVSCSI_CMD_SETUP_MSG_RING command with no additional data,
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check status and disable device messages if error returned;
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(Omitted if device messages disabled by driver configuration)
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c. Issue PVSCSI_CMD_SETUP_RINGS command, provide rings configuration
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as struct PVSCSICmdDescSetupRings;
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d. Issue PVSCSI_CMD_SETUP_MSG_RING command again, provide
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rings configuration as struct PVSCSICmdDescSetupMsgRing;
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e. Unmask completion and message (if device messages enabled) interrupts.
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2. Shutdown sequences
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a. Mask interrupts;
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b. Flush request ring using PVSCSI_REG_OFFSET_KICK_NON_RW_IO;
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c. Issue PVSCSI_CMD_ADAPTER_RESET command.
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3. Send request
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a. Fill next free request ring descriptor;
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b. Issue PVSCSI_REG_OFFSET_KICK_RW_IO for R/W operations;
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or PVSCSI_REG_OFFSET_KICK_NON_RW_IO for other operations.
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4. Abort command
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a. Issue PVSCSI_CMD_ABORT_CMD command;
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5. Request completion processing
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a. Upon completion interrupt arrival process completion
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and message (if enabled) rings.
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