2020-11-11 18:06:46 +01:00
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#ifndef E2K_TRANSLATE_H
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#define E2K_TRANSLATE_H
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2020-11-12 14:52:51 +01:00
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#include "tcg/tcg-op.h"
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2020-11-11 18:06:46 +01:00
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#include "exec/translator.h"
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2020-11-16 15:26:39 +01:00
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/* ibranch disp */
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#define DISAS_JUMP_STATIC DISAS_TARGET_0
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/* ibranch disp ? cond */
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#define DISAS_BRANCH_STATIC DISAS_TARGET_1
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/*
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* ct %ctprN
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* call %ctprN, wbs=M
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* */
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#define DISAS_JUMP DISAS_TARGET_2
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/*
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* ct %ctprN ? cond
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* call %ctprN, wbs=M ? cond
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*/
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#define DISAS_BRANCH DISAS_TARGET_3
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2020-11-11 18:06:46 +01:00
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2020-11-11 20:03:51 +01:00
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#define IS_BASED(i) (((i) & 0x80) == 0)
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#define IS_REGULAR(i) (((i) & 0xc0) == 0x80)
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#define IS_IMM5(i) (((i) & 0xe0) == 0xc0)
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#define IS_IMM4(i) (((i) & 0xf0) == 0xc0)
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#define IS_LIT(i) (((i) & 0xf0) == 0xd0)
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#define IS_LIT16_LO(i) (((i) & 0x0e) == 0x00)
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#define IS_LIT16_HI(i) (((i) & 0x0e) == 0x04)
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#define IS_LIT32(i) (((i) & 0x0c) == 0x08)
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#define IS_LIT64(i) (((i) & 0x0c) == 0x0c)
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#define IS_GLOBAL(i) (((i) & 0xe0) == 0xe0)
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#define GET_BASED(i) ((i) & 0x7f)
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#define GET_REGULAR(i) ((i) & 0x3f)
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#define GET_IMM5(i) ((i) & 0x1f)
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#define GET_IMM4(i) ((i) & 0x0f)
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#define GET_LIT(i) ((i) & 0x03)
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#define GET_GLOBAL(i) ((i) & 0x1f)
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2020-11-12 14:52:51 +01:00
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typedef enum {
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2020-11-22 10:44:28 +01:00
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CTPR_TAG_NONE = 0x0,
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2020-11-12 14:52:51 +01:00
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CTPR_TAG_RETURN = 0x2,
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CTPR_TAG_DISP = 0x3,
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CTPR_TAG_LDISP = 0x3,
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CTPR_TAG_SDISP = 0x5,
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} CtprTag;
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typedef enum {
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CTPR_OPC_LDISP = 0x1,
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} CtprOpc;
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typedef enum {
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2020-11-11 18:06:46 +01:00
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ALES_NONE = 0x00,
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ALES_PRESENT = 0x01,
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ALES_ALLOCATED = 0x02,
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} AlesFlag;
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typedef struct CPUE2KStateTCG {
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TCGv pc;
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2020-11-15 16:05:27 +01:00
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TCGv npc;
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2020-11-22 08:37:45 +01:00
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TCGv ctprs[3];
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2020-11-19 21:47:25 +01:00
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TCGv ct_cond;
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2020-11-23 07:14:26 +01:00
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TCGv_i32 is_bp; /* breakpoint flag */
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2020-11-13 17:40:56 +01:00
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TCGv_i64 lsr;
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2020-11-11 18:06:46 +01:00
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TCGv_i64 wregs[WREGS_SIZE];
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2020-11-15 16:05:27 +01:00
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TCGv_i64 gregs[GREGS_SIZE];
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TCGv_ptr wptr; /* pointer to wregs */
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2020-11-23 12:35:04 +01:00
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TCGv_i32 wd_base; /* holds wbs * 2 */
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TCGv_i32 wd_size; /* holds wsz * 2 */
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2020-11-15 16:05:27 +01:00
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TCGv_i32 boff; /* holds rbs * 2 */
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TCGv_i32 bsize; /* holds rsz * 2 + 2 */
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TCGv_i32 bcur; /* holds rcur * 2 */
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2020-11-11 18:06:46 +01:00
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TCGv_i64 pregs;
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TCGv_i32 psize; /* holds psz */
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TCGv_i32 pcur; /* holds pcur */
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2020-11-11 18:06:46 +01:00
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} CPUE2KStateTCG;
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2020-11-11 20:03:51 +01:00
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extern struct CPUE2KStateTCG e2k_cs;
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2020-11-11 18:06:46 +01:00
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typedef struct UnpackedBundle {
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uint32_t hs;
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uint32_t ss;
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uint32_t als[6];
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uint32_t cs0;
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uint16_t ales[6];
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uint32_t cs1;
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uint16_t aas[6];
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uint32_t lts[4];
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uint32_t pls[3];
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uint32_t cds[3];
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bool ss_present;
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bool als_present[6];
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bool cs0_present;
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AlesFlag ales_present[6];
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bool cs1_present;
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bool aas_present[6];
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bool lts_present[4];
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bool pls_present[3];
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bool cds_present[3];
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} UnpackedBundle;
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enum ResultType {
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RESULT_NONE,
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RESULT_BASED_REG,
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RESULT_REGULAR_REG,
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RESULT_GLOBAL_REG,
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RESULT_PREG,
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};
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typedef struct {
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enum ResultType tag;
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2020-11-24 10:12:01 +01:00
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bool has_cond;
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TCGv_i64 cond;
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2020-11-11 18:06:46 +01:00
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union {
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struct {
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unsigned int i;
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TCGv_i64 v;
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} reg;
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} u;
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} Result;
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2020-11-23 20:57:46 +01:00
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typedef struct {
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int reg; // -1 means do not write
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TCGv_i32 value;
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} PluResult;
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2020-11-17 19:58:22 +01:00
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typedef enum {
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CT_NONE,
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CT_IBRANCH,
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CT_JUMP,
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CT_CALL,
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} ControlTransferType;
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typedef struct {
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ControlTransferType type;
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union {
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target_ulong target;
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TCGv_i64 ctpr;
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} u;
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int wbs;
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} ControlTransfer;
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2020-11-11 18:06:46 +01:00
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typedef struct DisasContext {
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DisasContextBase base;
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UnpackedBundle bundle;
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target_ulong pc;
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2020-11-12 18:12:18 +01:00
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target_ulong npc;
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2020-11-15 16:05:27 +01:00
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int jump_ctpr;
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2020-11-13 10:36:34 +01:00
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int mmuidx;
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2020-11-24 22:07:56 +01:00
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uint8_t mas[6];
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2020-11-11 18:06:46 +01:00
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2020-11-11 21:45:55 +01:00
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int version;
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2020-11-11 18:06:46 +01:00
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// Temporary values.
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TCGv_i32 t32[16];
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2020-11-12 18:12:18 +01:00
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TCGv_i64 t64[32];
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2020-11-11 18:06:46 +01:00
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TCGv ttl[8];
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// Allocated temporary values count.
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int t32_len;
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int t64_len;
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int ttl_len;
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2020-11-24 10:12:01 +01:00
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TCGv_i64 cond[6];
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2020-11-11 18:06:46 +01:00
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Result alc[6];
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2020-11-23 20:57:46 +01:00
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PluResult plu[3];
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2020-11-17 19:58:22 +01:00
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ControlTransfer ct;
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2020-11-11 18:06:46 +01:00
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} DisasContext;
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2020-11-11 20:03:51 +01:00
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static inline TCGv_i32 e2k_get_temp_i32(DisasContext *dc)
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{
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assert(dc->t32_len < ARRAY_SIZE(dc->t32));
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2020-11-23 20:57:46 +01:00
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return dc->t32[dc->t32_len++] = tcg_temp_local_new_i32();
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2020-11-11 20:03:51 +01:00
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}
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static inline TCGv_i64 e2k_get_temp_i64(DisasContext *dc)
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{
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assert(dc->t64_len < ARRAY_SIZE(dc->t64));
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2020-11-23 20:57:46 +01:00
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return dc->t64[dc->t64_len++] = tcg_temp_local_new_i64();
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2020-11-11 20:03:51 +01:00
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}
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static inline TCGv e2k_get_temp(DisasContext *dc)
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{
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assert(dc->ttl_len < ARRAY_SIZE(dc->ttl));
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2020-11-23 20:57:46 +01:00
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return dc->ttl[dc->ttl_len++] = tcg_temp_local_new();
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2020-11-11 20:03:51 +01:00
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}
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2020-11-13 17:40:56 +01:00
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static inline void e2k_gen_lcnt(TCGv_i64 ret)
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{
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tcg_gen_andi_i64(ret, e2k_cs.lsr, (1UL << 32) - 1);
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}
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static inline void e2k_gen_ecnt(TCGv_i64 ret)
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{
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tcg_gen_extract_i64(ret, e2k_cs.lsr, LSR_ECNT_OFF, LSR_ECNT_LEN);
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}
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static inline void e2k_gen_pcnt(TCGv_i32 ret)
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{
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TCGv_i64 t0 = tcg_temp_new_i64();
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tcg_gen_extract_i64(t0, e2k_cs.lsr, LSR_PCNT_OFF, LSR_PCNT_LEN);
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tcg_gen_extrl_i64_i32(ret, t0);
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tcg_temp_free_i64(t0);
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}
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2020-11-23 20:57:46 +01:00
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static inline void e2k_gen_lcntex(TCGv_i32 ret)
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{
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TCGv_i32 t0 = tcg_temp_new_i32();
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tcg_gen_extrl_i64_i32(t0, e2k_cs.lsr);
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tcg_gen_setcondi_i32(TCG_COND_EQ, ret, t0, 0);
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tcg_temp_free_i32(t0);
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}
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2020-11-13 15:49:28 +01:00
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void e2k_gen_preg(TCGv_i64 ret, int reg);
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2020-11-11 20:03:51 +01:00
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TCGv_i64 e2k_get_preg(DisasContext *dc, int reg);
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void e2k_gen_store_preg(int reg, TCGv_i64 val);
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TCGv_i64 e2k_get_wreg(DisasContext *dc, int reg);
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void e2k_gen_store_wreg(int reg, TCGv_i64 val);
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TCGv_i64 e2k_get_breg(DisasContext *dc, int reg);
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void e2k_gen_store_breg(int reg, TCGv_i64 val);
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TCGv_i64 e2k_get_greg(DisasContext *dc, int reg);
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void e2k_gen_store_greg(int reg, TCGv_i64 val);
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2020-11-24 10:12:01 +01:00
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void e2k_gen_cond_i32(DisasContext *ctx, TCGv_i32 ret, uint8_t psrc);
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static inline void e2k_gen_cond_i64(DisasContext *ctx, TCGv_i64 ret,
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uint8_t psrc)
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{
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TCGv_i32 t0 = tcg_temp_new_i32();
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e2k_gen_cond_i32(ctx, t0, psrc);
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tcg_gen_extu_i32_i64(ret, t0);
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tcg_temp_free_i32(t0);
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}
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2020-11-11 20:03:51 +01:00
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void e2k_gen_exception(DisasContext *dc, int which);
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2020-11-11 21:45:55 +01:00
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void e2k_control_gen(DisasContext *dc);
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2020-11-17 19:58:22 +01:00
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void e2k_execute_alc(DisasContext *ctx, int index);
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2020-11-11 20:03:51 +01:00
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void e2k_alc_commit(DisasContext *dc);
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2020-11-23 20:57:46 +01:00
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void e2k_plu_execute(DisasContext *ctx);
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void e2k_plu_commit(DisasContext *ctx);
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2020-11-17 19:58:22 +01:00
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void e2k_commit_stubs(DisasContext *dc);
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2020-11-11 20:03:51 +01:00
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2020-11-11 18:06:46 +01:00
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#endif
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