2008-04-14 23:57:44 +02:00
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/*
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* TI TWL92230C energy-management companion device for the OMAP24xx.
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* Aka. Menelaus (N4200 MENELAUS1_V2.2)
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*
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* Copyright (C) 2008 Nokia Corporation
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* Written by Andrzej Zaborowski <andrew@openedhand.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) version 3 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include "hw.h"
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#include "qemu-timer.h"
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#include "i2c.h"
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#include "sysemu.h"
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#include "console.h"
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#define VERBOSE 1
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struct menelaus_s {
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i2c_slave i2c;
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qemu_irq irq;
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int firstbyte;
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uint8_t reg;
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uint8_t vcore[5];
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uint8_t dcdc[3];
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uint8_t ldo[8];
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uint8_t sleep[2];
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uint8_t osc;
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uint8_t detect;
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uint16_t mask;
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uint16_t status;
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uint8_t dir;
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uint8_t inputs;
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uint8_t outputs;
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uint8_t bbsms;
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uint8_t pull[4];
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uint8_t mmc_ctrl[3];
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uint8_t mmc_debounce;
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struct {
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uint8_t ctrl;
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uint16_t comp;
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2008-11-12 18:36:08 +01:00
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QEMUTimer *hz_tm;
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2008-04-14 23:57:44 +02:00
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int64_t next;
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struct tm tm;
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struct tm new;
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struct tm alm;
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2008-04-17 01:07:32 +02:00
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int sec_offset;
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int alm_sec;
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int next_comp;
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2008-04-14 23:57:44 +02:00
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} rtc;
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qemu_irq handler[3];
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qemu_irq *in;
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int pwrbtn_state;
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qemu_irq pwrbtn;
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};
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static inline void menelaus_update(struct menelaus_s *s)
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{
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qemu_set_irq(s->irq, s->status & ~s->mask);
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}
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static inline void menelaus_rtc_start(struct menelaus_s *s)
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{
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s->rtc.next =+ qemu_get_clock(rt_clock);
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2008-11-12 18:36:08 +01:00
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qemu_mod_timer(s->rtc.hz_tm, s->rtc.next);
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2008-04-14 23:57:44 +02:00
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}
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static inline void menelaus_rtc_stop(struct menelaus_s *s)
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{
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2008-11-12 18:36:08 +01:00
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qemu_del_timer(s->rtc.hz_tm);
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2008-04-14 23:57:44 +02:00
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s->rtc.next =- qemu_get_clock(rt_clock);
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if (s->rtc.next < 1)
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s->rtc.next = 1;
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}
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static void menelaus_rtc_update(struct menelaus_s *s)
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{
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2008-04-17 01:07:32 +02:00
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qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset);
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2008-04-14 23:57:44 +02:00
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}
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static void menelaus_alm_update(struct menelaus_s *s)
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{
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if ((s->rtc.ctrl & 3) == 3)
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2008-04-17 01:07:32 +02:00
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s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset;
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2008-04-14 23:57:44 +02:00
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}
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static void menelaus_rtc_hz(void *opaque)
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{
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struct menelaus_s *s = (struct menelaus_s *) opaque;
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2008-04-17 01:07:32 +02:00
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s->rtc.next_comp --;
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s->rtc.alm_sec --;
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2008-04-14 23:57:44 +02:00
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s->rtc.next += 1000;
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2008-11-12 18:36:08 +01:00
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qemu_mod_timer(s->rtc.hz_tm, s->rtc.next);
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2008-04-14 23:57:44 +02:00
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if ((s->rtc.ctrl >> 3) & 3) { /* EVERY */
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menelaus_rtc_update(s);
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if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec)
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s->status |= 1 << 8; /* RTCTMR */
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else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min)
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s->status |= 1 << 8; /* RTCTMR */
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else if (!s->rtc.tm.tm_hour)
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s->status |= 1 << 8; /* RTCTMR */
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} else
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s->status |= 1 << 8; /* RTCTMR */
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if ((s->rtc.ctrl >> 1) & 1) { /* RTC_AL_EN */
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2008-04-17 01:07:32 +02:00
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if (s->rtc.alm_sec == 0)
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2008-04-14 23:57:44 +02:00
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s->status |= 1 << 9; /* RTCALM */
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/* TODO: wake-up */
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}
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2008-04-17 01:07:32 +02:00
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if (s->rtc.next_comp <= 0) {
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2008-04-14 23:57:44 +02:00
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s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000);
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2008-04-17 01:07:32 +02:00
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s->rtc.next_comp = 3600;
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2008-04-14 23:57:44 +02:00
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}
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menelaus_update(s);
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}
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2008-08-17 22:26:25 +02:00
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static void menelaus_reset(i2c_slave *i2c)
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2008-04-14 23:57:44 +02:00
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{
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struct menelaus_s *s = (struct menelaus_s *) i2c;
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s->reg = 0x00;
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s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check! */
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s->vcore[1] = 0x05;
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s->vcore[2] = 0x02;
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s->vcore[3] = 0x0c;
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s->vcore[4] = 0x03;
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s->dcdc[0] = 0x33; /* Depends on wiring */
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s->dcdc[1] = 0x03;
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s->dcdc[2] = 0x00;
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s->ldo[0] = 0x95;
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s->ldo[1] = 0x7e;
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s->ldo[2] = 0x00;
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s->ldo[3] = 0x00; /* Depends on wiring */
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s->ldo[4] = 0x03; /* Depends on wiring */
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s->ldo[5] = 0x00;
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s->ldo[6] = 0x00;
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s->ldo[7] = 0x00;
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s->sleep[0] = 0x00;
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s->sleep[1] = 0x00;
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s->osc = 0x01;
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s->detect = 0x09;
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s->mask = 0x0fff;
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s->status = 0;
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s->dir = 0x07;
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s->outputs = 0x00;
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s->bbsms = 0x00;
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s->pull[0] = 0x00;
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s->pull[1] = 0x00;
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s->pull[2] = 0x00;
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s->pull[3] = 0x00;
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s->mmc_ctrl[0] = 0x03;
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s->mmc_ctrl[1] = 0xc0;
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s->mmc_ctrl[2] = 0x00;
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s->mmc_debounce = 0x05;
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if (s->rtc.ctrl & 1)
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menelaus_rtc_stop(s);
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s->rtc.ctrl = 0x00;
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s->rtc.comp = 0x0000;
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s->rtc.next = 1000;
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2008-04-17 01:07:32 +02:00
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s->rtc.sec_offset = 0;
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s->rtc.next_comp = 1800;
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s->rtc.alm_sec = 1800;
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2008-04-14 23:57:44 +02:00
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s->rtc.alm.tm_sec = 0x00;
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s->rtc.alm.tm_min = 0x00;
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s->rtc.alm.tm_hour = 0x00;
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s->rtc.alm.tm_mday = 0x01;
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s->rtc.alm.tm_mon = 0x00;
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s->rtc.alm.tm_year = 2004;
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menelaus_update(s);
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}
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static inline uint8_t to_bcd(int val)
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{
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return ((val / 10) << 4) | (val % 10);
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}
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static inline int from_bcd(uint8_t val)
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{
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return ((val >> 4) * 10) + (val & 0x0f);
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}
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static void menelaus_gpio_set(void *opaque, int line, int level)
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{
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struct menelaus_s *s = (struct menelaus_s *) opaque;
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/* No interrupt generated */
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s->inputs &= ~(1 << line);
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s->inputs |= level << line;
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}
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static void menelaus_pwrbtn_set(void *opaque, int line, int level)
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{
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struct menelaus_s *s = (struct menelaus_s *) opaque;
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if (!s->pwrbtn_state && level) {
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s->status |= 1 << 11; /* PSHBTN */
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menelaus_update(s);
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}
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s->pwrbtn_state = level;
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}
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#define MENELAUS_REV 0x01
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#define MENELAUS_VCORE_CTRL1 0x02
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#define MENELAUS_VCORE_CTRL2 0x03
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#define MENELAUS_VCORE_CTRL3 0x04
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#define MENELAUS_VCORE_CTRL4 0x05
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#define MENELAUS_VCORE_CTRL5 0x06
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#define MENELAUS_DCDC_CTRL1 0x07
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#define MENELAUS_DCDC_CTRL2 0x08
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#define MENELAUS_DCDC_CTRL3 0x09
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#define MENELAUS_LDO_CTRL1 0x0a
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#define MENELAUS_LDO_CTRL2 0x0b
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#define MENELAUS_LDO_CTRL3 0x0c
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#define MENELAUS_LDO_CTRL4 0x0d
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#define MENELAUS_LDO_CTRL5 0x0e
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#define MENELAUS_LDO_CTRL6 0x0f
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#define MENELAUS_LDO_CTRL7 0x10
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#define MENELAUS_LDO_CTRL8 0x11
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#define MENELAUS_SLEEP_CTRL1 0x12
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#define MENELAUS_SLEEP_CTRL2 0x13
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#define MENELAUS_DEVICE_OFF 0x14
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#define MENELAUS_OSC_CTRL 0x15
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#define MENELAUS_DETECT_CTRL 0x16
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#define MENELAUS_INT_MASK1 0x17
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#define MENELAUS_INT_MASK2 0x18
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#define MENELAUS_INT_STATUS1 0x19
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#define MENELAUS_INT_STATUS2 0x1a
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#define MENELAUS_INT_ACK1 0x1b
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#define MENELAUS_INT_ACK2 0x1c
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#define MENELAUS_GPIO_CTRL 0x1d
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#define MENELAUS_GPIO_IN 0x1e
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#define MENELAUS_GPIO_OUT 0x1f
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#define MENELAUS_BBSMS 0x20
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#define MENELAUS_RTC_CTRL 0x21
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#define MENELAUS_RTC_UPDATE 0x22
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#define MENELAUS_RTC_SEC 0x23
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#define MENELAUS_RTC_MIN 0x24
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#define MENELAUS_RTC_HR 0x25
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#define MENELAUS_RTC_DAY 0x26
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#define MENELAUS_RTC_MON 0x27
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#define MENELAUS_RTC_YR 0x28
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#define MENELAUS_RTC_WKDAY 0x29
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#define MENELAUS_RTC_AL_SEC 0x2a
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#define MENELAUS_RTC_AL_MIN 0x2b
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#define MENELAUS_RTC_AL_HR 0x2c
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#define MENELAUS_RTC_AL_DAY 0x2d
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#define MENELAUS_RTC_AL_MON 0x2e
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#define MENELAUS_RTC_AL_YR 0x2f
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#define MENELAUS_RTC_COMP_MSB 0x30
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#define MENELAUS_RTC_COMP_LSB 0x31
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#define MENELAUS_S1_PULL_EN 0x32
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#define MENELAUS_S1_PULL_DIR 0x33
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#define MENELAUS_S2_PULL_EN 0x34
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#define MENELAUS_S2_PULL_DIR 0x35
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#define MENELAUS_MCT_CTRL1 0x36
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#define MENELAUS_MCT_CTRL2 0x37
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#define MENELAUS_MCT_CTRL3 0x38
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#define MENELAUS_MCT_PIN_ST 0x39
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#define MENELAUS_DEBOUNCE1 0x3a
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static uint8_t menelaus_read(void *opaque, uint8_t addr)
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{
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struct menelaus_s *s = (struct menelaus_s *) opaque;
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int reg = 0;
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switch (addr) {
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case MENELAUS_REV:
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return 0x22;
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case MENELAUS_VCORE_CTRL5: reg ++;
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case MENELAUS_VCORE_CTRL4: reg ++;
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case MENELAUS_VCORE_CTRL3: reg ++;
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case MENELAUS_VCORE_CTRL2: reg ++;
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case MENELAUS_VCORE_CTRL1:
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return s->vcore[reg];
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case MENELAUS_DCDC_CTRL3: reg ++;
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case MENELAUS_DCDC_CTRL2: reg ++;
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case MENELAUS_DCDC_CTRL1:
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return s->dcdc[reg];
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case MENELAUS_LDO_CTRL8: reg ++;
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case MENELAUS_LDO_CTRL7: reg ++;
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case MENELAUS_LDO_CTRL6: reg ++;
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case MENELAUS_LDO_CTRL5: reg ++;
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case MENELAUS_LDO_CTRL4: reg ++;
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case MENELAUS_LDO_CTRL3: reg ++;
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case MENELAUS_LDO_CTRL2: reg ++;
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case MENELAUS_LDO_CTRL1:
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return s->ldo[reg];
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case MENELAUS_SLEEP_CTRL2: reg ++;
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case MENELAUS_SLEEP_CTRL1:
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return s->sleep[reg];
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case MENELAUS_DEVICE_OFF:
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return 0;
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case MENELAUS_OSC_CTRL:
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return s->osc | (1 << 7); /* CLK32K_GOOD */
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case MENELAUS_DETECT_CTRL:
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return s->detect;
|
|
|
|
|
|
|
|
case MENELAUS_INT_MASK1:
|
|
|
|
return (s->mask >> 0) & 0xff;
|
|
|
|
case MENELAUS_INT_MASK2:
|
|
|
|
return (s->mask >> 8) & 0xff;
|
|
|
|
|
|
|
|
case MENELAUS_INT_STATUS1:
|
|
|
|
return (s->status >> 0) & 0xff;
|
|
|
|
case MENELAUS_INT_STATUS2:
|
|
|
|
return (s->status >> 8) & 0xff;
|
|
|
|
|
|
|
|
case MENELAUS_INT_ACK1:
|
|
|
|
case MENELAUS_INT_ACK2:
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
case MENELAUS_GPIO_CTRL:
|
|
|
|
return s->dir;
|
|
|
|
case MENELAUS_GPIO_IN:
|
|
|
|
return s->inputs | (~s->dir & s->outputs);
|
|
|
|
case MENELAUS_GPIO_OUT:
|
|
|
|
return s->outputs;
|
|
|
|
|
|
|
|
case MENELAUS_BBSMS:
|
|
|
|
return s->bbsms;
|
|
|
|
|
|
|
|
case MENELAUS_RTC_CTRL:
|
|
|
|
return s->rtc.ctrl;
|
|
|
|
case MENELAUS_RTC_UPDATE:
|
|
|
|
return 0x00;
|
|
|
|
case MENELAUS_RTC_SEC:
|
|
|
|
menelaus_rtc_update(s);
|
|
|
|
return to_bcd(s->rtc.tm.tm_sec);
|
|
|
|
case MENELAUS_RTC_MIN:
|
|
|
|
menelaus_rtc_update(s);
|
|
|
|
return to_bcd(s->rtc.tm.tm_min);
|
|
|
|
case MENELAUS_RTC_HR:
|
|
|
|
menelaus_rtc_update(s);
|
|
|
|
if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
|
|
|
|
return to_bcd((s->rtc.tm.tm_hour % 12) + 1) |
|
|
|
|
(!!(s->rtc.tm.tm_hour >= 12) << 7); /* PM_nAM */
|
|
|
|
else
|
|
|
|
return to_bcd(s->rtc.tm.tm_hour);
|
|
|
|
case MENELAUS_RTC_DAY:
|
|
|
|
menelaus_rtc_update(s);
|
|
|
|
return to_bcd(s->rtc.tm.tm_mday);
|
|
|
|
case MENELAUS_RTC_MON:
|
|
|
|
menelaus_rtc_update(s);
|
|
|
|
return to_bcd(s->rtc.tm.tm_mon + 1);
|
|
|
|
case MENELAUS_RTC_YR:
|
|
|
|
menelaus_rtc_update(s);
|
|
|
|
return to_bcd(s->rtc.tm.tm_year - 2000);
|
|
|
|
case MENELAUS_RTC_WKDAY:
|
|
|
|
menelaus_rtc_update(s);
|
|
|
|
return to_bcd(s->rtc.tm.tm_wday);
|
|
|
|
case MENELAUS_RTC_AL_SEC:
|
|
|
|
return to_bcd(s->rtc.alm.tm_sec);
|
|
|
|
case MENELAUS_RTC_AL_MIN:
|
|
|
|
return to_bcd(s->rtc.alm.tm_min);
|
|
|
|
case MENELAUS_RTC_AL_HR:
|
|
|
|
if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
|
|
|
|
return to_bcd((s->rtc.alm.tm_hour % 12) + 1) |
|
|
|
|
(!!(s->rtc.alm.tm_hour >= 12) << 7);/* AL_PM_nAM */
|
|
|
|
else
|
|
|
|
return to_bcd(s->rtc.alm.tm_hour);
|
|
|
|
case MENELAUS_RTC_AL_DAY:
|
|
|
|
return to_bcd(s->rtc.alm.tm_mday);
|
|
|
|
case MENELAUS_RTC_AL_MON:
|
|
|
|
return to_bcd(s->rtc.alm.tm_mon + 1);
|
|
|
|
case MENELAUS_RTC_AL_YR:
|
|
|
|
return to_bcd(s->rtc.alm.tm_year - 2000);
|
|
|
|
case MENELAUS_RTC_COMP_MSB:
|
|
|
|
return (s->rtc.comp >> 8) & 0xff;
|
|
|
|
case MENELAUS_RTC_COMP_LSB:
|
|
|
|
return (s->rtc.comp >> 0) & 0xff;
|
|
|
|
|
|
|
|
case MENELAUS_S1_PULL_EN:
|
|
|
|
return s->pull[0];
|
|
|
|
case MENELAUS_S1_PULL_DIR:
|
|
|
|
return s->pull[1];
|
|
|
|
case MENELAUS_S2_PULL_EN:
|
|
|
|
return s->pull[2];
|
|
|
|
case MENELAUS_S2_PULL_DIR:
|
|
|
|
return s->pull[3];
|
|
|
|
|
|
|
|
case MENELAUS_MCT_CTRL3: reg ++;
|
|
|
|
case MENELAUS_MCT_CTRL2: reg ++;
|
|
|
|
case MENELAUS_MCT_CTRL1:
|
|
|
|
return s->mmc_ctrl[reg];
|
|
|
|
case MENELAUS_MCT_PIN_ST:
|
|
|
|
/* TODO: return the real Card Detect */
|
|
|
|
return 0;
|
|
|
|
case MENELAUS_DEBOUNCE1:
|
|
|
|
return s->mmc_debounce;
|
|
|
|
|
|
|
|
default:
|
|
|
|
#ifdef VERBOSE
|
|
|
|
printf("%s: unknown register %02x\n", __FUNCTION__, addr);
|
|
|
|
#endif
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void menelaus_write(void *opaque, uint8_t addr, uint8_t value)
|
|
|
|
{
|
|
|
|
struct menelaus_s *s = (struct menelaus_s *) opaque;
|
|
|
|
int line;
|
|
|
|
int reg = 0;
|
|
|
|
struct tm tm;
|
|
|
|
|
|
|
|
switch (addr) {
|
|
|
|
case MENELAUS_VCORE_CTRL1:
|
|
|
|
s->vcore[0] = (value & 0xe) | MIN(value & 0x1f, 0x12);
|
|
|
|
break;
|
|
|
|
case MENELAUS_VCORE_CTRL2:
|
|
|
|
s->vcore[1] = value;
|
|
|
|
break;
|
|
|
|
case MENELAUS_VCORE_CTRL3:
|
|
|
|
s->vcore[2] = MIN(value & 0x1f, 0x12);
|
|
|
|
break;
|
|
|
|
case MENELAUS_VCORE_CTRL4:
|
|
|
|
s->vcore[3] = MIN(value & 0x1f, 0x12);
|
|
|
|
break;
|
|
|
|
case MENELAUS_VCORE_CTRL5:
|
|
|
|
s->vcore[4] = value & 3;
|
|
|
|
/* XXX
|
|
|
|
* auto set to 3 on M_Active, nRESWARM
|
|
|
|
* auto set to 0 on M_WaitOn, M_Backup
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_DCDC_CTRL1:
|
|
|
|
s->dcdc[0] = value & 0x3f;
|
|
|
|
break;
|
|
|
|
case MENELAUS_DCDC_CTRL2:
|
|
|
|
s->dcdc[1] = value & 0x07;
|
|
|
|
/* XXX
|
|
|
|
* auto set to 3 on M_Active, nRESWARM
|
|
|
|
* auto set to 0 on M_WaitOn, M_Backup
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
case MENELAUS_DCDC_CTRL3:
|
|
|
|
s->dcdc[2] = value & 0x07;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_LDO_CTRL1:
|
|
|
|
s->ldo[0] = value;
|
|
|
|
break;
|
|
|
|
case MENELAUS_LDO_CTRL2:
|
|
|
|
s->ldo[1] = value & 0x7f;
|
|
|
|
/* XXX
|
|
|
|
* auto set to 0x7e on M_WaitOn, M_Backup
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
case MENELAUS_LDO_CTRL3:
|
|
|
|
s->ldo[2] = value & 3;
|
|
|
|
/* XXX
|
|
|
|
* auto set to 3 on M_Active, nRESWARM
|
|
|
|
* auto set to 0 on M_WaitOn, M_Backup
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
case MENELAUS_LDO_CTRL4:
|
|
|
|
s->ldo[3] = value & 3;
|
|
|
|
/* XXX
|
|
|
|
* auto set to 3 on M_Active, nRESWARM
|
|
|
|
* auto set to 0 on M_WaitOn, M_Backup
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
case MENELAUS_LDO_CTRL5:
|
|
|
|
s->ldo[4] = value & 3;
|
|
|
|
/* XXX
|
|
|
|
* auto set to 3 on M_Active, nRESWARM
|
|
|
|
* auto set to 0 on M_WaitOn, M_Backup
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
case MENELAUS_LDO_CTRL6:
|
|
|
|
s->ldo[5] = value & 3;
|
|
|
|
break;
|
|
|
|
case MENELAUS_LDO_CTRL7:
|
|
|
|
s->ldo[6] = value & 3;
|
|
|
|
break;
|
|
|
|
case MENELAUS_LDO_CTRL8:
|
|
|
|
s->ldo[7] = value & 3;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_SLEEP_CTRL2: reg ++;
|
|
|
|
case MENELAUS_SLEEP_CTRL1:
|
|
|
|
s->sleep[reg] = value;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_DEVICE_OFF:
|
|
|
|
if (value & 1)
|
|
|
|
menelaus_reset(&s->i2c);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_OSC_CTRL:
|
|
|
|
s->osc = value & 7;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_DETECT_CTRL:
|
|
|
|
s->detect = value & 0x7f;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_INT_MASK1:
|
|
|
|
s->mask &= 0xf00;
|
|
|
|
s->mask |= value << 0;
|
|
|
|
menelaus_update(s);
|
|
|
|
break;
|
|
|
|
case MENELAUS_INT_MASK2:
|
|
|
|
s->mask &= 0x0ff;
|
|
|
|
s->mask |= value << 8;
|
|
|
|
menelaus_update(s);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_INT_ACK1:
|
|
|
|
s->status &= ~(((uint16_t) value) << 0);
|
|
|
|
menelaus_update(s);
|
|
|
|
break;
|
|
|
|
case MENELAUS_INT_ACK2:
|
|
|
|
s->status &= ~(((uint16_t) value) << 8);
|
|
|
|
menelaus_update(s);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_GPIO_CTRL:
|
|
|
|
for (line = 0; line < 3; line ++)
|
|
|
|
if (((s->dir ^ value) >> line) & 1)
|
|
|
|
if (s->handler[line])
|
|
|
|
qemu_set_irq(s->handler[line],
|
|
|
|
((s->outputs & ~s->dir) >> line) & 1);
|
|
|
|
s->dir = value & 0x67;
|
|
|
|
break;
|
|
|
|
case MENELAUS_GPIO_OUT:
|
|
|
|
for (line = 0; line < 3; line ++)
|
|
|
|
if ((((s->outputs ^ value) & ~s->dir) >> line) & 1)
|
|
|
|
if (s->handler[line])
|
|
|
|
qemu_set_irq(s->handler[line], (s->outputs >> line) & 1);
|
|
|
|
s->outputs = value & 0x07;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_BBSMS:
|
|
|
|
s->bbsms = 0x0d;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_RTC_CTRL:
|
|
|
|
if ((s->rtc.ctrl ^ value) & 1) { /* RTC_EN */
|
|
|
|
if (value & 1)
|
|
|
|
menelaus_rtc_start(s);
|
|
|
|
else
|
|
|
|
menelaus_rtc_stop(s);
|
|
|
|
}
|
|
|
|
s->rtc.ctrl = value & 0x1f;
|
|
|
|
menelaus_alm_update(s);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_UPDATE:
|
|
|
|
menelaus_rtc_update(s);
|
|
|
|
memcpy(&tm, &s->rtc.tm, sizeof(tm));
|
|
|
|
switch (value & 0xf) {
|
|
|
|
case 0:
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
tm.tm_sec = s->rtc.new.tm_sec;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
tm.tm_min = s->rtc.new.tm_min;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
if (s->rtc.new.tm_hour > 23)
|
|
|
|
goto rtc_badness;
|
|
|
|
tm.tm_hour = s->rtc.new.tm_hour;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
if (s->rtc.new.tm_mday < 1)
|
|
|
|
goto rtc_badness;
|
|
|
|
/* TODO check range */
|
|
|
|
tm.tm_mday = s->rtc.new.tm_mday;
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
|
|
|
|
goto rtc_badness;
|
|
|
|
tm.tm_mon = s->rtc.new.tm_mon;
|
|
|
|
break;
|
|
|
|
case 6:
|
|
|
|
tm.tm_year = s->rtc.new.tm_year;
|
|
|
|
break;
|
|
|
|
case 7:
|
|
|
|
/* TODO set .tm_mday instead */
|
|
|
|
tm.tm_wday = s->rtc.new.tm_wday;
|
|
|
|
break;
|
|
|
|
case 8:
|
|
|
|
if (s->rtc.new.tm_hour > 23)
|
|
|
|
goto rtc_badness;
|
|
|
|
if (s->rtc.new.tm_mday < 1)
|
|
|
|
goto rtc_badness;
|
|
|
|
if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
|
|
|
|
goto rtc_badness;
|
|
|
|
tm.tm_sec = s->rtc.new.tm_sec;
|
|
|
|
tm.tm_min = s->rtc.new.tm_min;
|
|
|
|
tm.tm_hour = s->rtc.new.tm_hour;
|
|
|
|
tm.tm_mday = s->rtc.new.tm_mday;
|
|
|
|
tm.tm_mon = s->rtc.new.tm_mon;
|
|
|
|
tm.tm_year = s->rtc.new.tm_year;
|
|
|
|
break;
|
|
|
|
rtc_badness:
|
|
|
|
default:
|
|
|
|
fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n",
|
|
|
|
__FUNCTION__, value);
|
|
|
|
s->status |= 1 << 10; /* RTCERR */
|
|
|
|
menelaus_update(s);
|
|
|
|
}
|
2008-04-17 01:07:32 +02:00
|
|
|
s->rtc.sec_offset = qemu_timedate_diff(&tm);
|
2008-04-14 23:57:44 +02:00
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_SEC:
|
|
|
|
s->rtc.tm.tm_sec = from_bcd(value & 0x7f);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_MIN:
|
|
|
|
s->rtc.tm.tm_min = from_bcd(value & 0x7f);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_HR:
|
|
|
|
s->rtc.tm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
|
|
|
|
MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
|
|
|
|
from_bcd(value & 0x3f);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_DAY:
|
|
|
|
s->rtc.tm.tm_mday = from_bcd(value);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_MON:
|
|
|
|
s->rtc.tm.tm_mon = MAX(1, from_bcd(value)) - 1;
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_YR:
|
|
|
|
s->rtc.tm.tm_year = 2000 + from_bcd(value);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_WKDAY:
|
|
|
|
s->rtc.tm.tm_mday = from_bcd(value);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_AL_SEC:
|
|
|
|
s->rtc.alm.tm_sec = from_bcd(value & 0x7f);
|
|
|
|
menelaus_alm_update(s);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_AL_MIN:
|
|
|
|
s->rtc.alm.tm_min = from_bcd(value & 0x7f);
|
|
|
|
menelaus_alm_update(s);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_AL_HR:
|
|
|
|
s->rtc.alm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
|
|
|
|
MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
|
|
|
|
from_bcd(value & 0x3f);
|
|
|
|
menelaus_alm_update(s);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_AL_DAY:
|
|
|
|
s->rtc.alm.tm_mday = from_bcd(value);
|
|
|
|
menelaus_alm_update(s);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_AL_MON:
|
|
|
|
s->rtc.alm.tm_mon = MAX(1, from_bcd(value)) - 1;
|
|
|
|
menelaus_alm_update(s);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_AL_YR:
|
|
|
|
s->rtc.alm.tm_year = 2000 + from_bcd(value);
|
|
|
|
menelaus_alm_update(s);
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_COMP_MSB:
|
|
|
|
s->rtc.comp &= 0xff;
|
|
|
|
s->rtc.comp |= value << 8;
|
|
|
|
break;
|
|
|
|
case MENELAUS_RTC_COMP_LSB:
|
|
|
|
s->rtc.comp &= 0xff << 8;
|
|
|
|
s->rtc.comp |= value;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_S1_PULL_EN:
|
|
|
|
s->pull[0] = value;
|
|
|
|
break;
|
|
|
|
case MENELAUS_S1_PULL_DIR:
|
|
|
|
s->pull[1] = value & 0x1f;
|
|
|
|
break;
|
|
|
|
case MENELAUS_S2_PULL_EN:
|
|
|
|
s->pull[2] = value;
|
|
|
|
break;
|
|
|
|
case MENELAUS_S2_PULL_DIR:
|
|
|
|
s->pull[3] = value & 0x1f;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case MENELAUS_MCT_CTRL1:
|
|
|
|
s->mmc_ctrl[0] = value & 0x7f;
|
|
|
|
break;
|
|
|
|
case MENELAUS_MCT_CTRL2:
|
|
|
|
s->mmc_ctrl[1] = value;
|
|
|
|
/* TODO update Card Detect interrupts */
|
|
|
|
break;
|
|
|
|
case MENELAUS_MCT_CTRL3:
|
|
|
|
s->mmc_ctrl[2] = value & 0xf;
|
|
|
|
break;
|
|
|
|
case MENELAUS_DEBOUNCE1:
|
|
|
|
s->mmc_debounce = value & 0x3f;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
#ifdef VERBOSE
|
|
|
|
printf("%s: unknown register %02x\n", __FUNCTION__, addr);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void menelaus_event(i2c_slave *i2c, enum i2c_event event)
|
|
|
|
{
|
|
|
|
struct menelaus_s *s = (struct menelaus_s *) i2c;
|
|
|
|
|
|
|
|
if (event == I2C_START_SEND)
|
|
|
|
s->firstbyte = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int menelaus_tx(i2c_slave *i2c, uint8_t data)
|
|
|
|
{
|
|
|
|
struct menelaus_s *s = (struct menelaus_s *) i2c;
|
|
|
|
/* Interpret register address byte */
|
|
|
|
if (s->firstbyte) {
|
|
|
|
s->reg = data;
|
|
|
|
s->firstbyte = 0;
|
|
|
|
} else
|
|
|
|
menelaus_write(s, s->reg ++, data);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int menelaus_rx(i2c_slave *i2c)
|
|
|
|
{
|
|
|
|
struct menelaus_s *s = (struct menelaus_s *) i2c;
|
|
|
|
|
|
|
|
return menelaus_read(s, s->reg ++);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tm_put(QEMUFile *f, struct tm *tm) {
|
|
|
|
qemu_put_be16(f, tm->tm_sec);
|
|
|
|
qemu_put_be16(f, tm->tm_min);
|
|
|
|
qemu_put_be16(f, tm->tm_hour);
|
|
|
|
qemu_put_be16(f, tm->tm_mday);
|
|
|
|
qemu_put_be16(f, tm->tm_min);
|
|
|
|
qemu_put_be16(f, tm->tm_year);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tm_get(QEMUFile *f, struct tm *tm) {
|
|
|
|
tm->tm_sec = qemu_get_be16(f);
|
|
|
|
tm->tm_min = qemu_get_be16(f);
|
|
|
|
tm->tm_hour = qemu_get_be16(f);
|
|
|
|
tm->tm_mday = qemu_get_be16(f);
|
|
|
|
tm->tm_min = qemu_get_be16(f);
|
|
|
|
tm->tm_year = qemu_get_be16(f);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void menelaus_save(QEMUFile *f, void *opaque)
|
|
|
|
{
|
|
|
|
struct menelaus_s *s = (struct menelaus_s *) opaque;
|
|
|
|
|
|
|
|
qemu_put_be32(f, s->firstbyte);
|
|
|
|
qemu_put_8s(f, &s->reg);
|
|
|
|
|
|
|
|
qemu_put_8s(f, &s->vcore[0]);
|
|
|
|
qemu_put_8s(f, &s->vcore[1]);
|
|
|
|
qemu_put_8s(f, &s->vcore[2]);
|
|
|
|
qemu_put_8s(f, &s->vcore[3]);
|
|
|
|
qemu_put_8s(f, &s->vcore[4]);
|
|
|
|
qemu_put_8s(f, &s->dcdc[3]);
|
|
|
|
qemu_put_8s(f, &s->dcdc[3]);
|
|
|
|
qemu_put_8s(f, &s->dcdc[3]);
|
|
|
|
qemu_put_8s(f, &s->ldo[0]);
|
|
|
|
qemu_put_8s(f, &s->ldo[1]);
|
|
|
|
qemu_put_8s(f, &s->ldo[2]);
|
|
|
|
qemu_put_8s(f, &s->ldo[3]);
|
|
|
|
qemu_put_8s(f, &s->ldo[4]);
|
|
|
|
qemu_put_8s(f, &s->ldo[5]);
|
|
|
|
qemu_put_8s(f, &s->ldo[6]);
|
|
|
|
qemu_put_8s(f, &s->ldo[7]);
|
|
|
|
qemu_put_8s(f, &s->sleep[0]);
|
|
|
|
qemu_put_8s(f, &s->sleep[1]);
|
|
|
|
qemu_put_8s(f, &s->osc);
|
|
|
|
qemu_put_8s(f, &s->detect);
|
|
|
|
qemu_put_be16s(f, &s->mask);
|
|
|
|
qemu_put_be16s(f, &s->status);
|
|
|
|
qemu_put_8s(f, &s->dir);
|
|
|
|
qemu_put_8s(f, &s->inputs);
|
|
|
|
qemu_put_8s(f, &s->outputs);
|
|
|
|
qemu_put_8s(f, &s->bbsms);
|
|
|
|
qemu_put_8s(f, &s->pull[0]);
|
|
|
|
qemu_put_8s(f, &s->pull[1]);
|
|
|
|
qemu_put_8s(f, &s->pull[2]);
|
|
|
|
qemu_put_8s(f, &s->pull[3]);
|
|
|
|
qemu_put_8s(f, &s->mmc_ctrl[0]);
|
|
|
|
qemu_put_8s(f, &s->mmc_ctrl[1]);
|
|
|
|
qemu_put_8s(f, &s->mmc_ctrl[2]);
|
|
|
|
qemu_put_8s(f, &s->mmc_debounce);
|
|
|
|
qemu_put_8s(f, &s->rtc.ctrl);
|
|
|
|
qemu_put_be16s(f, &s->rtc.comp);
|
|
|
|
/* Should be <= 1000 */
|
|
|
|
qemu_put_be16(f, s->rtc.next - qemu_get_clock(rt_clock));
|
|
|
|
tm_put(f, &s->rtc.new);
|
|
|
|
tm_put(f, &s->rtc.alm);
|
|
|
|
qemu_put_byte(f, s->pwrbtn_state);
|
|
|
|
|
|
|
|
i2c_slave_save(f, &s->i2c);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int menelaus_load(QEMUFile *f, void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
struct menelaus_s *s = (struct menelaus_s *) opaque;
|
|
|
|
|
|
|
|
s->firstbyte = qemu_get_be32(f);
|
|
|
|
qemu_get_8s(f, &s->reg);
|
|
|
|
|
|
|
|
if (s->rtc.ctrl & 1) /* RTC_EN */
|
|
|
|
menelaus_rtc_stop(s);
|
|
|
|
qemu_get_8s(f, &s->vcore[0]);
|
|
|
|
qemu_get_8s(f, &s->vcore[1]);
|
|
|
|
qemu_get_8s(f, &s->vcore[2]);
|
|
|
|
qemu_get_8s(f, &s->vcore[3]);
|
|
|
|
qemu_get_8s(f, &s->vcore[4]);
|
|
|
|
qemu_get_8s(f, &s->dcdc[3]);
|
|
|
|
qemu_get_8s(f, &s->dcdc[3]);
|
|
|
|
qemu_get_8s(f, &s->dcdc[3]);
|
|
|
|
qemu_get_8s(f, &s->ldo[0]);
|
|
|
|
qemu_get_8s(f, &s->ldo[1]);
|
|
|
|
qemu_get_8s(f, &s->ldo[2]);
|
|
|
|
qemu_get_8s(f, &s->ldo[3]);
|
|
|
|
qemu_get_8s(f, &s->ldo[4]);
|
|
|
|
qemu_get_8s(f, &s->ldo[5]);
|
|
|
|
qemu_get_8s(f, &s->ldo[6]);
|
|
|
|
qemu_get_8s(f, &s->ldo[7]);
|
|
|
|
qemu_get_8s(f, &s->sleep[0]);
|
|
|
|
qemu_get_8s(f, &s->sleep[1]);
|
|
|
|
qemu_get_8s(f, &s->osc);
|
|
|
|
qemu_get_8s(f, &s->detect);
|
|
|
|
qemu_get_be16s(f, &s->mask);
|
|
|
|
qemu_get_be16s(f, &s->status);
|
|
|
|
qemu_get_8s(f, &s->dir);
|
|
|
|
qemu_get_8s(f, &s->inputs);
|
|
|
|
qemu_get_8s(f, &s->outputs);
|
|
|
|
qemu_get_8s(f, &s->bbsms);
|
|
|
|
qemu_get_8s(f, &s->pull[0]);
|
|
|
|
qemu_get_8s(f, &s->pull[1]);
|
|
|
|
qemu_get_8s(f, &s->pull[2]);
|
|
|
|
qemu_get_8s(f, &s->pull[3]);
|
|
|
|
qemu_get_8s(f, &s->mmc_ctrl[0]);
|
|
|
|
qemu_get_8s(f, &s->mmc_ctrl[1]);
|
|
|
|
qemu_get_8s(f, &s->mmc_ctrl[2]);
|
|
|
|
qemu_get_8s(f, &s->mmc_debounce);
|
|
|
|
qemu_get_8s(f, &s->rtc.ctrl);
|
|
|
|
qemu_get_be16s(f, &s->rtc.comp);
|
|
|
|
s->rtc.next = qemu_get_be16(f);
|
|
|
|
tm_get(f, &s->rtc.new);
|
|
|
|
tm_get(f, &s->rtc.alm);
|
|
|
|
s->pwrbtn_state = qemu_get_byte(f);
|
|
|
|
menelaus_alm_update(s);
|
|
|
|
menelaus_update(s);
|
|
|
|
if (s->rtc.ctrl & 1) /* RTC_EN */
|
|
|
|
menelaus_rtc_start(s);
|
|
|
|
|
|
|
|
i2c_slave_load(f, &s->i2c);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
i2c_slave *twl92230_init(i2c_bus *bus, qemu_irq irq)
|
|
|
|
{
|
|
|
|
struct menelaus_s *s = (struct menelaus_s *)
|
|
|
|
i2c_slave_init(bus, 0, sizeof(struct menelaus_s));
|
|
|
|
|
|
|
|
s->i2c.event = menelaus_event;
|
|
|
|
s->i2c.recv = menelaus_rx;
|
|
|
|
s->i2c.send = menelaus_tx;
|
|
|
|
|
|
|
|
s->irq = irq;
|
2008-11-12 18:36:08 +01:00
|
|
|
s->rtc.hz_tm = qemu_new_timer(rt_clock, menelaus_rtc_hz, s);
|
2008-04-14 23:57:44 +02:00
|
|
|
s->in = qemu_allocate_irqs(menelaus_gpio_set, s, 3);
|
|
|
|
s->pwrbtn = qemu_allocate_irqs(menelaus_pwrbtn_set, s, 1)[0];
|
|
|
|
|
|
|
|
menelaus_reset(&s->i2c);
|
|
|
|
|
2008-07-01 23:31:54 +02:00
|
|
|
register_savevm("menelaus", -1, 0, menelaus_save, menelaus_load, s);
|
2008-04-14 23:57:44 +02:00
|
|
|
|
|
|
|
return &s->i2c;
|
|
|
|
}
|
|
|
|
|
|
|
|
qemu_irq *twl92230_gpio_in_get(i2c_slave *i2c)
|
|
|
|
{
|
|
|
|
struct menelaus_s *s = (struct menelaus_s *) i2c;
|
|
|
|
|
|
|
|
return s->in;
|
|
|
|
}
|
|
|
|
|
|
|
|
void twl92230_gpio_out_set(i2c_slave *i2c, int line, qemu_irq handler)
|
|
|
|
{
|
|
|
|
struct menelaus_s *s = (struct menelaus_s *) i2c;
|
|
|
|
|
|
|
|
if (line >= 3 || line < 0) {
|
|
|
|
fprintf(stderr, "%s: No GPO line %i\n", __FUNCTION__, line);
|
|
|
|
exit(-1);
|
|
|
|
}
|
|
|
|
s->handler[line] = handler;
|
|
|
|
}
|