2007-11-17 18:14:51 +01:00
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#ifndef SPARC32_DMA_H
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#define SPARC32_DMA_H
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/* sparc32_dma.c */
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void *sparc32_dma_init(target_phys_addr_t daddr, qemu_irq parent_irq,
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2009-07-15 22:45:19 +02:00
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void *iommu, qemu_irq *dev_irq, qemu_irq **reset);
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2007-11-17 18:14:51 +01:00
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void ledma_memory_read(void *opaque, target_phys_addr_t addr,
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uint8_t *buf, int len, int do_bswap);
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void ledma_memory_write(void *opaque, target_phys_addr_t addr,
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uint8_t *buf, int len, int do_bswap);
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void espdma_memory_read(void *opaque, uint8_t *buf, int len);
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void espdma_memory_write(void *opaque, uint8_t *buf, int len);
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#endif
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