2008-03-13 02:19:15 +01:00
|
|
|
|
/*
|
|
|
|
|
* QEMU NVRAM emulation for DS1225Y chip
|
2008-03-13 20:23:00 +01:00
|
|
|
|
*
|
|
|
|
|
* Copyright (c) 2007-2008 Herv<EFBFBD> Poussineau
|
|
|
|
|
*
|
2008-03-13 02:19:15 +01:00
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
|
*
|
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
|
*
|
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
|
* THE SOFTWARE.
|
|
|
|
|
*/
|
|
|
|
|
|
2011-07-18 23:34:22 +02:00
|
|
|
|
#include "sysbus.h"
|
2011-07-18 23:34:21 +02:00
|
|
|
|
#include "trace.h"
|
2008-03-13 02:19:15 +01:00
|
|
|
|
|
2011-07-18 23:34:22 +02:00
|
|
|
|
typedef struct {
|
|
|
|
|
DeviceState qdev;
|
2008-03-13 20:23:00 +01:00
|
|
|
|
uint32_t chip_size;
|
2011-07-18 23:34:22 +02:00
|
|
|
|
char *filename;
|
2011-09-13 14:41:18 +02:00
|
|
|
|
FILE *file;
|
2008-03-13 20:23:00 +01:00
|
|
|
|
uint8_t *contents;
|
2011-07-18 23:34:22 +02:00
|
|
|
|
} NvRamState;
|
2008-03-13 02:19:15 +01:00
|
|
|
|
|
2009-10-01 23:12:16 +02:00
|
|
|
|
static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
|
2008-03-13 02:19:15 +01:00
|
|
|
|
{
|
2011-07-18 23:34:22 +02:00
|
|
|
|
NvRamState *s = opaque;
|
2008-03-13 20:23:00 +01:00
|
|
|
|
uint32_t val;
|
|
|
|
|
|
2008-12-01 19:59:50 +01:00
|
|
|
|
val = s->contents[addr];
|
2011-07-18 23:34:21 +02:00
|
|
|
|
trace_nvram_read(addr, val);
|
2008-03-13 20:23:00 +01:00
|
|
|
|
return val;
|
|
|
|
|
}
|
2008-03-13 02:19:15 +01:00
|
|
|
|
|
2009-10-01 23:12:16 +02:00
|
|
|
|
static uint32_t nvram_readw (void *opaque, target_phys_addr_t addr)
|
2008-03-13 20:23:00 +01:00
|
|
|
|
{
|
|
|
|
|
uint32_t v;
|
|
|
|
|
v = nvram_readb(opaque, addr);
|
|
|
|
|
v |= nvram_readb(opaque, addr + 1) << 8;
|
|
|
|
|
return v;
|
|
|
|
|
}
|
2008-03-13 02:19:15 +01:00
|
|
|
|
|
2009-10-01 23:12:16 +02:00
|
|
|
|
static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr)
|
2008-03-13 20:23:00 +01:00
|
|
|
|
{
|
|
|
|
|
uint32_t v;
|
|
|
|
|
v = nvram_readb(opaque, addr);
|
|
|
|
|
v |= nvram_readb(opaque, addr + 1) << 8;
|
|
|
|
|
v |= nvram_readb(opaque, addr + 2) << 16;
|
|
|
|
|
v |= nvram_readb(opaque, addr + 3) << 24;
|
|
|
|
|
return v;
|
2008-03-13 02:19:15 +01:00
|
|
|
|
}
|
|
|
|
|
|
2009-10-01 23:12:16 +02:00
|
|
|
|
static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val)
|
2008-03-13 02:19:15 +01:00
|
|
|
|
{
|
2011-07-18 23:34:22 +02:00
|
|
|
|
NvRamState *s = opaque;
|
2008-03-13 02:19:15 +01:00
|
|
|
|
|
2011-07-18 23:34:21 +02:00
|
|
|
|
val &= 0xff;
|
|
|
|
|
trace_nvram_write(addr, s->contents[addr], val);
|
2008-03-13 20:23:00 +01:00
|
|
|
|
|
2011-07-18 23:34:21 +02:00
|
|
|
|
s->contents[addr] = val;
|
2008-03-13 20:23:00 +01:00
|
|
|
|
if (s->file) {
|
2011-09-13 14:41:18 +02:00
|
|
|
|
fseek(s->file, addr, SEEK_SET);
|
|
|
|
|
fputc(val, s->file);
|
|
|
|
|
fflush(s->file);
|
2008-03-13 02:19:15 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2009-10-01 23:12:16 +02:00
|
|
|
|
static void nvram_writew (void *opaque, target_phys_addr_t addr, uint32_t val)
|
2008-03-13 20:23:00 +01:00
|
|
|
|
{
|
|
|
|
|
nvram_writeb(opaque, addr, val & 0xff);
|
|
|
|
|
nvram_writeb(opaque, addr + 1, (val >> 8) & 0xff);
|
|
|
|
|
}
|
|
|
|
|
|
2009-10-01 23:12:16 +02:00
|
|
|
|
static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t val)
|
2008-03-13 20:23:00 +01:00
|
|
|
|
{
|
|
|
|
|
nvram_writeb(opaque, addr, val & 0xff);
|
|
|
|
|
nvram_writeb(opaque, addr + 1, (val >> 8) & 0xff);
|
|
|
|
|
nvram_writeb(opaque, addr + 2, (val >> 16) & 0xff);
|
|
|
|
|
nvram_writeb(opaque, addr + 3, (val >> 24) & 0xff);
|
|
|
|
|
}
|
|
|
|
|
|
2009-08-25 20:29:31 +02:00
|
|
|
|
static CPUReadMemoryFunc * const nvram_read[] = {
|
2008-03-13 02:19:15 +01:00
|
|
|
|
&nvram_readb,
|
2008-03-13 20:23:00 +01:00
|
|
|
|
&nvram_readw,
|
|
|
|
|
&nvram_readl,
|
2008-03-13 02:19:15 +01:00
|
|
|
|
};
|
|
|
|
|
|
2009-08-25 20:29:31 +02:00
|
|
|
|
static CPUWriteMemoryFunc * const nvram_write[] = {
|
2008-03-13 02:19:15 +01:00
|
|
|
|
&nvram_writeb,
|
2008-03-13 20:23:00 +01:00
|
|
|
|
&nvram_writew,
|
|
|
|
|
&nvram_writel,
|
2008-03-13 02:19:15 +01:00
|
|
|
|
};
|
|
|
|
|
|
2011-07-18 23:34:22 +02:00
|
|
|
|
static int nvram_post_load(void *opaque, int version_id)
|
2008-03-13 02:19:15 +01:00
|
|
|
|
{
|
2011-07-18 23:34:22 +02:00
|
|
|
|
NvRamState *s = opaque;
|
|
|
|
|
|
|
|
|
|
/* Close file, as filename may has changed in load/store process */
|
|
|
|
|
if (s->file) {
|
2011-09-13 14:41:18 +02:00
|
|
|
|
fclose(s->file);
|
2011-07-18 23:34:22 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Write back nvram contents */
|
2011-09-13 14:41:18 +02:00
|
|
|
|
s->file = fopen(s->filename, "wb");
|
2011-07-18 23:34:22 +02:00
|
|
|
|
if (s->file) {
|
|
|
|
|
/* Write back contents, as 'wb' mode cleaned the file */
|
2011-09-13 14:41:18 +02:00
|
|
|
|
if (fwrite(s->contents, s->chip_size, 1, s->file) != 1) {
|
|
|
|
|
printf("nvram_post_load: short write\n");
|
|
|
|
|
}
|
|
|
|
|
fflush(s->file);
|
2011-07-18 23:34:22 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_nvram = {
|
|
|
|
|
.name = "nvram",
|
|
|
|
|
.version_id = 0,
|
|
|
|
|
.minimum_version_id = 0,
|
|
|
|
|
.minimum_version_id_old = 0,
|
|
|
|
|
.post_load = nvram_post_load,
|
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
|
VMSTATE_VARRAY_UINT32(contents, NvRamState, chip_size, 0,
|
|
|
|
|
vmstate_info_uint8, uint8_t),
|
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
|
}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
|
SysBusDevice busdev;
|
|
|
|
|
NvRamState nvram;
|
|
|
|
|
} SysBusNvRamState;
|
|
|
|
|
|
|
|
|
|
static int nvram_sysbus_initfn(SysBusDevice *dev)
|
|
|
|
|
{
|
|
|
|
|
NvRamState *s = &FROM_SYSBUS(SysBusNvRamState, dev)->nvram;
|
2011-09-13 14:41:18 +02:00
|
|
|
|
FILE *file;
|
2011-07-18 23:34:22 +02:00
|
|
|
|
int s_io;
|
2008-03-13 02:19:15 +01:00
|
|
|
|
|
2011-08-21 05:09:37 +02:00
|
|
|
|
s->contents = g_malloc0(s->chip_size);
|
2008-03-13 20:23:00 +01:00
|
|
|
|
|
2011-07-18 23:34:22 +02:00
|
|
|
|
s_io = cpu_register_io_memory(nvram_read, nvram_write, s,
|
|
|
|
|
DEVICE_NATIVE_ENDIAN);
|
|
|
|
|
sysbus_init_mmio(dev, s->chip_size, s_io);
|
|
|
|
|
|
2008-03-13 20:23:00 +01:00
|
|
|
|
/* Read current file */
|
2011-09-13 14:41:18 +02:00
|
|
|
|
file = fopen(s->filename, "rb");
|
2008-03-13 20:23:00 +01:00
|
|
|
|
if (file) {
|
|
|
|
|
/* Read nvram contents */
|
2011-09-13 14:41:18 +02:00
|
|
|
|
if (fread(s->contents, s->chip_size, 1, file) != 1) {
|
|
|
|
|
printf("nvram_sysbus_initfn: short read\n");
|
|
|
|
|
}
|
|
|
|
|
fclose(file);
|
2008-03-13 20:23:00 +01:00
|
|
|
|
}
|
2011-07-18 23:34:22 +02:00
|
|
|
|
nvram_post_load(s, 0);
|
2008-03-13 02:19:15 +01:00
|
|
|
|
|
2011-07-18 23:34:22 +02:00
|
|
|
|
return 0;
|
2008-03-13 02:19:15 +01:00
|
|
|
|
}
|
2011-07-18 23:34:22 +02:00
|
|
|
|
|
|
|
|
|
static SysBusDeviceInfo nvram_sysbus_info = {
|
|
|
|
|
.qdev.name = "ds1225y",
|
|
|
|
|
.qdev.size = sizeof(SysBusNvRamState),
|
|
|
|
|
.qdev.vmsd = &vmstate_nvram,
|
|
|
|
|
.init = nvram_sysbus_initfn,
|
|
|
|
|
.qdev.props = (Property[]) {
|
|
|
|
|
DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000),
|
|
|
|
|
DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
|
|
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static void nvram_register(void)
|
|
|
|
|
{
|
|
|
|
|
sysbus_register_withprop(&nvram_sysbus_info);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
device_init(nvram_register)
|