2011-10-16 00:56:05 +02:00
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#include "cpu.h"
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#include "exec-all.h"
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#include "gdbstub.h"
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#include "host-utils.h"
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#include "core-dc232b/core-isa.h"
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#include "overlay_tool.h"
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static const XtensaConfig dc232b = {
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.name = "dc232b",
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.options = XTENSA_OPTIONS,
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.gdb_regmap = {
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.num_regs = 120,
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.num_core_regs = 52,
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.reg = {
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#include "core-dc232b/gdb-config.c"
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}
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},
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.nareg = XCHAL_NUM_AREGS,
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.ndepc = 1,
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EXCEPTIONS_SECTION,
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INTERRUPTS_SECTION,
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TLB_SECTION,
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2012-01-13 07:10:49 +01:00
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DEBUG_SECTION,
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2011-10-16 00:56:05 +02:00
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.clock_freq_khz = 10000,
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};
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REGISTER_CORE(dc232b)
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