2021-05-17 17:16:58 +02:00
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# See docs/devel/tracing.rst for syntax documentation.
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2016-06-16 10:40:16 +02:00
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2019-03-14 19:09:26 +01:00
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# memory_hotplug.c
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2016-06-16 10:40:16 +02:00
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mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32
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mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32
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mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32
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mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32
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mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32
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mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32
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mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32
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mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32
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mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32
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mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
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mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
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mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event"
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mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event"
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mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted"
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mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed"
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2016-06-14 16:02:06 +02:00
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2019-03-14 19:09:26 +01:00
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# cpu.c
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2016-06-14 16:02:06 +02:00
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cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32
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cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags: 0x%"PRIx8
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cpuhp_acpi_write_idx(uint32_t idx) "set active cpu idx: 0x%"PRIx32
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2016-06-14 16:13:32 +02:00
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cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) "idx[0x%"PRIx32"] cmd: 0x%"PRIx8
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cpuhp_acpi_read_cmd_data(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32
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2019-12-09 14:09:00 +01:00
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cpuhp_acpi_read_cmd_data2(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32
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2016-06-14 16:14:02 +02:00
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cpuhp_acpi_cpu_has_events(uint32_t idx, bool ins, bool rm) "idx[0x%"PRIx32"] inserting: %d, removing: %d"
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2016-06-14 16:13:32 +02:00
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cpuhp_acpi_clear_inserting_evt(uint32_t idx) "idx[0x%"PRIx32"]"
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2016-06-14 16:14:02 +02:00
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cpuhp_acpi_clear_remove_evt(uint32_t idx) "idx[0x%"PRIx32"]"
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cpuhp_acpi_ejecting_invalid_cpu(uint32_t idx) "0x%"PRIx32
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cpuhp_acpi_ejecting_cpu(uint32_t idx) "0x%"PRIx32
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2020-12-07 15:07:33 +01:00
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cpuhp_acpi_fw_remove_invalid_cpu(uint32_t idx) "0x%"PRIx32
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cpuhp_acpi_fw_remove_cpu(uint32_t idx) "0x%"PRIx32
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2016-04-22 19:06:36 +02:00
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cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "idx[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
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cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "idx[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
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2017-10-12 15:54:08 +02:00
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2019-04-02 18:18:59 +02:00
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# pcihp.c
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2019-04-02 18:19:00 +02:00
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acpi_pci_eject_slot(unsigned bsel, unsigned slot) "bsel: %u slot: %u"
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acpi_pci_unplug(int bsel, int slot) "bsel: %d slot: %d"
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acpi_pci_unplug_request(int bsel, int slot) "bsel: %d slot: %d"
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2019-04-02 18:18:59 +02:00
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acpi_pci_up_read(uint32_t val) "%" PRIu32
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acpi_pci_down_read(uint32_t val) "%" PRIu32
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acpi_pci_features_read(uint32_t val) "%" PRIu32
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pci: introduce acpi-index property for PCI device
In x86/ACPI world, linux distros are using predictable
network interface naming since systemd v197. Which on
QEMU based VMs results into path based naming scheme,
that names network interfaces based on PCI topology.
With itm on has to plug NIC in exactly the same bus/slot,
which was used when disk image was first provisioned/configured
or one risks to loose network configuration due to NIC being
renamed to actually used topology.
That also restricts freedom to reshape PCI configuration of
VM without need to reconfigure used guest image.
systemd also offers "onboard" naming scheme which is
preferred over PCI slot/topology one, provided that
firmware implements:
"
PCI Firmware Specification 3.1
4.6.7. DSM for Naming a PCI or PCI Express Device Under
Operating Systems
"
that allows to assign user defined index to PCI device,
which systemd will use to name NIC. For example, using
-device e1000,acpi-index=100
guest will rename NIC to 'eno100', where 'eno' is default
prefix for "onboard" naming scheme. This doesn't require
any advance configuration on guest side to com in effect
at 'onboard' scheme takes priority over path based naming.
Hope is that 'acpi-index' it will be easier to consume by
management layer, compared to forcing specific PCI topology
and/or having several disk image templates for different
topologies and will help to simplify process of spawning
VM from the same template without need to reconfigure
guest NIC.
This patch adds, 'acpi-index'* property and wires up
a 32bit register on top of pci hotplug register block
to pass index value to AML code at runtime.
Following patch will add corresponding _DSM code and
wire it up to PCI devices described in ACPI.
*) name comes from linux kernel terminology
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20210315180102.3008391-3-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-03-15 19:00:58 +01:00
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acpi_pci_acpi_index_read(uint32_t val) "%" PRIu32
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acpi_pci_acpi_index_write(unsigned bsel, unsigned slot, uint32_t aidx) "bsel: %u slot: %u aidx: %" PRIu32
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2019-04-02 18:18:59 +02:00
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acpi_pci_rmv_read(uint32_t val) "%" PRIu32
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acpi_pci_sel_read(uint32_t val) "%" PRIu32
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acpi_pci_ej_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64
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acpi_pci_sel_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64
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2019-04-02 18:18:58 +02:00
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# piix4.c
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piix4_gpe_readb(uint64_t addr, unsigned width, uint64_t val) "addr: 0x%" PRIx64 " width: %d ==> 0x%" PRIx64
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piix4_gpe_writeb(uint64_t addr, unsigned width, uint64_t val) "addr: 0x%" PRIx64 " width: %d <== 0x%" PRIx64
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2019-03-14 19:09:26 +01:00
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# tco.c
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2017-10-12 15:54:08 +02:00
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tco_timer_reload(int ticks, int msec) "ticks=%d (%d ms)"
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tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) "timeouts_no=%d no_reboot=%d/%d"
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2022-12-16 13:57:45 +01:00
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tco_io_write(uint64_t addr, uint32_t val) "addr=0x%" PRIx64 " val=0x%" PRIx32
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tco_io_read(uint64_t addr, uint32_t val) "addr=0x%" PRIx64 " val=0x%" PRIx32
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2022-01-28 21:38:04 +01:00
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# erst.c
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acpi_erst_reg_write(uint64_t addr, uint64_t val, unsigned size) "addr: 0x%04" PRIx64 " <== 0x%016" PRIx64 " (size: %u)"
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acpi_erst_reg_read(uint64_t addr, uint64_t val, unsigned size) " addr: 0x%04" PRIx64 " ==> 0x%016" PRIx64 " (size: %u)"
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acpi_erst_mem_write(uint64_t addr, uint64_t val, unsigned size) "addr: 0x%06" PRIx64 " <== 0x%016" PRIx64 " (size: %u)"
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acpi_erst_mem_read(uint64_t addr, uint64_t val, unsigned size) " addr: 0x%06" PRIx64 " ==> 0x%016" PRIx64 " (size: %u)"
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acpi_erst_pci_bar_0(uint64_t addr) "BAR0: 0x%016" PRIx64
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acpi_erst_pci_bar_1(uint64_t addr) "BAR1: 0x%016" PRIx64
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acpi_erst_realizefn_in(void)
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acpi_erst_realizefn_out(unsigned size) "total nvram size %u bytes"
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acpi_erst_reset_in(unsigned record_count) "record_count %u"
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acpi_erst_reset_out(unsigned record_count) "record_count %u"
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acpi_erst_post_load(void *header, unsigned slot_size) "header: 0x%p slot_size %u"
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acpi_erst_class_init_in(void)
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acpi_erst_class_init_out(void)
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2022-07-04 10:58:52 +02:00
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# nvdimm.c
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acpi_nvdimm_read_fit(uint32_t offset, uint32_t len, const char *dirty) "Read FIT: offset 0x%" PRIx32 " FIT size 0x%" PRIx32 " Dirty %s"
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acpi_nvdimm_label_info(uint32_t label_size, uint32_t mxfer) "label_size 0x%" PRIx32 ", max_xfer 0x%" PRIx32
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acpi_nvdimm_label_overflow(uint32_t offset, uint32_t length) "offset 0x%" PRIx32 " + length 0x%" PRIx32 " is overflow"
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acpi_nvdimm_label_oversize(uint32_t pos, uint64_t size) "position 0x%" PRIx32 " is beyond label data (len = %" PRIu64 ")"
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acpi_nvdimm_label_xfer_exceed(uint32_t length, uint32_t max_xfer) "length (0x%" PRIx32 ") is larger than max_xfer (0x%" PRIx32 ")"
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acpi_nvdimm_read_label(uint32_t offset, uint32_t length) "Read Label Data: offset 0x%" PRIx32 " length 0x%" PRIx32
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acpi_nvdimm_write_label(uint32_t offset, uint32_t length) "Write Label Data: offset 0x%" PRIx32 " length 0x%" PRIx32
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acpi_nvdimm_read_io_port(void) "Alert: we never read _DSM IO Port"
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acpi_nvdimm_dsm_mem_addr(uint64_t dsm_mem_addr) "dsm memory address 0x%" PRIx64
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acpi_nvdimm_dsm_info(uint32_t revision, uint32_t handle, uint32_t function) "Revision 0x%" PRIx32 " Handle 0x%" PRIx32 " Function 0x%" PRIx32
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acpi_nvdimm_invalid_revision(uint32_t revision) "Revision 0x%" PRIx32 " is not supported, expect 0x1"
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