qemu-e2k/default-configs/aarch64-softmmu.mak

# Default configuration for aarch64-softmmu

# We support all the 32 bit boards so need all their config
include arm-softmmu.mak

CONFIG_AUX=y
CONFIG_DDC=y
CONFIG_DPCD=y
CONFIG_XLNX_ZYNQMP=y
CONFIG_XLNX_ZYNQMP_ARM=y
CONFIG_XLNX_VERSAL=y
CONFIG_ARM_SMMUV3=y
default-configs: Add config for aarch64-softmmu Add a config for aarch64-softmmu; this enables building of this target. The resulting executable doesn't know about any 64 bit CPUs, but all the 32 bit CPUs and board models work. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1385645602-18662-8-git-send-email-peter.maydell@linaro.org Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> 2013-12-17 20:42:31 +01:00			`# Default configuration for aarch64-softmmu`

			`# We support all the 32 bit boards so need all their config`
			`include arm-softmmu.mak`

introduce aux-bus This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com> Tested-By: Hyun Kwon <hyun.kwon@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1465833014-21982-5-git-send-email-fred.konrad@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> 2016-06-14 16:59:15 +02:00			`CONFIG_AUX=y`
hw/i2c-ddc.c: Implement DDC I2C slave Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com> Message-id: 1465833014-21982-7-git-send-email-fred.konrad@greensocs.com - Rebased on the current master. - Modified for QOM. Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Tested-By: Hyun Kwon <hyun.kwon@xilinx.com> [PMM: actually wire up the vmstate to dc->vmsd] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> 2016-06-14 16:59:15 +02:00			`CONFIG_DDC=y`
introduce dpcd module This introduces dpcd module. It wires on a aux-bus and can be accessed by the driver to get lane-speed, etc. Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Tested-By: Hyun Kwon <hyun.kwon@xilinx.com> Message-id: 1465833014-21982-6-git-send-email-fred.konrad@greensocs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> 2016-06-14 16:59:15 +02:00			`CONFIG_DPCD=y`
arm: Introduce Xilinx ZynqMP SoC With quad Cortex-A53 CPUs. Use SMC PSCI, with the standard policy of secondaries starting in power-off. Tested-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a16202a6c7b79e446e5289d38cb18d2ee4b897a0.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> 2015-05-15 04:22:58 +02:00			`CONFIG_XLNX_ZYNQMP=y`
aarch64-softmmu.mak: Use an ARM specific config In preperation for having an ARM and MicroBlaze ZynqMP machine let's split out the current ARM specific config options. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> 2018-01-22 20:43:29 +01:00			`CONFIG_XLNX_ZYNQMP_ARM=y`
hw/arm: versal: Add a model of Xilinx Versal SoC Add a model of Xilinx Versal SoC. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20181102131913.1535-2-edgar.iglesias@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> 2018-11-02 14:19:12 +01:00			`CONFIG_XLNX_VERSAL=y`
hw/arm/smmu-common: smmu base device and datatypes The patch introduces the smmu base device and class for the ARM smmu. Devices for specific versions will be derived from this base device. We also introduce some important datatypes. Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Prem Mallappa <prem.mallappa@broadcom.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1524665762-31355-2-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> 2018-05-04 19:05:51 +02:00			`CONFIG_ARM_SMMUV3=y`