2003-08-09 01:58:05 +02:00
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/*
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* Software MMU support
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#if DATA_SIZE == 8
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#define SUFFIX q
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2003-10-27 22:22:23 +01:00
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#define USUFFIX q
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2003-08-09 01:58:05 +02:00
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#define DATA_TYPE uint64_t
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#elif DATA_SIZE == 4
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#define SUFFIX l
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2003-10-27 22:22:23 +01:00
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#define USUFFIX l
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2003-08-09 01:58:05 +02:00
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#define DATA_TYPE uint32_t
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#elif DATA_SIZE == 2
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#define SUFFIX w
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2003-10-27 22:22:23 +01:00
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#define USUFFIX uw
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2003-08-09 01:58:05 +02:00
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#define DATA_TYPE uint16_t
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#define DATA_STYPE int16_t
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#elif DATA_SIZE == 1
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#define SUFFIX b
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2003-10-27 22:22:23 +01:00
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#define USUFFIX ub
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2003-08-09 01:58:05 +02:00
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#define DATA_TYPE uint8_t
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#define DATA_STYPE int8_t
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#else
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#error unsupported data size
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#endif
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2003-10-27 22:22:23 +01:00
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#if ACCESS_TYPE == 0
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#define CPU_MEM_INDEX 0
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#define MMUSUFFIX _mmu
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#elif ACCESS_TYPE == 1
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#define CPU_MEM_INDEX 1
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#define MMUSUFFIX _mmu
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#elif ACCESS_TYPE == 2
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2004-01-05 00:56:24 +01:00
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#ifdef TARGET_I386
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2003-10-27 22:22:23 +01:00
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#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
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2004-01-05 00:56:24 +01:00
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#elif defined (TARGET_PPC)
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#define CPU_MEM_INDEX (msr_pr)
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2005-07-02 16:58:51 +02:00
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#elif defined (TARGET_MIPS)
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#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
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2004-10-01 00:22:08 +02:00
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#elif defined (TARGET_SPARC)
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#define CPU_MEM_INDEX ((env->psrs) == 0)
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2005-11-26 11:38:39 +01:00
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#elif defined (TARGET_ARM)
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#define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
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#else
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#error unsupported CPU
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2004-01-05 00:56:24 +01:00
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#endif
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2003-10-27 22:22:23 +01:00
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#define MMUSUFFIX _mmu
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#elif ACCESS_TYPE == 3
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2004-01-05 00:56:24 +01:00
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#ifdef TARGET_I386
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2003-10-27 22:22:23 +01:00
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#define CPU_MEM_INDEX ((env->hflags & HF_CPL_MASK) == 3)
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2004-01-05 00:56:24 +01:00
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#elif defined (TARGET_PPC)
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#define CPU_MEM_INDEX (msr_pr)
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2005-07-02 16:58:51 +02:00
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#elif defined (TARGET_MIPS)
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#define CPU_MEM_INDEX ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM)
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2004-10-01 00:22:08 +02:00
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#elif defined (TARGET_SPARC)
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#define CPU_MEM_INDEX ((env->psrs) == 0)
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2005-11-26 11:38:39 +01:00
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#elif defined (TARGET_ARM)
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#define CPU_MEM_INDEX ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR)
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#else
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#error unsupported CPU
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2004-01-05 00:56:24 +01:00
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#endif
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2003-10-27 22:22:23 +01:00
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#define MMUSUFFIX _cmmu
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2003-08-09 01:58:05 +02:00
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#else
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2003-10-27 22:22:23 +01:00
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#error invalid ACCESS_TYPE
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2003-08-09 01:58:05 +02:00
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#endif
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#if DATA_SIZE == 8
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#define RES_TYPE uint64_t
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#else
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#define RES_TYPE int
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#endif
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2005-11-28 22:19:04 +01:00
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#if ACCESS_TYPE == 3
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#define ADDR_READ addr_code
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#else
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#define ADDR_READ addr_read
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#endif
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2003-08-09 01:58:05 +02:00
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2005-01-04 00:35:10 +01:00
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DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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2003-10-27 22:22:23 +01:00
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int is_user);
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2005-01-04 00:35:10 +01:00
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void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);
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2003-08-09 01:58:05 +02:00
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2005-01-04 00:35:10 +01:00
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#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
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(ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
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2004-01-04 19:15:29 +01:00
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2005-11-28 22:19:04 +01:00
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#define CPU_TLB_ENTRY_BITS 4
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2005-01-04 00:35:10 +01:00
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static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
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2004-01-04 19:15:29 +01:00
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{
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int res;
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asm volatile ("movl %1, %%edx\n"
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"movl %1, %%eax\n"
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"shrl %3, %%edx\n"
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"andl %4, %%eax\n"
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"andl %2, %%edx\n"
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"leal %5(%%edx, %%ebp), %%edx\n"
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"cmpl (%%edx), %%eax\n"
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"movl %1, %%eax\n"
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"je 1f\n"
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"pushl %6\n"
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"call %7\n"
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"popl %%edx\n"
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"movl %%eax, %0\n"
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"jmp 2f\n"
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"1:\n"
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2005-11-28 22:19:04 +01:00
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"addl 12(%%edx), %%eax\n"
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2004-01-04 19:15:29 +01:00
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#if DATA_SIZE == 1
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"movzbl (%%eax), %0\n"
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#elif DATA_SIZE == 2
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"movzwl (%%eax), %0\n"
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#elif DATA_SIZE == 4
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"movl (%%eax), %0\n"
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#else
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#error unsupported size
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#endif
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"2:\n"
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: "=r" (res)
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: "r" (ptr),
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2005-11-28 22:19:04 +01:00
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"i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
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"i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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2004-01-04 19:15:29 +01:00
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"i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
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2005-11-28 22:19:04 +01:00
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"m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_read)),
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2004-01-04 19:15:29 +01:00
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"i" (CPU_MEM_INDEX),
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"m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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: "%eax", "%ecx", "%edx", "memory", "cc");
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return res;
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}
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#if DATA_SIZE <= 2
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2005-01-04 00:35:10 +01:00
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static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
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2004-01-04 19:15:29 +01:00
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{
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int res;
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asm volatile ("movl %1, %%edx\n"
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"movl %1, %%eax\n"
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"shrl %3, %%edx\n"
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"andl %4, %%eax\n"
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"andl %2, %%edx\n"
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"leal %5(%%edx, %%ebp), %%edx\n"
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"cmpl (%%edx), %%eax\n"
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"movl %1, %%eax\n"
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"je 1f\n"
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"pushl %6\n"
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"call %7\n"
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"popl %%edx\n"
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#if DATA_SIZE == 1
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"movsbl %%al, %0\n"
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#elif DATA_SIZE == 2
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"movswl %%ax, %0\n"
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#else
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#error unsupported size
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#endif
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"jmp 2f\n"
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"1:\n"
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2005-11-28 22:19:04 +01:00
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"addl 12(%%edx), %%eax\n"
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2004-01-04 19:15:29 +01:00
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#if DATA_SIZE == 1
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"movsbl (%%eax), %0\n"
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#elif DATA_SIZE == 2
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"movswl (%%eax), %0\n"
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#else
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#error unsupported size
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#endif
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"2:\n"
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: "=r" (res)
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: "r" (ptr),
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2005-11-28 22:19:04 +01:00
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"i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
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"i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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2004-01-04 19:15:29 +01:00
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"i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
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2005-11-28 22:19:04 +01:00
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"m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_read)),
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2004-01-04 19:15:29 +01:00
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"i" (CPU_MEM_INDEX),
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"m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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: "%eax", "%ecx", "%edx", "memory", "cc");
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return res;
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}
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#endif
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2005-01-04 00:35:10 +01:00
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static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
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2004-01-04 19:15:29 +01:00
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{
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asm volatile ("movl %0, %%edx\n"
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"movl %0, %%eax\n"
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"shrl %3, %%edx\n"
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"andl %4, %%eax\n"
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"andl %2, %%edx\n"
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"leal %5(%%edx, %%ebp), %%edx\n"
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"cmpl (%%edx), %%eax\n"
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"movl %0, %%eax\n"
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"je 1f\n"
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#if DATA_SIZE == 1
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"movzbl %b1, %%edx\n"
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#elif DATA_SIZE == 2
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"movzwl %w1, %%edx\n"
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#elif DATA_SIZE == 4
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"movl %1, %%edx\n"
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#else
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#error unsupported size
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#endif
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"pushl %6\n"
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"call %7\n"
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"popl %%eax\n"
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"jmp 2f\n"
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"1:\n"
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2005-11-28 22:19:04 +01:00
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"addl 8(%%edx), %%eax\n"
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2004-01-04 19:15:29 +01:00
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#if DATA_SIZE == 1
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"movb %b1, (%%eax)\n"
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#elif DATA_SIZE == 2
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"movw %w1, (%%eax)\n"
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#elif DATA_SIZE == 4
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"movl %1, (%%eax)\n"
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#else
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#error unsupported size
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#endif
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"2:\n"
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:
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: "r" (ptr),
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/* NOTE: 'q' would be needed as constraint, but we could not use it
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with T1 ! */
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"r" (v),
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2005-11-28 22:19:04 +01:00
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"i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
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"i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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2004-01-04 19:15:29 +01:00
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"i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
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2005-11-28 22:19:04 +01:00
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"m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_write)),
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2004-01-04 19:15:29 +01:00
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"i" (CPU_MEM_INDEX),
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"m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
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: "%eax", "%ecx", "%edx", "memory", "cc");
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}
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#else
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/* generic load/store macros */
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2005-01-04 00:35:10 +01:00
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static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
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2003-08-09 01:58:05 +02:00
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{
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int index;
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RES_TYPE res;
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2005-01-04 00:35:10 +01:00
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target_ulong addr;
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unsigned long physaddr;
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2003-10-27 22:22:23 +01:00
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int is_user;
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2005-01-04 00:35:10 +01:00
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addr = ptr;
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2003-08-09 01:58:05 +02:00
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index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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2003-10-27 22:22:23 +01:00
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is_user = CPU_MEM_INDEX;
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2005-11-28 22:19:04 +01:00
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if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
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2003-08-09 01:58:05 +02:00
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
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2003-10-27 22:22:23 +01:00
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res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
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2003-08-09 01:58:05 +02:00
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} else {
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2005-11-28 22:19:04 +01:00
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physaddr = addr + env->tlb_table[is_user][index].addend;
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2003-10-27 22:22:23 +01:00
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res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
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2003-08-09 01:58:05 +02:00
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}
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return res;
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}
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#if DATA_SIZE <= 2
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2005-01-04 00:35:10 +01:00
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static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
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2003-08-09 01:58:05 +02:00
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{
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int res, index;
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2005-01-04 00:35:10 +01:00
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target_ulong addr;
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unsigned long physaddr;
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2003-10-27 22:22:23 +01:00
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int is_user;
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2005-01-04 00:35:10 +01:00
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addr = ptr;
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2003-08-09 01:58:05 +02:00
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index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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2003-10-27 22:22:23 +01:00
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is_user = CPU_MEM_INDEX;
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2005-11-28 22:19:04 +01:00
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if (__builtin_expect(env->tlb_table[is_user][index].ADDR_READ !=
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2003-08-09 01:58:05 +02:00
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(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
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2003-10-27 22:22:23 +01:00
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res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, is_user);
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2003-08-09 01:58:05 +02:00
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} else {
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2005-11-28 22:19:04 +01:00
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physaddr = addr + env->tlb_table[is_user][index].addend;
|
2003-08-09 01:58:05 +02:00
|
|
|
res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
|
|
|
|
}
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2005-11-28 22:19:04 +01:00
|
|
|
#if ACCESS_TYPE != 3
|
|
|
|
|
2004-01-04 19:15:29 +01:00
|
|
|
/* generic store macro */
|
|
|
|
|
2005-01-04 00:35:10 +01:00
|
|
|
static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
|
2003-08-09 01:58:05 +02:00
|
|
|
{
|
|
|
|
int index;
|
2005-01-04 00:35:10 +01:00
|
|
|
target_ulong addr;
|
|
|
|
unsigned long physaddr;
|
2003-10-27 22:22:23 +01:00
|
|
|
int is_user;
|
|
|
|
|
2005-01-04 00:35:10 +01:00
|
|
|
addr = ptr;
|
2003-08-09 01:58:05 +02:00
|
|
|
index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
|
2003-10-27 22:22:23 +01:00
|
|
|
is_user = CPU_MEM_INDEX;
|
2005-11-28 22:19:04 +01:00
|
|
|
if (__builtin_expect(env->tlb_table[is_user][index].addr_write !=
|
2003-08-09 01:58:05 +02:00
|
|
|
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
|
2003-10-27 22:22:23 +01:00
|
|
|
glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, is_user);
|
2003-08-09 01:58:05 +02:00
|
|
|
} else {
|
2005-11-28 22:19:04 +01:00
|
|
|
physaddr = addr + env->tlb_table[is_user][index].addend;
|
2003-08-09 01:58:05 +02:00
|
|
|
glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-11-28 22:19:04 +01:00
|
|
|
#endif /* ACCESS_TYPE != 3 */
|
|
|
|
|
|
|
|
#endif /* !asm */
|
|
|
|
|
|
|
|
#if ACCESS_TYPE != 3
|
2004-01-04 19:15:29 +01:00
|
|
|
|
2004-01-05 00:56:24 +01:00
|
|
|
#if DATA_SIZE == 8
|
2005-11-06 20:56:23 +01:00
|
|
|
static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr)
|
2004-01-05 00:56:24 +01:00
|
|
|
{
|
|
|
|
union {
|
2005-11-06 20:56:23 +01:00
|
|
|
float64 d;
|
2004-01-05 00:56:24 +01:00
|
|
|
uint64_t i;
|
|
|
|
} u;
|
|
|
|
u.i = glue(ldq, MEMSUFFIX)(ptr);
|
|
|
|
return u.d;
|
|
|
|
}
|
|
|
|
|
2005-11-06 20:56:23 +01:00
|
|
|
static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v)
|
2004-01-05 00:56:24 +01:00
|
|
|
{
|
|
|
|
union {
|
2005-11-06 20:56:23 +01:00
|
|
|
float64 d;
|
2004-01-05 00:56:24 +01:00
|
|
|
uint64_t i;
|
|
|
|
} u;
|
|
|
|
u.d = v;
|
|
|
|
glue(stq, MEMSUFFIX)(ptr, u.i);
|
|
|
|
}
|
|
|
|
#endif /* DATA_SIZE == 8 */
|
|
|
|
|
|
|
|
#if DATA_SIZE == 4
|
2005-11-06 20:56:23 +01:00
|
|
|
static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr)
|
2004-01-05 00:56:24 +01:00
|
|
|
{
|
|
|
|
union {
|
2005-11-06 20:56:23 +01:00
|
|
|
float32 f;
|
2004-01-05 00:56:24 +01:00
|
|
|
uint32_t i;
|
|
|
|
} u;
|
|
|
|
u.i = glue(ldl, MEMSUFFIX)(ptr);
|
|
|
|
return u.f;
|
|
|
|
}
|
|
|
|
|
2005-11-06 20:56:23 +01:00
|
|
|
static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v)
|
2004-01-05 00:56:24 +01:00
|
|
|
{
|
|
|
|
union {
|
2005-11-06 20:56:23 +01:00
|
|
|
float32 f;
|
2004-01-05 00:56:24 +01:00
|
|
|
uint32_t i;
|
|
|
|
} u;
|
|
|
|
u.f = v;
|
|
|
|
glue(stl, MEMSUFFIX)(ptr, u.i);
|
|
|
|
}
|
|
|
|
#endif /* DATA_SIZE == 4 */
|
|
|
|
|
2005-11-28 22:19:04 +01:00
|
|
|
#endif /* ACCESS_TYPE != 3 */
|
|
|
|
|
2003-08-09 01:58:05 +02:00
|
|
|
#undef RES_TYPE
|
|
|
|
#undef DATA_TYPE
|
|
|
|
#undef DATA_STYPE
|
|
|
|
#undef SUFFIX
|
2003-10-27 22:22:23 +01:00
|
|
|
#undef USUFFIX
|
2003-08-09 01:58:05 +02:00
|
|
|
#undef DATA_SIZE
|
2003-10-27 22:22:23 +01:00
|
|
|
#undef CPU_MEM_INDEX
|
|
|
|
#undef MMUSUFFIX
|
2005-11-28 22:19:04 +01:00
|
|
|
#undef ADDR_READ
|