2017-10-01 22:11:45 +02:00
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/*
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* QEMU HPPA hardware system emulator.
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* Copyright 2018 Helge Deller <deller@gmx.de>
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "elf.h"
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#include "hw/loader.h"
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#include "hw/boards.h"
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#include "qemu/error-report.h"
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2019-08-12 07:23:38 +02:00
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#include "sysemu/reset.h"
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2017-10-01 22:11:45 +02:00
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#include "sysemu/sysemu.h"
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#include "hw/timer/mc146818rtc.h"
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#include "hw/ide.h"
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#include "hw/timer/i8254.h"
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#include "hw/char/serial.h"
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2018-05-03 21:50:25 +02:00
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#include "hppa_sys.h"
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2018-06-25 14:42:11 +02:00
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#include "qemu/units.h"
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2017-10-01 22:11:45 +02:00
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#include "qapi/error.h"
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2018-02-04 07:41:41 +01:00
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#include "qemu/log.h"
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2017-10-01 22:11:45 +02:00
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2017-10-08 22:47:27 +02:00
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#define MAX_IDE_BUS 2
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static ISABus *hppa_isa_bus(void)
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{
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ISABus *isa_bus;
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qemu_irq *isa_irqs;
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MemoryRegion *isa_region;
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isa_region = g_new(MemoryRegion, 1);
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memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
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NULL, "isa-io", 0x800);
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memory_region_add_subregion(get_system_memory(), IDE_HPA,
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isa_region);
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isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
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&error_abort);
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isa_irqs = i8259_init(isa_bus,
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/* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
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NULL);
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isa_bus_irqs(isa_bus, isa_irqs);
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return isa_bus;
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}
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static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
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{
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addr &= (0x10000000 - 1);
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return addr;
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}
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static HPPACPU *cpu[HPPA_MAX_CPUS];
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static uint64_t firmware_entry;
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2017-10-01 22:11:45 +02:00
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static void machine_hppa_init(MachineState *machine)
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{
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2017-10-08 22:47:27 +02:00
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *initrd_filename = machine->initrd_filename;
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2018-09-19 19:20:58 +02:00
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DeviceState *dev;
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2017-10-08 22:47:27 +02:00
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PCIBus *pci_bus;
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ISABus *isa_bus;
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qemu_irq rtc_irq, serial_irq;
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char *firmware_filename;
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uint64_t firmware_low, firmware_high;
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long size;
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uint64_t kernel_entry = 0, kernel_low, kernel_high;
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MemoryRegion *addr_space = get_system_memory();
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MemoryRegion *rom_region;
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MemoryRegion *ram_region;
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MemoryRegion *cpu_region;
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long i;
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2019-05-18 22:54:27 +02:00
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unsigned int smp_cpus = machine->smp.cpus;
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2017-10-08 22:47:27 +02:00
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ram_size = machine->ram_size;
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/* Create CPUs. */
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for (i = 0; i < smp_cpus; i++) {
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cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
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cpu_region = g_new(MemoryRegion, 1);
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memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
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cpu[i], g_strdup_printf("cpu%ld-io-eir", i), 4);
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memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
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cpu_region);
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}
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/* Limit main memory. */
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if (ram_size > FIRMWARE_START) {
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machine->ram_size = ram_size = FIRMWARE_START;
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}
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/* Main memory region. */
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ram_region = g_new(MemoryRegion, 1);
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memory_region_allocate_system_memory(ram_region, OBJECT(machine),
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"ram", ram_size);
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memory_region_add_subregion(addr_space, 0, ram_region);
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/* Init Dino (PCI host bus chip). */
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pci_bus = dino_init(addr_space, &rtc_irq, &serial_irq);
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assert(pci_bus);
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/* Create ISA bus. */
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isa_bus = hppa_isa_bus();
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assert(isa_bus);
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/* Realtime clock, used by firmware for PDC_TOD call. */
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mc146818_rtc_init(isa_bus, 2000, rtc_irq);
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/* Serial code setup. */
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2018-04-20 16:52:43 +02:00
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if (serial_hd(0)) {
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2017-10-08 22:47:27 +02:00
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uint32_t addr = DINO_UART_HPA + 0x800;
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serial_mm_init(addr_space, addr, 0, serial_irq,
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2018-04-20 16:52:43 +02:00
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115200, serial_hd(0), DEVICE_BIG_ENDIAN);
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2017-10-08 22:47:27 +02:00
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}
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/* SCSI disk setup. */
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2018-09-19 19:20:58 +02:00
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dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
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lsi53c8xx_handle_legacy_cmdline(dev);
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2017-10-08 22:47:27 +02:00
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/* Network setup. e1000 is good enough, failing Tulip support. */
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for (i = 0; i < nb_nics; i++) {
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pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
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}
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/* Load firmware. Given that this is not "real" firmware,
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but one explicitly written for the emulation, we might as
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well load it directly from an ELF image. */
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firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
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bios_name ? bios_name :
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"hppa-firmware.img");
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if (firmware_filename == NULL) {
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error_report("no firmware provided");
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exit(1);
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}
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2019-01-15 13:18:03 +01:00
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size = load_elf(firmware_filename, NULL, NULL, NULL,
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&firmware_entry, &firmware_low, &firmware_high,
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2017-10-08 22:47:27 +02:00
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true, EM_PARISC, 0, 0);
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/* Unfortunately, load_elf sign-extends reading elf32. */
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firmware_entry = (target_ureg)firmware_entry;
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firmware_low = (target_ureg)firmware_low;
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firmware_high = (target_ureg)firmware_high;
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if (size < 0) {
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error_report("could not load firmware '%s'", firmware_filename);
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exit(1);
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}
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2018-02-04 07:41:41 +01:00
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qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
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"-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
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firmware_low, firmware_high, firmware_entry);
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2017-10-08 22:47:27 +02:00
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if (firmware_low < ram_size || firmware_high >= FIRMWARE_END) {
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error_report("Firmware overlaps with memory or IO space");
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exit(1);
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}
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g_free(firmware_filename);
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rom_region = g_new(MemoryRegion, 1);
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memory_region_allocate_system_memory(rom_region, OBJECT(machine),
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"firmware",
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(FIRMWARE_END - FIRMWARE_START));
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memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
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/* Load kernel */
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if (kernel_filename) {
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2019-01-15 13:18:03 +01:00
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size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys,
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2017-10-08 22:47:27 +02:00
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NULL, &kernel_entry, &kernel_low, &kernel_high,
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true, EM_PARISC, 0, 0);
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/* Unfortunately, load_elf sign-extends reading elf32. */
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kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
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kernel_low = (target_ureg)kernel_low;
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kernel_high = (target_ureg)kernel_high;
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if (size < 0) {
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error_report("could not load kernel '%s'", kernel_filename);
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exit(1);
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}
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2018-02-04 07:41:41 +01:00
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qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
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"-0x%08" PRIx64 ", entry at 0x%08" PRIx64
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2018-06-25 14:42:11 +02:00
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", size %" PRIu64 " kB\n",
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kernel_low, kernel_high, kernel_entry, size / KiB);
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2017-10-08 22:47:27 +02:00
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if (kernel_cmdline) {
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cpu[0]->env.gr[24] = 0x4000;
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pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
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TARGET_PAGE_SIZE, kernel_cmdline);
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}
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if (initrd_filename) {
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ram_addr_t initrd_base;
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2018-09-13 12:07:13 +02:00
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int64_t initrd_size;
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2017-10-08 22:47:27 +02:00
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initrd_size = get_image_size(initrd_filename);
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if (initrd_size < 0) {
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error_report("could not load initial ram disk '%s'",
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initrd_filename);
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exit(1);
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}
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/* Load the initrd image high in memory.
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Mirror the algorithm used by palo:
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(1) Due to sign-extension problems and PDC,
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put the initrd no higher than 1G.
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(2) Reserve 64k for stack. */
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2018-06-25 14:42:11 +02:00
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initrd_base = MIN(ram_size, 1 * GiB);
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initrd_base = initrd_base - 64 * KiB;
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2017-10-08 22:47:27 +02:00
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initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
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if (initrd_base < kernel_high) {
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error_report("kernel and initial ram disk too large!");
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exit(1);
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}
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load_image_targphys(initrd_filename, initrd_base, initrd_size);
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cpu[0]->env.gr[23] = initrd_base;
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cpu[0]->env.gr[22] = initrd_base + initrd_size;
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}
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}
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if (!kernel_entry) {
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/* When booting via firmware, tell firmware if we want interactive
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* mode (kernel_entry=1), and to boot from CD (gr[24]='d')
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* or hard disc * (gr[24]='c').
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*/
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kernel_entry = boot_menu ? 1 : 0;
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cpu[0]->env.gr[24] = machine->boot_order[0];
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}
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/* We jump to the firmware entry routine and pass the
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* various parameters in registers. After firmware initialization,
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* firmware will start the Linux kernel with ramdisk and cmdline.
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*/
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cpu[0]->env.gr[26] = ram_size;
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cpu[0]->env.gr[25] = kernel_entry;
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/* tell firmware how many SMP CPUs to present in inventory table */
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cpu[0]->env.gr[21] = smp_cpus;
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2017-10-01 22:11:45 +02:00
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}
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2019-05-18 22:54:20 +02:00
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static void hppa_machine_reset(MachineState *ms)
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2017-10-08 22:47:27 +02:00
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{
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2019-05-18 22:54:27 +02:00
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unsigned int smp_cpus = ms->smp.cpus;
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2017-10-08 22:47:27 +02:00
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int i;
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qemu_devices_reset();
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/* Start all CPUs at the firmware entry point.
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* Monarch CPU will initialize firmware, secondary CPUs
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* will enter a small idle look and wait for rendevouz. */
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for (i = 0; i < smp_cpus; i++) {
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cpu_set_pc(CPU(cpu[i]), firmware_entry);
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cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
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}
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/* already initialized by machine_hppa_init()? */
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if (cpu[0]->env.gr[26] == ram_size) {
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return;
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}
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cpu[0]->env.gr[26] = ram_size;
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cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
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cpu[0]->env.gr[24] = 'c';
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/* gr22/gr23 unused, no initrd while reboot. */
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cpu[0]->env.gr[21] = smp_cpus;
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}
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2017-10-01 22:11:45 +02:00
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static void machine_hppa_machine_init(MachineClass *mc)
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{
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mc->desc = "HPPA generic machine";
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2017-10-08 22:47:27 +02:00
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mc->default_cpu_type = TYPE_HPPA_CPU;
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2017-10-01 22:11:45 +02:00
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mc->init = machine_hppa_init;
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2017-10-08 22:47:27 +02:00
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mc->reset = hppa_machine_reset;
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2017-10-01 22:11:45 +02:00
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mc->block_default_type = IF_SCSI;
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2017-10-08 22:47:27 +02:00
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mc->max_cpus = HPPA_MAX_CPUS;
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mc->default_cpus = 1;
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2017-10-01 22:11:45 +02:00
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mc->is_default = 1;
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2018-06-25 14:41:57 +02:00
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mc->default_ram_size = 512 * MiB;
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2017-10-01 22:11:45 +02:00
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mc->default_boot_order = "cd";
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}
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DEFINE_MACHINE("hppa", machine_hppa_machine_init)
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