2021-07-27 19:48:55 +02:00
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/*
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* Routines common to user and system emulation of load/store.
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
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return cpu_ldb_mmu(env, addr, oi, ra);
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}
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int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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return (int8_t)cpu_ldub_mmuidx_ra(env, addr, mmu_idx, ra);
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}
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uint32_t cpu_lduw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
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return cpu_ldw_be_mmu(env, addr, oi, ra);
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}
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int cpu_ldsw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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return (int16_t)cpu_lduw_be_mmuidx_ra(env, addr, mmu_idx, ra);
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}
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uint32_t cpu_ldl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
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return cpu_ldl_be_mmu(env, addr, oi, ra);
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}
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uint64_t cpu_ldq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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2022-01-06 22:00:51 +01:00
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MemOpIdx oi = make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx);
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2021-07-27 19:48:55 +02:00
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return cpu_ldq_be_mmu(env, addr, oi, ra);
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}
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uint32_t cpu_lduw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
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return cpu_ldw_le_mmu(env, addr, oi, ra);
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}
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int cpu_ldsw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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return (int16_t)cpu_lduw_le_mmuidx_ra(env, addr, mmu_idx, ra);
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}
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uint32_t cpu_ldl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
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return cpu_ldl_le_mmu(env, addr, oi, ra);
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}
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uint64_t cpu_ldq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr,
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int mmu_idx, uintptr_t ra)
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{
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2022-01-06 22:00:51 +01:00
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MemOpIdx oi = make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx);
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2021-07-27 19:48:55 +02:00
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return cpu_ldq_le_mmu(env, addr, oi, ra);
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}
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void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_UB, mmu_idx);
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cpu_stb_mmu(env, addr, val, oi, ra);
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}
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void cpu_stw_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEUW | MO_UNALN, mmu_idx);
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cpu_stw_be_mmu(env, addr, val, oi, ra);
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}
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void cpu_stl_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_BEUL | MO_UNALN, mmu_idx);
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cpu_stl_be_mmu(env, addr, val, oi, ra);
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}
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void cpu_stq_be_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
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int mmu_idx, uintptr_t ra)
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{
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2022-01-06 22:00:51 +01:00
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MemOpIdx oi = make_memop_idx(MO_BEUQ | MO_UNALN, mmu_idx);
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2021-07-27 19:48:55 +02:00
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cpu_stq_be_mmu(env, addr, val, oi, ra);
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}
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void cpu_stw_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEUW | MO_UNALN, mmu_idx);
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cpu_stw_le_mmu(env, addr, val, oi, ra);
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}
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void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val,
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int mmu_idx, uintptr_t ra)
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{
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MemOpIdx oi = make_memop_idx(MO_LEUL | MO_UNALN, mmu_idx);
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cpu_stl_le_mmu(env, addr, val, oi, ra);
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}
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void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val,
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int mmu_idx, uintptr_t ra)
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{
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2022-01-06 22:00:51 +01:00
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MemOpIdx oi = make_memop_idx(MO_LEUQ | MO_UNALN, mmu_idx);
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2021-07-27 19:48:55 +02:00
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cpu_stq_le_mmu(env, addr, val, oi, ra);
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}
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/*--------------------------*/
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uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldub_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return (int8_t)cpu_ldub_data_ra(env, addr, ra);
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}
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uint32_t cpu_lduw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_lduw_be_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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int cpu_ldsw_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return (int16_t)cpu_lduw_be_data_ra(env, addr, ra);
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}
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uint32_t cpu_ldl_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldl_be_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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uint64_t cpu_ldq_be_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldq_be_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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uint32_t cpu_lduw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_lduw_le_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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int cpu_ldsw_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return (int16_t)cpu_lduw_le_data_ra(env, addr, ra);
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}
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uint32_t cpu_ldl_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldl_le_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr addr, uintptr_t ra)
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{
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return cpu_ldq_le_mmuidx_ra(env, addr, cpu_mmu_index(env, false), ra);
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}
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void cpu_stb_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stb_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stw_be_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stw_be_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stl_be_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stl_be_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stq_be_data_ra(CPUArchState *env, abi_ptr addr,
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uint64_t val, uintptr_t ra)
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{
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cpu_stq_be_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stw_le_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stw_le_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stl_le_data_ra(CPUArchState *env, abi_ptr addr,
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uint32_t val, uintptr_t ra)
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{
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cpu_stl_le_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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void cpu_stq_le_data_ra(CPUArchState *env, abi_ptr addr,
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uint64_t val, uintptr_t ra)
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{
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cpu_stq_le_mmuidx_ra(env, addr, val, cpu_mmu_index(env, false), ra);
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}
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/*--------------------------*/
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uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldub_data_ra(env, addr, 0);
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}
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int cpu_ldsb_data(CPUArchState *env, abi_ptr addr)
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{
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return (int8_t)cpu_ldub_data(env, addr);
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}
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uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_lduw_be_data_ra(env, addr, 0);
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}
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int cpu_ldsw_be_data(CPUArchState *env, abi_ptr addr)
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{
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return (int16_t)cpu_lduw_be_data(env, addr);
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}
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uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldl_be_data_ra(env, addr, 0);
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}
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uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldq_be_data_ra(env, addr, 0);
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}
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uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_lduw_le_data_ra(env, addr, 0);
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}
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int cpu_ldsw_le_data(CPUArchState *env, abi_ptr addr)
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{
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return (int16_t)cpu_lduw_le_data(env, addr);
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}
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uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldl_le_data_ra(env, addr, 0);
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}
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uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr addr)
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{
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return cpu_ldq_le_data_ra(env, addr, 0);
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}
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void cpu_stb_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stb_data_ra(env, addr, val, 0);
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}
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void cpu_stw_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stw_be_data_ra(env, addr, val, 0);
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}
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void cpu_stl_be_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stl_be_data_ra(env, addr, val, 0);
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}
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void cpu_stq_be_data(CPUArchState *env, abi_ptr addr, uint64_t val)
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{
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cpu_stq_be_data_ra(env, addr, val, 0);
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}
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void cpu_stw_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stw_le_data_ra(env, addr, val, 0);
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}
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void cpu_stl_le_data(CPUArchState *env, abi_ptr addr, uint32_t val)
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{
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cpu_stl_le_data_ra(env, addr, val, 0);
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}
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void cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
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{
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cpu_stq_le_data_ra(env, addr, val, 0);
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}
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