38 lines
958 B
C
38 lines
958 B
C
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/*
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* RISC-V specific proc functions for linux-user
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef RISCV_TARGET_PROC_H
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#define RISCV_TARGET_PROC_H
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static int open_cpuinfo(CPUArchState *cpu_env, int fd)
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{
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int i;
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int num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
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RISCVCPU *cpu = env_archcpu(cpu_env);
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const RISCVCPUConfig *cfg = riscv_cpu_cfg((CPURISCVState *) cpu_env);
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char *isa_string = riscv_isa_string(cpu);
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const char *mmu;
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if (cfg->mmu) {
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mmu = (cpu_env->xl == MXL_RV32) ? "sv32" : "sv48";
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} else {
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mmu = "none";
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}
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for (i = 0; i < num_cpus; i++) {
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dprintf(fd, "processor\t: %d\n", i);
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dprintf(fd, "hart\t\t: %d\n", i);
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dprintf(fd, "isa\t\t: %s\n", isa_string);
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dprintf(fd, "mmu\t\t: %s\n", mmu);
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dprintf(fd, "uarch\t\t: qemu\n\n");
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}
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g_free(isa_string);
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return 0;
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}
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#define HAVE_ARCH_PROC_CPUINFO
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#endif /* RISCV_TARGET_PROC_H */
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