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target/ppc: Implement vpdepd/vpextd instruction

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pdepd and pextd helpers are moved out of #ifdef (TARGET_PPC64) to allow
them to be reused as GVecGen3.fni8.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-4-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Matheus Ferst 2021-11-04 09:36:57 -03:00 committed by David Gibson
parent a2c975e119
commit 00a16569eb
4 changed files with 35 additions and 3 deletions
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2
target/ppc/helper.h
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@ -47,9 +47,9 @@ DEF_HELPER_FLAGS_1(popcntb, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl)
DEF_HELPER_3(sraw, tl, env, tl, tl)
DEF_HELPER_FLAGS_2(CFUGED, TCG_CALL_NO_RWG_SE, i64, i64, i64)
#if defined(TARGET_PPC64)
DEF_HELPER_FLAGS_2(PDEPD, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(PEXTD, TCG_CALL_NO_RWG_SE, i64, i64, i64)
#if defined(TARGET_PPC64)
DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl)
DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_2(bpermd, TCG_CALL_NO_RWG_SE, i64, i64, i64)

2
target/ppc/insn32.decode
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@ -336,3 +336,5 @@ DSCRIQ 111111 ..... ..... ...... 001100010 . @Z22_tap_sh_rc
VCFUGED 000100 ..... ..... ..... 10101001101 @VX
VCLZDM 000100 ..... ..... ..... 11110000100 @VX
VCTZDM 000100 ..... ..... ..... 11111000100 @VX
VPDEPD 000100 ..... ..... ..... 10111001101 @VX
VPEXTD 000100 ..... ..... ..... 10110001101 @VX

2
target/ppc/int_helper.c
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@ -386,7 +386,6 @@ uint64_t helper_CFUGED(uint64_t src, uint64_t mask)
return left | (right >> n);
}
#if defined(TARGET_PPC64)
uint64_t helper_PDEPD(uint64_t src, uint64_t mask)
{
int i, o;
@ -422,7 +421,6 @@ uint64_t helper_PEXTD(uint64_t src, uint64_t mask)
return result;
}
#endif
/*****************************************************************************/
/* PowerPC 601 specific instructions (POWER bridge) */

32
target/ppc/translate/vmx-impl.c.inc
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@ -1607,6 +1607,38 @@ static bool trans_VCTZDM(DisasContext *ctx, arg_VX *a)
return true;
}
static bool trans_VPDEPD(DisasContext *ctx, arg_VX *a)
{
static const GVecGen3 g = {
.fni8 = gen_helper_PDEPD,
.vece = MO_64,
};
REQUIRE_INSNS_FLAGS2(ctx, ISA310);
REQUIRE_VECTOR(ctx);
tcg_gen_gvec_3(avr_full_offset(a->vrt), avr_full_offset(a->vra),
avr_full_offset(a->vrb), 16, 16, &g);
return true;
}
static bool trans_VPEXTD(DisasContext *ctx, arg_VX *a)
{
static const GVecGen3 g = {
.fni8 = gen_helper_PEXTD,
.vece = MO_64,
};
REQUIRE_INSNS_FLAGS2(ctx, ISA310);
REQUIRE_VECTOR(ctx);
tcg_gen_gvec_3(avr_full_offset(a->vrt), avr_full_offset(a->vra),
avr_full_offset(a->vrb), 16, 16, &g);
return true;
}
#undef GEN_VR_LDX
#undef GEN_VR_STX
#undef GEN_VR_LVE