more generic TLB support - began to fix unlikely interrupt issues
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@492 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -77,7 +77,7 @@ int cpu_restore_state(struct TranslationBlock *tb,
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CPUState *env, unsigned long searched_pc);
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void cpu_exec_init(void);
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int page_unprotect(unsigned long address);
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void page_unmap(void);
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void tb_invalidate_page(unsigned long address);
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void tlb_flush_page(CPUState *env, uint32_t addr);
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void tlb_flush_page_write(CPUState *env, uint32_t addr);
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void tlb_flush(CPUState *env);
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@ -127,7 +127,7 @@ static inline unsigned int tb_hash_func(unsigned long pc)
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}
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TranslationBlock *tb_alloc(unsigned long pc);
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void tb_flush(void);
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void tb_flush(CPUState *env);
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void tb_link(TranslationBlock *tb);
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extern TranslationBlock *tb_hash[CODE_GEN_HASH_SIZE];
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68
exec.c
68
exec.c
@ -62,7 +62,6 @@ typedef struct PageDesc {
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#define L1_SIZE (1 << L1_BITS)
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#define L2_SIZE (1 << L2_BITS)
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static void tb_invalidate_page(unsigned long address);
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static void io_mem_init(void);
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unsigned long real_host_page_size;
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@ -229,15 +228,19 @@ static void page_flush_tb(void)
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/* flush all the translation blocks */
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/* XXX: tb_flush is currently not thread safe */
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void tb_flush(void)
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void tb_flush(CPUState *env)
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{
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int i;
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#ifdef DEBUG_FLUSH
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#if defined(DEBUG_FLUSH)
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printf("qemu: flush code_size=%d nb_tbs=%d avg_tb_size=%d\n",
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code_gen_ptr - code_gen_buffer,
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nb_tbs,
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(code_gen_ptr - code_gen_buffer) / nb_tbs);
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nb_tbs > 0 ? (code_gen_ptr - code_gen_buffer) / nb_tbs : 0);
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#endif
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/* must reset current TB so that interrupts cannot modify the
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links while we are modifying them */
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env->current_tb = NULL;
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nb_tbs = 0;
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for(i = 0;i < CODE_GEN_HASH_SIZE; i++)
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tb_hash[i] = NULL;
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@ -402,7 +405,7 @@ static inline void tb_invalidate(TranslationBlock *tb, int parity)
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}
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/* invalidate all TBs which intersect with the target page starting at addr */
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static void tb_invalidate_page(unsigned long address)
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void tb_invalidate_page(unsigned long address)
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{
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TranslationBlock *tb_next, *tb;
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unsigned int page_index;
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@ -626,7 +629,7 @@ static inline void tb_reset_jump_recursive2(TranslationBlock *tb, int n)
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/* suppress the jump to next tb in generated code */
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tb_reset_jump(tb, n);
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/* suppress jumps in the tb on which we could have jump */
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/* suppress jumps in the tb on which we could have jumped */
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tb_reset_jump_recursive(tb_next);
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}
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}
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@ -688,7 +691,7 @@ void cpu_single_step(CPUState *env, int enabled)
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if (env->singlestep_enabled != enabled) {
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env->singlestep_enabled = enabled;
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/* must flush all the translated code to avoid inconsistancies */
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tb_flush();
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tb_flush(env);
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}
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#endif
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}
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@ -712,7 +715,7 @@ void cpu_set_log_filename(const char *filename)
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logfilename = strdup(filename);
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}
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/* mask must never be zero */
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/* mask must never be zero, except for A20 change call */
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void cpu_interrupt(CPUState *env, int mask)
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{
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TranslationBlock *tb;
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@ -742,9 +745,10 @@ void cpu_abort(CPUState *env, const char *fmt, ...)
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abort();
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}
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#ifdef TARGET_I386
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#if !defined(CONFIG_USER_ONLY)
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/* unmap all maped pages and flush all associated code */
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void page_unmap(void)
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static void page_unmap(CPUState *env)
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{
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PageDesc *pmap;
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int i;
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@ -784,21 +788,25 @@ void page_unmap(void)
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l1_map[i] = NULL;
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}
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}
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tb_flush();
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tb_flush(env);
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}
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#endif
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void tlb_flush(CPUState *env)
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{
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#if !defined(CONFIG_USER_ONLY)
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int i;
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/* must reset current TB so that interrupts cannot modify the
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links while we are modifying them */
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env->current_tb = NULL;
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for(i = 0; i < CPU_TLB_SIZE; i++) {
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env->tlb_read[0][i].address = -1;
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env->tlb_write[0][i].address = -1;
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env->tlb_read[1][i].address = -1;
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env->tlb_write[1][i].address = -1;
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}
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#endif
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/* XXX: avoid flushing the TBs */
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page_unmap(env);
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}
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static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, uint32_t addr)
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@ -810,8 +818,11 @@ static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, uint32_t addr)
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void tlb_flush_page(CPUState *env, uint32_t addr)
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{
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#if !defined(CONFIG_USER_ONLY)
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int i;
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int i, flags;
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/* must reset current TB so that interrupts cannot modify the
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links while we are modifying them */
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env->current_tb = NULL;
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addr &= TARGET_PAGE_MASK;
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i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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@ -819,23 +830,44 @@ void tlb_flush_page(CPUState *env, uint32_t addr)
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tlb_flush_entry(&env->tlb_write[0][i], addr);
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tlb_flush_entry(&env->tlb_read[1][i], addr);
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tlb_flush_entry(&env->tlb_write[1][i], addr);
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flags = page_get_flags(addr);
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if (flags & PAGE_VALID) {
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#if !defined(CONFIG_SOFTMMU)
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munmap((void *)addr, TARGET_PAGE_SIZE);
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#endif
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page_set_flags(addr, addr + TARGET_PAGE_SIZE, 0);
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}
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}
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/* make all write to page 'addr' trigger a TLB exception to detect
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self modifying code */
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void tlb_flush_page_write(CPUState *env, uint32_t addr)
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{
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#if !defined(CONFIG_USER_ONLY)
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int i;
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addr &= TARGET_PAGE_MASK;
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i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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tlb_flush_entry(&env->tlb_write[0][i], addr);
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tlb_flush_entry(&env->tlb_write[1][i], addr);
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#endif
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}
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#else
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void tlb_flush(CPUState *env)
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{
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}
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void tlb_flush_page(CPUState *env, uint32_t addr)
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{
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}
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void tlb_flush_page_write(CPUState *env, uint32_t addr)
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{
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}
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#endif /* defined(CONFIG_USER_ONLY) */
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static inline unsigned long *physpage_find_alloc(unsigned int page)
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{
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unsigned long **lp, *p;
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