PC Chipset: Improve serial divisor calculation
This fixes several problems I found in the UART serial implementation. Now all divisor values are allowed, while before divisor values of zero and below the base baud rate were rejected. All changes are in reference to http://www.sci.muni.cz/docs/pc/serport.txt Signed-off-by: Calvin Lee <cyrus296@gmail.com> Message-Id: <20180512000545.966-2-cyrus296@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -150,13 +150,10 @@ static void serial_update_irq(SerialState *s)
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static void serial_update_parameters(SerialState *s)
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{
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int speed, parity, data_bits, stop_bits, frame_size;
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float speed;
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int parity, data_bits, stop_bits, frame_size;
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QEMUSerialSetParams ssp;
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if (s->divider == 0 || s->divider > s->baudbase) {
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return;
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}
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/* Start bit. */
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frame_size = 1;
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if (s->lcr & 0x08) {
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@ -169,14 +166,16 @@ static void serial_update_parameters(SerialState *s)
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} else {
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parity = 'N';
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}
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if (s->lcr & 0x04)
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if (s->lcr & 0x04) {
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stop_bits = 2;
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else
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} else {
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stop_bits = 1;
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}
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data_bits = (s->lcr & 0x03) + 5;
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frame_size += data_bits + stop_bits;
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speed = s->baudbase / s->divider;
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/* Zero divisor should give about 3500 baud */
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speed = (s->divider == 0) ? 3500 : (float) s->baudbase / s->divider;
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ssp.speed = speed;
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ssp.parity = parity;
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ssp.data_bits = data_bits;
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@ -184,7 +183,7 @@ static void serial_update_parameters(SerialState *s)
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s->char_transmit_time = (NANOSECONDS_PER_SECOND / speed) * frame_size;
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qemu_chr_fe_ioctl(&s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
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DPRINTF("speed=%d parity=%c data=%d stop=%d\n",
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DPRINTF("speed=%.2f parity=%c data=%d stop=%d\n",
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speed, parity, data_bits, stop_bits);
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}
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@ -341,7 +340,11 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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default:
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case 0:
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if (s->lcr & UART_LCR_DLAB) {
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s->divider = (s->divider & 0xff00) | val;
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if (size == 2) {
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s->divider = (s->divider & 0xff00) | val;
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} else if (size == 4) {
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s->divider = val;
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}
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serial_update_parameters(s);
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} else {
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s->thr = (uint8_t) val;
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