pci/bridge: fix pci_bridge_reset()
The lower bits of base/limit registers is RO and shouldn't be zero cleared on reset. This patch fixes it. In fact, the default value of base/limit registers aren't specified in the spec. And some bridges disable forwarding on reset instead of zeroing base/limit registers. So introduce one function to disable bridge forwarding so that such bridges can use it. It will be used later. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -151,6 +151,26 @@ void pci_bridge_write_config(PCIDevice *d,
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}
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}
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void pci_bridge_disable_base_limit(PCIDevice *dev)
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{
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uint8_t *conf = dev->config;
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pci_byte_test_and_set_mask(conf + PCI_IO_BASE,
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PCI_IO_RANGE_MASK & 0xff);
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pci_byte_test_and_clear_mask(conf + PCI_IO_LIMIT,
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PCI_IO_RANGE_MASK & 0xff);
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pci_word_test_and_set_mask(conf + PCI_MEMORY_BASE,
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PCI_MEMORY_RANGE_MASK & 0xffff);
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pci_word_test_and_clear_mask(conf + PCI_MEMORY_LIMIT,
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PCI_MEMORY_RANGE_MASK & 0xffff);
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pci_word_test_and_set_mask(conf + PCI_PREF_MEMORY_BASE,
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PCI_PREF_RANGE_MASK & 0xffff);
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pci_word_test_and_clear_mask(conf + PCI_PREF_MEMORY_LIMIT,
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PCI_PREF_RANGE_MASK & 0xffff);
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pci_set_word(conf + PCI_PREF_BASE_UPPER32, 0);
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pci_set_word(conf + PCI_PREF_LIMIT_UPPER32, 0);
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}
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/* reset bridge specific configuration registers */
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void pci_bridge_reset_reg(PCIDevice *dev)
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{
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@ -161,12 +181,28 @@ void pci_bridge_reset_reg(PCIDevice *dev)
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conf[PCI_SUBORDINATE_BUS] = 0;
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conf[PCI_SEC_LATENCY_TIMER] = 0;
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conf[PCI_IO_BASE] = 0;
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conf[PCI_IO_LIMIT] = 0;
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pci_set_word(conf + PCI_MEMORY_BASE, 0);
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pci_set_word(conf + PCI_MEMORY_LIMIT, 0);
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pci_set_word(conf + PCI_PREF_MEMORY_BASE, 0);
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pci_set_word(conf + PCI_PREF_MEMORY_LIMIT, 0);
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/*
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* the default values for base/limit registers aren't specified
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* in the PCI-to-PCI-bridge spec. So we don't thouch them here.
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* Each implementation can override it.
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* typical implementation does
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* zero base/limit registers or
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* disable forwarding: pci_bridge_disable_base_limit()
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* If disable forwarding is wanted, call pci_bridge_disable_base_limit()
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* after this function.
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*/
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pci_byte_test_and_clear_mask(conf + PCI_IO_BASE,
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PCI_IO_RANGE_MASK & 0xff);
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pci_byte_test_and_clear_mask(conf + PCI_IO_LIMIT,
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PCI_IO_RANGE_MASK & 0xff);
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pci_word_test_and_clear_mask(conf + PCI_MEMORY_BASE,
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PCI_MEMORY_RANGE_MASK & 0xffff);
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pci_word_test_and_clear_mask(conf + PCI_MEMORY_LIMIT,
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PCI_MEMORY_RANGE_MASK & 0xffff);
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pci_word_test_and_clear_mask(conf + PCI_PREF_MEMORY_BASE,
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PCI_PREF_RANGE_MASK & 0xffff);
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pci_word_test_and_clear_mask(conf + PCI_PREF_MEMORY_LIMIT,
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PCI_PREF_RANGE_MASK & 0xffff);
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pci_set_word(conf + PCI_PREF_BASE_UPPER32, 0);
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pci_set_word(conf + PCI_PREF_LIMIT_UPPER32, 0);
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@ -39,6 +39,7 @@ pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type);
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void pci_bridge_write_config(PCIDevice *d,
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uint32_t address, uint32_t val, int len);
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void pci_bridge_disable_base_limit(PCIDevice *dev);
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void pci_bridge_reset_reg(PCIDevice *dev);
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void pci_bridge_reset(DeviceState *qdev);
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