tcg-ppc64: Implement movcond
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -1321,6 +1321,54 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond,
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tcg_out_bc(s, tcg_to_bc[cond], label_index);
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}
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static void tcg_out_movcond(TCGContext *s, TCGType type, TCGCond cond,
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TCGArg dest, TCGArg c1, TCGArg c2, TCGArg v1,
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TCGArg v2, bool const_c2)
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{
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/* If for some reason both inputs are zero, don't produce bad code. */
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if (v1 == 0 && v2 == 0) {
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tcg_out_movi(s, type, dest, 0);
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return;
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}
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tcg_out_cmp(s, cond, c1, c2, const_c2, 7, type);
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if (HAVE_ISEL) {
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int isel = tcg_to_isel[cond];
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/* Swap the V operands if the operation indicates inversion. */
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if (isel & 1) {
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int t = v1;
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v1 = v2;
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v2 = t;
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isel &= ~1;
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}
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/* V1 == 0 is handled by isel; V2 == 0 must be handled by hand. */
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if (v2 == 0) {
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tcg_out_movi(s, type, 0, 0);
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}
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tcg_out32(s, isel | TAB(dest, v1, v2));
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} else {
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if (dest == v2) {
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cond = tcg_invert_cond(cond);
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v2 = v1;
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} else if (dest != v1) {
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if (v1 == 0) {
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tcg_out_movi(s, type, dest, 0);
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} else {
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tcg_out_mov(s, type, dest, v1);
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}
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}
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/* Branch forward over one insn */
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tcg_out32(s, tcg_to_bc[cond] | 8);
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if (v2 == 0) {
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tcg_out_movi(s, type, dest, 0);
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} else {
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tcg_out_mov(s, type, dest, v2);
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}
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}
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}
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void ppc_tb_set_jmp_target (unsigned long jmp_addr, unsigned long addr)
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{
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TCGContext s;
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@ -1871,6 +1919,15 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args,
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64 - args[3] - args[4]);
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break;
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case INDEX_op_movcond_i32:
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tcg_out_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1], args[2],
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args[3], args[4], const_args[2]);
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break;
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case INDEX_op_movcond_i64:
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tcg_out_movcond(s, TCG_TYPE_I64, args[5], args[0], args[1], args[2],
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args[3], args[4], const_args[2]);
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break;
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default:
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tcg_dump_ops (s);
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tcg_abort ();
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@ -1985,6 +2042,8 @@ static const TCGTargetOpDef ppc_op_defs[] = {
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{ INDEX_op_setcond_i32, { "r", "r", "ri" } },
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{ INDEX_op_setcond_i64, { "r", "r", "ri" } },
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{ INDEX_op_movcond_i32, { "r", "r", "ri", "rZ", "rZ" } },
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{ INDEX_op_movcond_i64, { "r", "r", "ri", "rZ", "rZ" } },
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{ INDEX_op_bswap16_i32, { "r", "r" } },
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{ INDEX_op_bswap16_i64, { "r", "r" } },
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@ -89,7 +89,7 @@ typedef enum {
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#define TCG_TARGET_HAS_nand_i32 1
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#define TCG_TARGET_HAS_nor_i32 1
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#define TCG_TARGET_HAS_deposit_i32 1
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#define TCG_TARGET_HAS_movcond_i32 0
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#define TCG_TARGET_HAS_movcond_i32 1
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#define TCG_TARGET_HAS_add2_i32 0
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#define TCG_TARGET_HAS_sub2_i32 0
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#define TCG_TARGET_HAS_mulu2_i32 0
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@ -111,7 +111,7 @@ typedef enum {
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#define TCG_TARGET_HAS_nand_i64 1
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#define TCG_TARGET_HAS_nor_i64 1
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#define TCG_TARGET_HAS_deposit_i64 1
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#define TCG_TARGET_HAS_movcond_i64 0
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#define TCG_TARGET_HAS_movcond_i64 1
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#define TCG_TARGET_HAS_add2_i64 0
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#define TCG_TARGET_HAS_sub2_i64 0
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#define TCG_TARGET_HAS_mulu2_i64 0
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