Convert SD cards code to use qemu_irq too.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3671 c046a42c-6fe2-441c-8c8c-71466251a162
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38641a52f2
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@ -25,7 +25,6 @@ struct omap_mmc_s {
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target_phys_addr_t base;
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qemu_irq irq;
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qemu_irq *dma;
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qemu_irq handler[2];
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omap_clk clk;
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SDState *card;
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uint16_t last_cmd;
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@ -507,22 +506,6 @@ void omap_mmc_reset(struct omap_mmc_s *host)
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host->transfer = 0;
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}
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static void omap_mmc_ro_cb(void *opaque, int level)
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{
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struct omap_mmc_s *s = (struct omap_mmc_s *) opaque;
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if (s->handler[0])
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qemu_set_irq(s->handler[0], level);
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}
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static void omap_mmc_cover_cb(void *opaque, int level)
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{
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struct omap_mmc_s *s = (struct omap_mmc_s *) opaque;
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if (s->handler[1])
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qemu_set_irq(s->handler[1], level);
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}
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struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base,
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qemu_irq irq, qemu_irq dma[], omap_clk clk)
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{
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@ -542,13 +525,10 @@ struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base,
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/* Instantiate the storage */
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s->card = sd_init(sd_bdrv);
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sd_set_cb(s->card, s, omap_mmc_ro_cb, omap_mmc_cover_cb);
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return s;
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}
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void omap_mmc_handlers(struct omap_mmc_s *s, qemu_irq ro, qemu_irq cover)
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{
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s->handler[0] = ro;
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s->handler[1] = cover;
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sd_set_cb(s->card, ro, cover);
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}
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5
hw/pxa.h
5
hw/pxa.h
@ -96,9 +96,8 @@ void pxa2xx_lcdc_oritentation(void *opaque, int angle);
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struct pxa2xx_mmci_s;
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struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base,
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qemu_irq irq, void *dma);
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void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, void *opaque,
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void (*readonly_cb)(void *, int),
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void (*coverswitch_cb)(void *, int));
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void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, qemu_irq readonly,
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qemu_irq coverswitch);
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/* pxa2xx_pcmcia.c */
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struct pxa2xx_pcmcia_s;
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@ -545,9 +545,8 @@ struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base,
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return s;
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}
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void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, void *opaque,
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void (*readonly_cb)(void *, int),
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void (*coverswitch_cb)(void *, int))
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void pxa2xx_mmci_handlers(struct pxa2xx_mmci_s *s, qemu_irq readonly,
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qemu_irq coverswitch)
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{
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sd_set_cb(s->card, opaque, readonly_cb, coverswitch_cb);
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sd_set_cb(s->card, read, coverswitch);
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}
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30
hw/sd.c
30
hw/sd.c
@ -90,9 +90,8 @@ struct SDState {
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uint32_t data_start;
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uint32_t data_offset;
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uint8_t data[512];
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void (*readonly_cb)(void *, int);
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void (*inserted_cb)(void *, int);
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void *opaque;
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qemu_irq readonly_cb;
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qemu_irq inserted_cb;
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BlockDriverState *bdrv;
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};
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@ -372,6 +371,8 @@ static void sd_reset(SDState *sd, BlockDriverState *bdrv)
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sd->bdrv = bdrv;
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if (s->wp_groups)
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qemu_free(s->wp_groups);
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sd->wp_switch = bdrv_is_read_only(bdrv);
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sd->wp_groups = (int *) qemu_mallocz(sizeof(int) * sect);
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memset(sd->wp_groups, 0, sizeof(int) * sect);
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@ -386,12 +387,10 @@ static void sd_reset(SDState *sd, BlockDriverState *bdrv)
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static void sd_cardchange(void *opaque)
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{
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SDState *sd = opaque;
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if (sd->inserted_cb)
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sd->inserted_cb(sd->opaque, bdrv_is_inserted(sd->bdrv));
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qemu_set_irq(sd->inserted_cb, bdrv_is_inserted(sd->bdrv));
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if (bdrv_is_inserted(sd->bdrv)) {
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sd_reset(sd, sd->bdrv);
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if (sd->readonly_cb)
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sd->readonly_cb(sd->opaque, sd->wp_switch);
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qemu_set_irq(s->readonly_cb, sd->wp_switch);
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}
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}
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@ -401,21 +400,16 @@ SDState *sd_init(BlockDriverState *bs)
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sd = (SDState *) qemu_mallocz(sizeof(SDState));
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sd_reset(sd, bs);
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bdrv_set_change_cb(sd->bdrv, sd_cardchange, sd);
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return sd;
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}
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void sd_set_cb(SDState *sd, void *opaque,
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void (*readonly_cb)(void *, int),
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void (*inserted_cb)(void *, int))
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void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert)
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{
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sd->opaque = opaque;
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sd->readonly_cb = readonly_cb;
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sd->inserted_cb = inserted_cb;
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if (sd->readonly_cb)
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sd->readonly_cb(sd->opaque, bdrv_is_read_only(sd->bdrv));
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if (sd->inserted_cb)
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sd->inserted_cb(sd->opaque, bdrv_is_inserted(sd->bdrv));
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bdrv_set_change_cb(sd->bdrv, sd_cardchange, sd);
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sd->readonly_cb = readonly;
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sd->inserted_cb = insert;
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qemu_set_irq(readonly, bdrv_is_read_only(sd->bdrv));
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qemu_set_irq(insert, bdrv_is_inserted(sd->bdrv));
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}
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static void sd_erase(SDState *sd)
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4
hw/sd.h
4
hw/sd.h
@ -74,9 +74,7 @@ int sd_do_command(SDState *sd, struct sd_request_s *req,
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uint8_t *response);
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void sd_write_data(SDState *sd, uint8_t value);
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uint8_t sd_read_data(SDState *sd);
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void sd_set_cb(SDState *sd, void *opaque,
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void (*readonly_cb)(void *, int),
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void (*inserted_cb)(void *, int));
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void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert);
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int sd_data_ready(SDState *sd);
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#endif /* __hw_sd_h */
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17
hw/spitz.c
17
hw/spitz.c
@ -1069,18 +1069,6 @@ static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
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spitz_hsync ^= 1;
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}
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static void spitz_mmc_coverswitch_change(void *opaque, int in)
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{
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struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
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qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT], in);
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}
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static void spitz_mmc_writeprotect_change(void *opaque, int wp)
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{
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struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
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qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP], wp);
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}
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static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)
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{
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qemu_irq lcd_hsync;
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@ -1096,8 +1084,9 @@ static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)
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pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
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/* MMC/SD host */
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pxa2xx_mmci_handlers(cpu->mmc, cpu, spitz_mmc_writeprotect_change,
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spitz_mmc_coverswitch_change);
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pxa2xx_mmci_handlers(cpu->mmc,
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pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP],
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pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]);
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/* Battery lock always closed */
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qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]);
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