target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c
Rather than perform the VSR register decoding within the helper itself, introduce a new GEN_VSX_HELPER_X2_AB macro which performs the decode based upon xA and xB at translation time. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190616123751.781-9-mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Mark Cave-Ayland
David Gibson
parent
75cf84cbee
commit
033e1fcd97
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@ -2179,10 +2179,9 @@ VSX_RSQRTE(xvrsqrtesp, 4, float32, VsrW(i), 0, 0)
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* nbits - number of fraction bits
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*/
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#define VSX_TDIV(op, nels, tp, fld, emin, emax, nbits) \
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void helper_##op(CPUPPCState *env, uint32_t opcode) \
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void helper_##op(CPUPPCState *env, uint32_t opcode, \
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ppc_vsr_t *xa, ppc_vsr_t *xb) \
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{ \
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ppc_vsr_t *xa = &env->vsr[xA(opcode)]; \
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ppc_vsr_t *xb = &env->vsr[xB(opcode)]; \
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int i; \
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int fe_flag = 0; \
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int fg_flag = 0; \
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@ -2431,10 +2430,9 @@ VSX_SCALAR_CMP_DP(xscmpgedp, le, 1, 1)
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VSX_SCALAR_CMP_DP(xscmpgtdp, lt, 1, 1)
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VSX_SCALAR_CMP_DP(xscmpnedp, eq, 0, 0)
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void helper_xscmpexpdp(CPUPPCState *env, uint32_t opcode)
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void helper_xscmpexpdp(CPUPPCState *env, uint32_t opcode,
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ppc_vsr_t *xa, ppc_vsr_t *xb)
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{
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ppc_vsr_t *xa = &env->vsr[xA(opcode)];
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ppc_vsr_t *xb = &env->vsr[xB(opcode)];
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int64_t exp_a, exp_b;
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uint32_t cc;
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@ -2492,10 +2490,9 @@ void helper_xscmpexpqp(CPUPPCState *env, uint32_t opcode)
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}
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#define VSX_SCALAR_CMP(op, ordered) \
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void helper_##op(CPUPPCState *env, uint32_t opcode) \
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void helper_##op(CPUPPCState *env, uint32_t opcode, \
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ppc_vsr_t *xa, ppc_vsr_t *xb) \
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{ \
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ppc_vsr_t *xa = &env->vsr[xA(opcode)]; \
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ppc_vsr_t *xb = &env->vsr[xB(opcode)]; \
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uint32_t cc = 0; \
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bool vxsnan_flag = false, vxvc_flag = false; \
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\
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@ -375,7 +375,7 @@ DEF_HELPER_2(xsdivqp, void, env, i32)
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DEF_HELPER_3(xsredp, void, env, vsr, vsr)
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DEF_HELPER_3(xssqrtdp, void, env, vsr, vsr)
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DEF_HELPER_3(xsrsqrtedp, void, env, vsr, vsr)
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DEF_HELPER_2(xstdivdp, void, env, i32)
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DEF_HELPER_4(xstdivdp, void, env, i32, vsr, vsr)
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DEF_HELPER_2(xstsqrtdp, void, env, i32)
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DEF_HELPER_4(xsmaddadp, void, env, vsr, vsr, vsr)
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DEF_HELPER_4(xsmaddmdp, void, env, vsr, vsr, vsr)
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@ -389,10 +389,10 @@ DEF_HELPER_4(xscmpeqdp, void, env, vsr, vsr, vsr)
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DEF_HELPER_4(xscmpgtdp, void, env, vsr, vsr, vsr)
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DEF_HELPER_4(xscmpgedp, void, env, vsr, vsr, vsr)
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DEF_HELPER_4(xscmpnedp, void, env, vsr, vsr, vsr)
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DEF_HELPER_2(xscmpexpdp, void, env, i32)
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DEF_HELPER_4(xscmpexpdp, void, env, i32, vsr, vsr)
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DEF_HELPER_2(xscmpexpqp, void, env, i32)
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DEF_HELPER_2(xscmpodp, void, env, i32)
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DEF_HELPER_2(xscmpudp, void, env, i32)
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DEF_HELPER_4(xscmpodp, void, env, i32, vsr, vsr)
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DEF_HELPER_4(xscmpudp, void, env, i32, vsr, vsr)
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DEF_HELPER_2(xscmpoqp, void, env, i32)
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DEF_HELPER_2(xscmpuqp, void, env, i32)
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DEF_HELPER_4(xsmaxdp, void, env, vsr, vsr, vsr)
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@ -460,7 +460,7 @@ DEF_HELPER_4(xvdivdp, void, env, vsr, vsr, vsr)
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DEF_HELPER_3(xvredp, void, env, vsr, vsr)
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DEF_HELPER_3(xvsqrtdp, void, env, vsr, vsr)
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DEF_HELPER_3(xvrsqrtedp, void, env, vsr, vsr)
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DEF_HELPER_2(xvtdivdp, void, env, i32)
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DEF_HELPER_4(xvtdivdp, void, env, i32, vsr, vsr)
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DEF_HELPER_2(xvtsqrtdp, void, env, i32)
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DEF_HELPER_4(xvmaddadp, void, env, vsr, vsr, vsr)
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DEF_HELPER_4(xvmaddmdp, void, env, vsr, vsr, vsr)
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@ -498,7 +498,7 @@ DEF_HELPER_4(xvdivsp, void, env, vsr, vsr, vsr)
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DEF_HELPER_3(xvresp, void, env, vsr, vsr)
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DEF_HELPER_3(xvsqrtsp, void, env, vsr, vsr)
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DEF_HELPER_3(xvrsqrtesp, void, env, vsr, vsr)
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DEF_HELPER_2(xvtdivsp, void, env, i32)
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DEF_HELPER_4(xvtdivsp, void, env, i32, vsr, vsr)
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DEF_HELPER_2(xvtsqrtsp, void, env, i32)
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DEF_HELPER_4(xvmaddasp, void, env, vsr, vsr, vsr)
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DEF_HELPER_4(xvmaddmsp, void, env, vsr, vsr, vsr)
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@ -1061,6 +1061,24 @@ static void gen_##name(DisasContext *ctx) \
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tcg_temp_free_ptr(xb); \
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}
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#define GEN_VSX_HELPER_X2_AB(name, op1, op2, inval, type) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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TCGv_i32 opc; \
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TCGv_ptr xa, xb; \
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if (unlikely(!ctx->vsx_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_VSXU); \
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return; \
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} \
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opc = tcg_const_i32(ctx->opcode); \
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xa = gen_vsr_ptr(xA(ctx->opcode)); \
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xb = gen_vsr_ptr(xB(ctx->opcode)); \
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gen_helper_##name(cpu_env, opc, xa, xb); \
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tcg_temp_free_i32(opc); \
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tcg_temp_free_ptr(xa); \
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tcg_temp_free_ptr(xb); \
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}
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#define GEN_VSX_HELPER_XT_XB_ENV(name, op1, op2, inval, type) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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@ -1089,7 +1107,7 @@ GEN_VSX_HELPER_2(xsdivqp, 0x04, 0x11, 0, PPC2_ISA300)
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GEN_VSX_HELPER_X2(xsredp, 0x14, 0x05, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2(xssqrtdp, 0x16, 0x04, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2(xsrsqrtedp, 0x14, 0x04, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xstdivdp, 0x14, 0x07, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2_AB(xstdivdp, 0x14, 0x07, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xstsqrtdp, 0x14, 0x06, 0, PPC2_VSX)
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GEN_VSX_HELPER_X3(xsmaddadp, 0x04, 0x04, 0, PPC2_VSX)
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GEN_VSX_HELPER_X3(xsmaddmdp, 0x04, 0x05, 0, PPC2_VSX)
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@ -1103,10 +1121,10 @@ GEN_VSX_HELPER_X3(xscmpeqdp, 0x0C, 0x00, 0, PPC2_ISA300)
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GEN_VSX_HELPER_X3(xscmpgtdp, 0x0C, 0x01, 0, PPC2_ISA300)
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GEN_VSX_HELPER_X3(xscmpgedp, 0x0C, 0x02, 0, PPC2_ISA300)
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GEN_VSX_HELPER_X3(xscmpnedp, 0x0C, 0x03, 0, PPC2_ISA300)
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GEN_VSX_HELPER_2(xscmpexpdp, 0x0C, 0x07, 0, PPC2_ISA300)
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GEN_VSX_HELPER_X2_AB(xscmpexpdp, 0x0C, 0x07, 0, PPC2_ISA300)
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GEN_VSX_HELPER_2(xscmpexpqp, 0x04, 0x05, 0, PPC2_ISA300)
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GEN_VSX_HELPER_2(xscmpodp, 0x0C, 0x05, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscmpudp, 0x0C, 0x04, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2_AB(xscmpodp, 0x0C, 0x05, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2_AB(xscmpudp, 0x0C, 0x04, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscmpoqp, 0x04, 0x04, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xscmpuqp, 0x04, 0x14, 0, PPC2_VSX)
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GEN_VSX_HELPER_X3(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX)
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@ -1174,7 +1192,7 @@ GEN_VSX_HELPER_X3(xvdivdp, 0x00, 0x0F, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2(xvredp, 0x14, 0x0D, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2(xvsqrtdp, 0x16, 0x0C, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2(xvrsqrtedp, 0x14, 0x0C, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xvtdivdp, 0x14, 0x0F, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2_AB(xvtdivdp, 0x14, 0x0F, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xvtsqrtdp, 0x14, 0x0E, 0, PPC2_VSX)
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GEN_VSX_HELPER_X3(xvmaddadp, 0x04, 0x0C, 0, PPC2_VSX)
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GEN_VSX_HELPER_X3(xvmaddmdp, 0x04, 0x0D, 0, PPC2_VSX)
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@ -1208,7 +1226,7 @@ GEN_VSX_HELPER_X3(xvdivsp, 0x00, 0x0B, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2(xvresp, 0x14, 0x09, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2(xvsqrtsp, 0x16, 0x08, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2(xvrsqrtesp, 0x14, 0x08, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xvtdivsp, 0x14, 0x0B, 0, PPC2_VSX)
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GEN_VSX_HELPER_X2_AB(xvtdivsp, 0x14, 0x0B, 0, PPC2_VSX)
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GEN_VSX_HELPER_2(xvtsqrtsp, 0x14, 0x0A, 0, PPC2_VSX)
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GEN_VSX_HELPER_X3(xvmaddasp, 0x04, 0x08, 0, PPC2_VSX)
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GEN_VSX_HELPER_X3(xvmaddmsp, 0x04, 0x09, 0, PPC2_VSX)
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