From 0347d689f7339ec925f3a2dcb2c3bcad4d6ef315 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 6 May 2012 12:40:55 +0200 Subject: [PATCH] target-lm32: Let cpu_lm32_init() return LM32CPU MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make the include paths for cpu-qom.h consistent to allow using LM32CPU in cpu.h. Turn cpu_init macro into a static inline function returning CPULM32State for backwards compatibility. Signed-off-by: Andreas Färber Acked-by: Michael Walle --- target-lm32/cpu.c | 2 +- target-lm32/cpu.h | 12 ++++++++++-- target-lm32/helper.c | 4 ++-- 3 files changed, 13 insertions(+), 5 deletions(-) diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index 48a5fe3f86..caa4834075 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -18,7 +18,7 @@ * */ -#include "cpu-qom.h" +#include "cpu.h" #include "qemu-common.h" diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h index 422a55b063..da80469f51 100644 --- a/target-lm32/cpu.h +++ b/target-lm32/cpu.h @@ -186,7 +186,7 @@ struct CPULM32State { #include "cpu-qom.h" -CPULM32State *cpu_lm32_init(const char *cpu_model); +LM32CPU *cpu_lm32_init(const char *cpu_model); void cpu_lm32_list(FILE *f, fprintf_function cpu_fprintf); int cpu_lm32_exec(CPULM32State *s); void cpu_lm32_close(CPULM32State *s); @@ -199,8 +199,16 @@ int cpu_lm32_signal_handler(int host_signum, void *pinfo, void lm32_translate_init(void); void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value); +static inline CPULM32State *cpu_init(const char *cpu_model) +{ + LM32CPU *cpu = cpu_lm32_init(cpu_model); + if (cpu == NULL) { + return NULL; + } + return &cpu->env; +} + #define cpu_list cpu_lm32_list -#define cpu_init cpu_lm32_init #define cpu_exec cpu_lm32_exec #define cpu_gen_code cpu_lm32_gen_code #define cpu_signal_handler cpu_lm32_signal_handler diff --git a/target-lm32/helper.c b/target-lm32/helper.c index d0bc1931d8..3b1cee711e 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -192,7 +192,7 @@ static uint32_t cfg_by_def(const LM32Def *def) return cfg; } -CPULM32State *cpu_lm32_init(const char *cpu_model) +LM32CPU *cpu_lm32_init(const char *cpu_model) { LM32CPU *cpu; CPULM32State *env; @@ -219,7 +219,7 @@ CPULM32State *cpu_lm32_init(const char *cpu_model) lm32_translate_init(); } - return env; + return cpu; } /* Some soc ignores the MSB on the address bus. Thus creating a shadow memory