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Fix Sparc64 ldfa/stfa and float ops with fpr >= 32

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3318 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2007-10-03 17:46:29 +00:00
parent fe33cc7103
commit 0387d92875
1 changed files with 3 additions and 3 deletions
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6
target-sparc/translate.c
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@ -87,7 +87,7 @@ enum {
#define GET_FIELD_SPs(x,a,b) sign_extend (GET_FIELD_SP(x,a,b), ((b) - (a) + 1))
#ifdef TARGET_SPARC64
#define DFPREG(r) (((r & 1) << 6) | (r & 0x1e))
#define DFPREG(r) (((r & 1) << 5) | (r & 0x1e))
#else
#define DFPREG(r) (r & 0x1e)
#endif
@ -431,7 +431,7 @@ static inline void gen_ldf_asi(int insn, int size)
{
int asi, offset, rd;
rd = GET_FIELD(insn, 2, 6);
rd = DFPREG(GET_FIELD(insn, 2, 6));
if (IS_IMM) {
offset = GET_FIELD(insn, 25, 31);
gen_op_ldf_asi_reg(offset, size, rd);
@ -445,7 +445,7 @@ static inline void gen_stf_asi(int insn, int size)
{
int asi, offset, rd;
rd = GET_FIELD(insn, 2, 6);
rd = DFPREG(GET_FIELD(insn, 2, 6));
if (IS_IMM) {
offset = GET_FIELD(insn, 25, 31);
gen_op_stf_asi_reg(offset, size, rd);