tcg: Change tcg_qemu_tb_exec return to uintptr_t
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -53,7 +53,7 @@ void cpu_resume_from_signal(CPUArchState *env, void *puc)
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static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
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{
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CPUArchState *env = cpu->env_ptr;
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tcg_target_ulong next_tb = tcg_qemu_tb_exec(env, tb_ptr);
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uintptr_t next_tb = tcg_qemu_tb_exec(env, tb_ptr);
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if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
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/* We didn't start executing this TB (eg because the instruction
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* counter hit zero); we must restore the guest PC to the address
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@ -102,7 +102,7 @@ typedef enum {
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#define TCG_AREG0 TCG_REG_R27
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#define tcg_qemu_tb_exec(env, tb_ptr) \
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((long __attribute__ ((longcall)) \
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((uintptr_t __attribute__ ((longcall)) \
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(*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
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#endif
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@ -733,8 +733,7 @@ TCGv_i64 tcg_const_local_i64(int64_t val);
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#if !defined(tcg_qemu_tb_exec)
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# define tcg_qemu_tb_exec(env, tb_ptr) \
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((tcg_target_ulong (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, \
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tb_ptr)
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((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
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#endif
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void tcg_register_jit(void *buf, size_t buf_size);
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@ -169,7 +169,7 @@ typedef enum {
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void tci_disas(uint8_t opc);
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tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr);
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uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr);
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#define tcg_qemu_tb_exec tcg_qemu_tb_exec
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static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
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4
tci.c
4
tci.c
@ -434,11 +434,11 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCGCond condition)
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}
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/* Interpret pseudo code in tb. */
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tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
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uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
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{
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long tcg_temps[CPU_TEMP_BUF_NLONGS];
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uintptr_t sp_value = (uintptr_t)(tcg_temps + CPU_TEMP_BUF_NLONGS);
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tcg_target_ulong next_tb = 0;
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uintptr_t next_tb = 0;
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tci_reg[TCG_AREG0] = (tcg_target_ulong)env;
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tci_reg[TCG_REG_CALL_STACK] = sp_value;
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