target/arm: Reset streaming sve state on exception boundaries
We can handle both exception entry and exception return by hooking into aarch64_sve_change_el. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-32-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
6b5a3bdf3a
commit
04fbce7639
|
@ -11242,6 +11242,19 @@ void aarch64_sve_change_el(CPUARMState *env, int old_el,
|
|||
return;
|
||||
}
|
||||
|
||||
old_a64 = old_el ? arm_el_is_aa64(env, old_el) : el0_a64;
|
||||
new_a64 = new_el ? arm_el_is_aa64(env, new_el) : el0_a64;
|
||||
|
||||
/*
|
||||
* Both AArch64.TakeException and AArch64.ExceptionReturn
|
||||
* invoke ResetSVEState when taking an exception from, or
|
||||
* returning to, AArch32 state when PSTATE.SM is enabled.
|
||||
*/
|
||||
if (old_a64 != new_a64 && FIELD_EX64(env->svcr, SVCR, SM)) {
|
||||
arm_reset_sve_state(env);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* DDI0584A.d sec 3.2: "If SVE instructions are disabled or trapped
|
||||
* at ELx, or not available because the EL is in AArch32 state, then
|
||||
|
@ -11254,10 +11267,8 @@ void aarch64_sve_change_el(CPUARMState *env, int old_el,
|
|||
* we already have the correct register contents when encountering the
|
||||
* vq0->vq0 transition between EL0->EL1.
|
||||
*/
|
||||
old_a64 = old_el ? arm_el_is_aa64(env, old_el) : el0_a64;
|
||||
old_len = (old_a64 && !sve_exception_el(env, old_el)
|
||||
? sve_vqm1_for_el(env, old_el) : 0);
|
||||
new_a64 = new_el ? arm_el_is_aa64(env, new_el) : el0_a64;
|
||||
new_len = (new_a64 && !sve_exception_el(env, new_el)
|
||||
? sve_vqm1_for_el(env, new_el) : 0);
|
||||
|
||||
|
|
Loading…
Reference in New Issue