target/arm: Avoid tcg_const_* in translate-mve.c
All uses are in the context of an accumulator conditionally having a zero input. Split the rda variable to rda_{i,o}, and set rda_i to tcg_constant_foo(0) when required. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1150,7 +1150,7 @@ static bool do_long_dual_acc(DisasContext *s, arg_vmlaldav *a,
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MVEGenLongDualAccOpFn *fn)
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{
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TCGv_ptr qn, qm;
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TCGv_i64 rda;
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TCGv_i64 rda_i, rda_o;
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TCGv_i32 rdalo, rdahi;
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if (!dc_isar_feature(aa32_mve, s) ||
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@ -1177,21 +1177,22 @@ static bool do_long_dual_acc(DisasContext *s, arg_vmlaldav *a,
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* of an A=0 (no-accumulate) insn which does not execute the first
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* beat must start with the current rda value, not 0.
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*/
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rda_o = tcg_temp_new_i64();
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if (a->a || mve_skip_first_beat(s)) {
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rda = tcg_temp_new_i64();
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rda_i = rda_o;
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rdalo = load_reg(s, a->rdalo);
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rdahi = load_reg(s, a->rdahi);
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tcg_gen_concat_i32_i64(rda, rdalo, rdahi);
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tcg_gen_concat_i32_i64(rda_i, rdalo, rdahi);
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} else {
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rda = tcg_const_i64(0);
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rda_i = tcg_constant_i64(0);
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}
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fn(rda, cpu_env, qn, qm, rda);
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fn(rda_o, cpu_env, qn, qm, rda_i);
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rdalo = tcg_temp_new_i32();
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rdahi = tcg_temp_new_i32();
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tcg_gen_extrl_i64_i32(rdalo, rda);
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tcg_gen_extrh_i64_i32(rdahi, rda);
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tcg_gen_extrl_i64_i32(rdalo, rda_o);
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tcg_gen_extrh_i64_i32(rdahi, rda_o);
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store_reg(s, a->rdalo, rdalo);
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store_reg(s, a->rdahi, rdahi);
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mve_update_eci(s);
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@ -1258,7 +1259,7 @@ static bool trans_VRMLSLDAVH(DisasContext *s, arg_vmlaldav *a)
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static bool do_dual_acc(DisasContext *s, arg_vmladav *a, MVEGenDualAccOpFn *fn)
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{
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TCGv_ptr qn, qm;
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TCGv_i32 rda;
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TCGv_i32 rda_i, rda_o;
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if (!dc_isar_feature(aa32_mve, s) ||
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!mve_check_qreg_bank(s, a->qn) ||
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@ -1278,13 +1279,14 @@ static bool do_dual_acc(DisasContext *s, arg_vmladav *a, MVEGenDualAccOpFn *fn)
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* beat must start with the current rda value, not 0.
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*/
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if (a->a || mve_skip_first_beat(s)) {
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rda = load_reg(s, a->rda);
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rda_o = rda_i = load_reg(s, a->rda);
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} else {
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rda = tcg_const_i32(0);
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rda_i = tcg_constant_i32(0);
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rda_o = tcg_temp_new_i32();
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}
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fn(rda, cpu_env, qn, qm, rda);
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store_reg(s, a->rda, rda);
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fn(rda_o, cpu_env, qn, qm, rda_i);
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store_reg(s, a->rda, rda_o);
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mve_update_eci(s);
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return true;
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@ -1396,7 +1398,7 @@ static bool trans_VADDV(DisasContext *s, arg_VADDV *a)
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{ NULL, NULL }
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};
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TCGv_ptr qm;
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TCGv_i32 rda;
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TCGv_i32 rda_i, rda_o;
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if (!dc_isar_feature(aa32_mve, s) ||
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a->size == 3) {
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@ -1413,15 +1415,16 @@ static bool trans_VADDV(DisasContext *s, arg_VADDV *a)
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*/
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if (a->a || mve_skip_first_beat(s)) {
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/* Accumulate input from Rda */
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rda = load_reg(s, a->rda);
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rda_o = rda_i = load_reg(s, a->rda);
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} else {
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/* Accumulate starting at zero */
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rda = tcg_const_i32(0);
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rda_i = tcg_constant_i32(0);
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rda_o = tcg_temp_new_i32();
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}
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qm = mve_qreg_ptr(a->qm);
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fns[a->size][a->u](rda, cpu_env, qm, rda);
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store_reg(s, a->rda, rda);
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fns[a->size][a->u](rda_o, cpu_env, qm, rda_i);
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store_reg(s, a->rda, rda_o);
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mve_update_eci(s);
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return true;
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@ -1436,7 +1439,7 @@ static bool trans_VADDLV(DisasContext *s, arg_VADDLV *a)
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* No need to check Qm's bank: it is only 3 bits in decode.
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*/
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TCGv_ptr qm;
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TCGv_i64 rda;
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TCGv_i64 rda_i, rda_o;
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TCGv_i32 rdalo, rdahi;
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if (!dc_isar_feature(aa32_mve, s)) {
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@ -1458,28 +1461,29 @@ static bool trans_VADDLV(DisasContext *s, arg_VADDLV *a)
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* of an A=0 (no-accumulate) insn which does not execute the first
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* beat must start with the current value of RdaHi:RdaLo, not zero.
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*/
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rda_o = tcg_temp_new_i64();
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if (a->a || mve_skip_first_beat(s)) {
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/* Accumulate input from RdaHi:RdaLo */
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rda = tcg_temp_new_i64();
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rda_i = rda_o;
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rdalo = load_reg(s, a->rdalo);
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rdahi = load_reg(s, a->rdahi);
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tcg_gen_concat_i32_i64(rda, rdalo, rdahi);
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tcg_gen_concat_i32_i64(rda_i, rdalo, rdahi);
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} else {
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/* Accumulate starting at zero */
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rda = tcg_const_i64(0);
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rda_i = tcg_constant_i64(0);
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}
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qm = mve_qreg_ptr(a->qm);
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if (a->u) {
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gen_helper_mve_vaddlv_u(rda, cpu_env, qm, rda);
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gen_helper_mve_vaddlv_u(rda_o, cpu_env, qm, rda_i);
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} else {
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gen_helper_mve_vaddlv_s(rda, cpu_env, qm, rda);
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gen_helper_mve_vaddlv_s(rda_o, cpu_env, qm, rda_i);
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}
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rdalo = tcg_temp_new_i32();
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rdahi = tcg_temp_new_i32();
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tcg_gen_extrl_i64_i32(rdalo, rda);
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tcg_gen_extrh_i64_i32(rdahi, rda);
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tcg_gen_extrl_i64_i32(rdalo, rda_o);
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tcg_gen_extrh_i64_i32(rdahi, rda_o);
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store_reg(s, a->rdalo, rdalo);
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store_reg(s, a->rdahi, rdahi);
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mve_update_eci(s);
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