hw/virtio-pci Added counter for pcie capabilities offsets.
Removed hardcoded offset for ats. Added cap offset counter for future capabilities like AER. Signed-off-by: Andrew Melnychenko <andrew@daynix.com> Message-Id: <20201203110713.204938-2-andrew@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -1798,6 +1798,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
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if (pcie_port && pci_is_express(pci_dev)) {
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if (pcie_port && pci_is_express(pci_dev)) {
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int pos;
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int pos;
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uint16_t last_pcie_cap_offset = PCI_CONFIG_SPACE_SIZE;
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pos = pcie_endpoint_cap_init(pci_dev, 0);
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pos = pcie_endpoint_cap_init(pci_dev, 0);
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assert(pos > 0);
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assert(pos > 0);
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@ -1833,7 +1834,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
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}
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}
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if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
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if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
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pcie_ats_init(pci_dev, 256);
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pcie_ats_init(pci_dev, last_pcie_cap_offset);
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last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF;
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}
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}
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if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
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if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
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