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ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address. 

Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.

IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Isaku Yamahata 2009-07-14 19:10:43 +09:00 committed by Anthony Liguori
parent fc7083b530
commit 07323531c1
3 changed files with 45 additions and 40 deletions
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27
ioport-user.c
View File

@ -23,35 +23,38 @@
#include "qemu-common.h"
#include "ioport.h"
void cpu_outb(CPUState *env, int addr, int val)
void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
{
fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
fprintf(stderr, "outb: port=0x%04"FMT_pioaddr", data=%02"PRIx8"\n",
addr, val);
}
void cpu_outw(CPUState *env, int addr, int val)
void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
{
fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
fprintf(stderr, "outw: port=0x%04"FMT_pioaddr", data=%04"PRIx16"\n",
addr, val);
}
void cpu_outl(CPUState *env, int addr, int val)
void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
{
fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
fprintf(stderr, "outl: port=0x%04"FMT_pioaddr", data=%08"PRIx32"\n",
addr, val);
}
int cpu_inb(CPUState *env, int addr)
uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
{
fprintf(stderr, "inb: port=0x%04x\n", addr);
fprintf(stderr, "inb: port=0x%04"FMT_pioaddr"\n", addr);
return 0;
}
int cpu_inw(CPUState *env, int addr)
uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
{
fprintf(stderr, "inw: port=0x%04x\n", addr);
fprintf(stderr, "inw: port=0x%04"FMT_pioaddr"\n", addr);
return 0;
}
int cpu_inl(CPUState *env, int addr)
uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
{
fprintf(stderr, "inl: port=0x%04x\n", addr);
fprintf(stderr, "inl: port=0x%04"FMT_pioaddr"\n", addr);
return 0;
}

37
ioport.c
View File

@ -136,7 +136,7 @@ static int ioport_bsize(int size, int *bsize)
}
/* size is the word size in byte */
int register_ioport_read(int start, int length, int size,
int register_ioport_read(pio_addr_t start, int length, int size,
IOPortReadFunc *func, void *opaque)
{
int i, bsize;
@ -155,7 +155,7 @@ int register_ioport_read(int start, int length, int size,
}
/* size is the word size in byte */
int register_ioport_write(int start, int length, int size,
int register_ioport_write(pio_addr_t start, int length, int size,
IOPortWriteFunc *func, void *opaque)
{
int i, bsize;
@ -173,7 +173,7 @@ int register_ioport_write(int start, int length, int size,
return 0;
}
void isa_unassign_ioport(int start, int length)
void isa_unassign_ioport(pio_addr_t start, int length)
{
int i;
@ -192,9 +192,9 @@ void isa_unassign_ioport(int start, int length)
/***********************************************************/
void cpu_outb(CPUState *env, int addr, int val)
void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
{
LOG_IOPORT("outb: %04x %02x\n", addr, val);
LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
ioport_write(0, addr, val);
#ifdef CONFIG_KQEMU
if (env)
@ -202,9 +202,9 @@ void cpu_outb(CPUState *env, int addr, int val)
#endif
}
void cpu_outw(CPUState *env, int addr, int val)
void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
{
LOG_IOPORT("outw: %04x %04x\n", addr, val);
LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
ioport_write(1, addr, val);
#ifdef CONFIG_KQEMU
if (env)
@ -212,9 +212,9 @@ void cpu_outw(CPUState *env, int addr, int val)
#endif
}
void cpu_outl(CPUState *env, int addr, int val)
void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
{
LOG_IOPORT("outl: %04x %08x\n", addr, val);
LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
ioport_write(2, addr, val);
#ifdef CONFIG_KQEMU
if (env)
@ -222,11 +222,11 @@ void cpu_outl(CPUState *env, int addr, int val)
#endif
}
int cpu_inb(CPUState *env, int addr)
uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
{
int val;
uint8_t val;
val = ioport_read(0, addr);
LOG_IOPORT("inb : %04x %02x\n", addr, val);
LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
#ifdef CONFIG_KQEMU
if (env)
env->last_io_time = cpu_get_time_fast();
@ -234,11 +234,11 @@ int cpu_inb(CPUState *env, int addr)
return val;
}
int cpu_inw(CPUState *env, int addr)
uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
{
int val;
uint16_t val;
val = ioport_read(1, addr);
LOG_IOPORT("inw : %04x %04x\n", addr, val);
LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
#ifdef CONFIG_KQEMU
if (env)
env->last_io_time = cpu_get_time_fast();
@ -246,15 +246,14 @@ int cpu_inw(CPUState *env, int addr)
return val;
}
int cpu_inl(CPUState *env, int addr)
uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
{
int val;
uint32_t val;
val = ioport_read(2, addr);
LOG_IOPORT("inl : %04x %08x\n", addr, val);
LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
#ifdef CONFIG_KQEMU
if (env)
env->last_io_time = cpu_get_time_fast();
#endif
return val;
}

21
ioport.h
View File

@ -26,6 +26,9 @@
#include "qemu-common.h"
typedef uint32_t pio_addr_t;
#define FMT_pioaddr PRIx32
#define MAX_IOPORTS (64 * 1024)
#define IOPORTS_MASK (MAX_IOPORTS - 1)
@ -33,22 +36,22 @@
typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
int register_ioport_read(int start, int length, int size,
int register_ioport_read(pio_addr_t start, int length, int size,
IOPortReadFunc *func, void *opaque);
int register_ioport_write(int start, int length, int size,
int register_ioport_write(pio_addr_t start, int length, int size,
IOPortWriteFunc *func, void *opaque);
void isa_unassign_ioport(int start, int length);
void isa_unassign_ioport(pio_addr_t start, int length);
/* NOTE: as these functions may be even used when there is an isa
brige on non x86 targets, we always defined them */
#if !defined(NO_CPU_IO_DEFS) && defined(NEED_CPU_H)
void cpu_outb(CPUState *env, int addr, int val);
void cpu_outw(CPUState *env, int addr, int val);
void cpu_outl(CPUState *env, int addr, int val);
int cpu_inb(CPUState *env, int addr);
int cpu_inw(CPUState *env, int addr);
int cpu_inl(CPUState *env, int addr);
void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val);
void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val);
void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val);
uint8_t cpu_inb(CPUState *env, pio_addr_t addr);
uint16_t cpu_inw(CPUState *env, pio_addr_t addr);
uint32_t cpu_inl(CPUState *env, pio_addr_t addr);
#endif
#endif /* IOPORT_H */