target/arm: Remove obsolete TODO note from get_phys_addr_lpae()
An old comment in get_phys_addr_lpae() claims that the code does not support the different format TCR for VTCR_EL2. This used to be true but it is not true now (in particular the aa64_va_parameters() and aa32_va_parameters() functions correctly handle the different register format by checking whether the mmu_idx is Stage2). Remove the out of date parts of the comment. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200331143407.3186-1-peter.maydell@linaro.org
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@ -10753,12 +10753,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
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bool aarch64 = arm_el_is_aa64(env, el);
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bool guarded = false;
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/* TODO:
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* This code does not handle the different format TCR for VTCR_EL2.
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* This code also does not support shareability levels.
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* Attribute and permission bit handling should also be checked when adding
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* support for those page table walks.
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*/
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/* TODO: This code does not support shareability levels. */
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if (aarch64) {
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param = aa64_va_parameters(env, address, mmu_idx,
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access_type != MMU_INST_FETCH);
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