From 07f5a258750b3b9a6e10fd5ec3e29c9a943b650e Mon Sep 17 00:00:00 2001 From: Markus Armbruster Date: Wed, 29 Jun 2016 11:05:55 +0200 Subject: [PATCH] target-*: Clean up cpu.h header guards Most of them use guard symbols like CPU_$target_H, but we also have __MIPS_CPU_H__ and __TRICORE_CPU_H__. They all upset scripts/clean-header-guards.pl. The script dislikes CPU_$target_H because they don't match their file name (they should, to make guard collisions less likely). The others are reserved identifiers. Clean them all up: use guard symbol $target_CPU_H for target-$target/cpu.h. Signed-off-by: Markus Armbruster Reviewed-by: Richard Henderson --- target-alpha/cpu.h | 6 +++--- target-arm/cpu.h | 4 ++-- target-cris/cpu.h | 5 +++-- target-i386/cpu.h | 7 ++++--- target-lm32/cpu.h | 4 ++-- target-m68k/cpu.h | 5 +++-- target-microblaze/cpu.h | 5 +++-- target-mips/cpu.h | 6 +++--- target-moxie/cpu.h | 7 ++++--- target-openrisc/cpu.h | 6 +++--- target-ppc/cpu.h | 7 ++++--- target-s390x/cpu.h | 5 +++-- target-sh4/cpu.h | 7 ++++--- target-sparc/cpu.h | 4 ++-- target-tilegx/cpu.h | 5 +++-- target-tricore/cpu.h | 7 ++++--- target-unicore32/cpu.h | 7 ++++--- target-xtensa/cpu.h | 4 ++-- 18 files changed, 56 insertions(+), 45 deletions(-) diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 791da3b4ad..ac5e801fb4 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -17,8 +17,8 @@ * License along with this library; if not, see . */ -#if !defined (__CPU_ALPHA_H__) -#define __CPU_ALPHA_H__ +#ifndef ALPHA_CPU_H +#define ALPHA_CPU_H #include "qemu-common.h" #include "cpu-qom.h" @@ -524,4 +524,4 @@ static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc, *pflags = flags; } -#endif /* !defined (__CPU_ALPHA_H__) */ +#endif /* ALPHA_CPU_H */ diff --git a/target-arm/cpu.h b/target-arm/cpu.h index e2fac46909..76d824d315 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -16,9 +16,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#ifndef CPU_ARM_H -#define CPU_ARM_H +#ifndef ARM_CPU_H +#define ARM_CPU_H #include "kvm-consts.h" diff --git a/target-cris/cpu.h b/target-cris/cpu.h index e6046d20ca..7d7fe6eb1c 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -17,8 +17,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#ifndef CPU_CRIS_H -#define CPU_CRIS_H + +#ifndef CRIS_CPU_H +#define CRIS_CPU_H #include "qemu-common.h" #include "cpu-qom.h" diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 5c7a2791f3..776efe630e 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -16,8 +16,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#ifndef CPU_I386_H -#define CPU_I386_H + +#ifndef I386_CPU_H +#define I386_CPU_H #include "qemu-common.h" #include "cpu-qom.h" @@ -1607,4 +1608,4 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f, /* cpu.c */ bool cpu_is_bsp(X86CPU *cpu); -#endif /* CPU_I386_H */ +#endif /* I386_CPU_H */ diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h index 4efe98d828..d8a3515244 100644 --- a/target-lm32/cpu.h +++ b/target-lm32/cpu.h @@ -17,8 +17,8 @@ * License along with this library; if not, see . */ -#ifndef CPU_LM32_H -#define CPU_LM32_H +#ifndef LM32_CPU_H +#define LM32_CPU_H #define TARGET_LONG_BITS 32 diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index 9087769997..b2faa6b605 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -17,8 +17,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#ifndef CPU_M68K_H -#define CPU_M68K_H + +#ifndef M68K_CPU_H +#define M68K_CPU_H #define TARGET_LONG_BITS 32 diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index 16815dfc6a..beb75ffd26 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -16,8 +16,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#ifndef CPU_MICROBLAZE_H -#define CPU_MICROBLAZE_H + +#ifndef MICROBLAZE_CPU_H +#define MICROBLAZE_CPU_H #include "qemu-common.h" #include "cpu-qom.h" diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 9c4fc816bf..5182dc74ff 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -1,5 +1,5 @@ -#if !defined (__MIPS_CPU_H__) -#define __MIPS_CPU_H__ +#ifndef MIPS_CPU_H +#define MIPS_CPU_H //#define DEBUG_OP @@ -1066,4 +1066,4 @@ static inline void QEMU_NORETURN do_raise_exception(CPUMIPSState *env, do_raise_exception_err(env, exception, 0, pc); } -#endif /* !defined (__MIPS_CPU_H__) */ +#endif /* MIPS_CPU_H */ diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h index 63d5cafc55..3e880facf4 100644 --- a/target-moxie/cpu.h +++ b/target-moxie/cpu.h @@ -16,8 +16,9 @@ * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ -#ifndef _CPU_MOXIE_H -#define _CPU_MOXIE_H + +#ifndef MOXIE_CPU_H +#define MOXIE_CPU_H #include "qemu-common.h" @@ -139,4 +140,4 @@ static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc, int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, int mmu_idx); -#endif /* _CPU_MOXIE_H */ +#endif /* MOXIE_CPU_H */ diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 9451a7cca6..aaf153579a 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -17,8 +17,8 @@ * License along with this library; if not, see . */ -#ifndef CPU_OPENRISC_H -#define CPU_OPENRISC_H +#ifndef OPENRISC_CPU_H +#define OPENRISC_CPU_H #define TARGET_LONG_BITS 32 @@ -408,4 +408,4 @@ static inline int cpu_mmu_index(CPUOpenRISCState *env, bool ifetch) #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 -#endif /* CPU_OPENRISC_H */ +#endif /* OPENRISC_CPU_H */ diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 2666a3f80d..5fce1ffa25 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -16,8 +16,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#if !defined (__CPU_PPC_H__) -#define __CPU_PPC_H__ + +#ifndef PPC_CPU_H +#define PPC_CPU_H #include "qemu-common.h" @@ -2432,4 +2433,4 @@ int ppc_get_vcpu_dt_id(PowerPCCPU *cpu); PowerPCCPU *ppc_get_vcpu_by_dt_id(int cpu_dt_id); void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len); -#endif /* !defined (__CPU_PPC_H__) */ +#endif /* PPC_CPU_H */ diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index 0c8dba3602..c216bdacef 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -19,8 +19,9 @@ * You should have received a copy of the GNU (Lesser) General Public * License along with this library; if not, see . */ -#ifndef CPU_S390X_H -#define CPU_S390X_H + +#ifndef S390X_CPU_H +#define S390X_CPU_H #include "qemu-common.h" #include "cpu-qom.h" diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 3f9dae2d1f..478ab55868 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -16,8 +16,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#ifndef _CPU_SH4_H -#define _CPU_SH4_H + +#ifndef SH4_CPU_H +#define SH4_CPU_H #include "qemu-common.h" #include "cpu-qom.h" @@ -387,4 +388,4 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env, target_ulong *pc, | (env->movcal_backup ? TB_FLAG_PENDING_MOVCA : 0); /* Bit 4 */ } -#endif /* _CPU_SH4_H */ +#endif /* SH4_CPU_H */ diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 604de84624..15364a00f2 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -1,5 +1,5 @@ -#ifndef CPU_SPARC_H -#define CPU_SPARC_H +#ifndef SPARC_CPU_H +#define SPARC_CPU_H #include "qemu-common.h" #include "qemu/bswap.h" diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h index d74032925b..1735427233 100644 --- a/target-tilegx/cpu.h +++ b/target-tilegx/cpu.h @@ -16,8 +16,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#ifndef CPU_TILEGX_H -#define CPU_TILEGX_H + +#ifndef TILEGX_CPU_H +#define TILEGX_CPU_H #include "qemu-common.h" diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h index a298d63eea..a3493a123c 100644 --- a/target-tricore/cpu.h +++ b/target-tricore/cpu.h @@ -16,8 +16,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ -#if !defined(__TRICORE_CPU_H__) -#define __TRICORE_CPU_H__ + +#ifndef TRICORE_CPU_H +#define TRICORE_CPU_H #include "tricore-defs.h" #include "qemu-common.h" @@ -420,4 +421,4 @@ int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address, int rw, int mmu_idx); #define cpu_handle_mmu_fault cpu_tricore_handle_mmu_fault -#endif /*__TRICORE_CPU_H__ */ +#endif /* TRICORE_CPU_H */ diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h index 83f758496a..7b5b405e79 100644 --- a/target-unicore32/cpu.h +++ b/target-unicore32/cpu.h @@ -8,8 +8,9 @@ * published by the Free Software Foundation, or (at your option) any * later version. See the COPYING file in the top-level directory. */ -#ifndef QEMU_UNICORE32_CPU_H -#define QEMU_UNICORE32_CPU_H + +#ifndef UNICORE32_CPU_H +#define UNICORE32_CPU_H #define TARGET_LONG_BITS 32 #define TARGET_PAGE_BITS 12 @@ -184,4 +185,4 @@ int uc32_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, void uc32_translate_init(void); void switch_mode(CPUUniCore32State *, int); -#endif /* QEMU_UNICORE32_CPU_H */ +#endif /* UNICORE32_CPU_H */ diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index ce9fb5b003..7fe82a37af 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -25,8 +25,8 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef CPU_XTENSA_H -#define CPU_XTENSA_H +#ifndef XTENSA_CPU_H +#define XTENSA_CPU_H #define ALIGNED_ONLY #define TARGET_LONG_BITS 32