Fix for duplicate tlb check on unaligned access.
Fix for w^x code gen buffer mapping. -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmLNEksdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8KPwf9EybXFrlI1u9A2nOK 8puFCKdN7eGjYo2dkRd/CyqugmsaS3IuL9cooWi7/A6pOtyuIWdlyI/r+PAZat3p GfvZvx9GejWpbUv6GYX2extZAev1EbhaaM6ZOg/EZGOWTjiINZMztuIWhbjftRUj 6E8FLkj/5PWQzYvi6TbMMAMqg5QsYERZIZ4SfDfjE2a8s8rloYDBdvVEaG35NOa/ pv93clb7OrnE5VyJLHyfs8VwpbtJKsQy/Twwh1+828X/fetwJWT5AKfPZTIHLELL tVuABJA25wSfPPmjtXTzDjq5x5/UWKc16Zvk1tbcxuknLegxUH0Agy+qJRI3x5FA M3ZHOg== =b4EN -----END PGP SIGNATURE----- Merge tag 'pull-tcg-20220712' of https://gitlab.com/rth7680/qemu into staging Fix for duplicate tlb check on unaligned access. Fix for w^x code gen buffer mapping. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmLNEksdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8KPwf9EybXFrlI1u9A2nOK # 8puFCKdN7eGjYo2dkRd/CyqugmsaS3IuL9cooWi7/A6pOtyuIWdlyI/r+PAZat3p # GfvZvx9GejWpbUv6GYX2extZAev1EbhaaM6ZOg/EZGOWTjiINZMztuIWhbjftRUj # 6E8FLkj/5PWQzYvi6TbMMAMqg5QsYERZIZ4SfDfjE2a8s8rloYDBdvVEaG35NOa/ # pv93clb7OrnE5VyJLHyfs8VwpbtJKsQy/Twwh1+828X/fetwJWT5AKfPZTIHLELL # tVuABJA25wSfPPmjtXTzDjq5x5/UWKc16Zvk1tbcxuknLegxUH0Agy+qJRI3x5FA # M3ZHOg== # =b4EN # -----END PGP SIGNATURE----- # gpg: Signature made Tue 12 Jul 2022 11:48:51 AM +0530 # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20220712' of https://gitlab.com/rth7680/qemu: accel/tcg: Fix unaligned stores to s390x low-address-protected lowcore tcg: Fix returned type in alloc_code_gen_buffer_splitwx_memfd() Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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commit
08c8a31214
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@ -2248,7 +2248,7 @@ store_helper_unaligned(CPUArchState *env, target_ulong addr, uint64_t val,
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const size_t tlb_off = offsetof(CPUTLBEntry, addr_write);
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uintptr_t index, index2;
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CPUTLBEntry *entry, *entry2;
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target_ulong page2, tlb_addr, tlb_addr2;
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target_ulong page1, page2, tlb_addr, tlb_addr2;
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MemOpIdx oi;
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size_t size2;
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int i;
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@ -2256,15 +2256,17 @@ store_helper_unaligned(CPUArchState *env, target_ulong addr, uint64_t val,
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/*
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* Ensure the second page is in the TLB. Note that the first page
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* is already guaranteed to be filled, and that the second page
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* cannot evict the first.
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* cannot evict the first. An exception to this rule is PAGE_WRITE_INV
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* handling: the first page could have evicted itself.
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*/
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page1 = addr & TARGET_PAGE_MASK;
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page2 = (addr + size) & TARGET_PAGE_MASK;
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size2 = (addr + size) & ~TARGET_PAGE_MASK;
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index2 = tlb_index(env, mmu_idx, page2);
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entry2 = tlb_entry(env, mmu_idx, page2);
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tlb_addr2 = tlb_addr_write(entry2);
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if (!tlb_hit_page(tlb_addr2, page2)) {
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if (page1 != page2 && !tlb_hit_page(tlb_addr2, page2)) {
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if (!victim_tlb_hit(env, mmu_idx, index2, tlb_off, page2)) {
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tlb_fill(env_cpu(env), page2, size2, MMU_DATA_STORE,
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mmu_idx, retaddr);
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@ -548,7 +548,7 @@ static int alloc_code_gen_buffer_anon(size_t size, int prot,
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#ifdef CONFIG_POSIX
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#include "qemu/memfd.h"
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static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp)
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static int alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp)
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{
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void *buf_rw = NULL, *buf_rx = MAP_FAILED;
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int fd = -1;
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