target/riscv: Remove manual decoding from gen_branch()

We now utilizes argument-sets of decodetree such that no manual
decoding is necessary.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
This commit is contained in:
Bastian Koppelmann 2019-02-13 07:54:00 -08:00
parent 9e92c57d83
commit 090cc2c898
2 changed files with 33 additions and 60 deletions

View File

@ -72,41 +72,61 @@ static bool trans_jalr(DisasContext *ctx, arg_jalr *a)
return true;
}
static bool gen_branch(DisasContext *ctx, arg_b *a, TCGCond cond)
{
TCGLabel *l = gen_new_label();
TCGv source1, source2;
source1 = tcg_temp_new();
source2 = tcg_temp_new();
gen_get_gpr(source1, a->rs1);
gen_get_gpr(source2, a->rs2);
tcg_gen_brcond_tl(cond, source1, source2, l);
gen_goto_tb(ctx, 1, ctx->pc_succ_insn);
gen_set_label(l); /* branch taken */
if (!has_ext(ctx, RVC) && ((ctx->base.pc_next + a->imm) & 0x3)) {
/* misaligned */
gen_exception_inst_addr_mis(ctx);
} else {
gen_goto_tb(ctx, 0, ctx->base.pc_next + a->imm);
}
ctx->base.is_jmp = DISAS_NORETURN;
tcg_temp_free(source1);
tcg_temp_free(source2);
return true;
}
static bool trans_beq(DisasContext *ctx, arg_beq *a)
{
gen_branch(ctx, OPC_RISC_BEQ, a->rs1, a->rs2, a->imm);
return true;
return gen_branch(ctx, a, TCG_COND_EQ);
}
static bool trans_bne(DisasContext *ctx, arg_bne *a)
{
gen_branch(ctx, OPC_RISC_BNE, a->rs1, a->rs2, a->imm);
return true;
return gen_branch(ctx, a, TCG_COND_NE);
}
static bool trans_blt(DisasContext *ctx, arg_blt *a)
{
gen_branch(ctx, OPC_RISC_BLT, a->rs1, a->rs2, a->imm);
return true;
return gen_branch(ctx, a, TCG_COND_LT);
}
static bool trans_bge(DisasContext *ctx, arg_bge *a)
{
gen_branch(ctx, OPC_RISC_BGE, a->rs1, a->rs2, a->imm);
return true;
return gen_branch(ctx, a, TCG_COND_GE);
}
static bool trans_bltu(DisasContext *ctx, arg_bltu *a)
{
gen_branch(ctx, OPC_RISC_BLTU, a->rs1, a->rs2, a->imm);
return true;
return gen_branch(ctx, a, TCG_COND_LTU);
}
static bool trans_bgeu(DisasContext *ctx, arg_bgeu *a)
{
gen_branch(ctx, OPC_RISC_BGEU, a->rs1, a->rs2, a->imm);
return true;
return gen_branch(ctx, a, TCG_COND_GEU);
}
static bool trans_lb(DisasContext *ctx, arg_lb *a)

View File

@ -531,53 +531,6 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)
ctx->base.is_jmp = DISAS_NORETURN;
}
static void gen_branch(DisasContext *ctx, uint32_t opc, int rs1, int rs2,
target_long bimm)
{
TCGLabel *l = gen_new_label();
TCGv source1, source2;
source1 = tcg_temp_new();
source2 = tcg_temp_new();
gen_get_gpr(source1, rs1);
gen_get_gpr(source2, rs2);
switch (opc) {
case OPC_RISC_BEQ:
tcg_gen_brcond_tl(TCG_COND_EQ, source1, source2, l);
break;
case OPC_RISC_BNE:
tcg_gen_brcond_tl(TCG_COND_NE, source1, source2, l);
break;
case OPC_RISC_BLT:
tcg_gen_brcond_tl(TCG_COND_LT, source1, source2, l);
break;
case OPC_RISC_BGE:
tcg_gen_brcond_tl(TCG_COND_GE, source1, source2, l);
break;
case OPC_RISC_BLTU:
tcg_gen_brcond_tl(TCG_COND_LTU, source1, source2, l);
break;
case OPC_RISC_BGEU:
tcg_gen_brcond_tl(TCG_COND_GEU, source1, source2, l);
break;
default:
gen_exception_illegal(ctx);
return;
}
tcg_temp_free(source1);
tcg_temp_free(source2);
gen_goto_tb(ctx, 1, ctx->pc_succ_insn);
gen_set_label(l); /* branch taken */
if (!has_ext(ctx, RVC) && ((ctx->base.pc_next + bimm) & 0x3)) {
/* misaligned */
gen_exception_inst_addr_mis(ctx);
} else {
gen_goto_tb(ctx, 0, ctx->base.pc_next + bimm);
}
ctx->base.is_jmp = DISAS_NORETURN;
}
static void gen_load(DisasContext *ctx, uint32_t opc, int rd, int rs1,
target_long imm)
{