s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT)
In case of 128bit, we always have a single element. Add new helpers for reading/writing 32/128 bit floats. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-14-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -247,7 +247,9 @@ DEF_HELPER_6(gvec_vstrc_cc_rt16, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_6(gvec_vstrc_cc_rt32, void, ptr, cptr, cptr, cptr, env, i32)
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/* === Vector Floating-Point Instructions */
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DEF_HELPER_FLAGS_5(gvec_vfa32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfa64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfa128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_4(gvec_wfc64, void, cptr, cptr, env, i32)
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DEF_HELPER_4(gvec_wfk64, void, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfce64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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@ -260,15 +262,21 @@ DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcdlg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vcgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vclgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfd32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfd64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfd128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfi64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfll32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfm32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfm64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfm128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfma64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_6(gvec_vfms64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_4(gvec_vfsq64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfs32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfs64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_FLAGS_5(gvec_vfs128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_4(gvec_vftci64, void, ptr, cptr, env, i32)
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#ifndef CONFIG_USER_ONLY
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@ -2501,29 +2501,94 @@ static DisasJumpType op_vfa(DisasContext *s, DisasOps *o)
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{
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const uint8_t fpf = get_field(s, m4);
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const uint8_t m5 = get_field(s, m5);
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gen_helper_gvec_3_ptr *fn;
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if (fpf != FPF_LONG || extract32(m5, 0, 3)) {
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gen_program_exception(s, PGM_SPECIFICATION);
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return DISAS_NORETURN;
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}
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gen_helper_gvec_3_ptr *fn = NULL;
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switch (s->fields.op2) {
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case 0xe3:
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fn = gen_helper_gvec_vfa64;
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switch (fpf) {
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case FPF_SHORT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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fn = gen_helper_gvec_vfa32;
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}
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break;
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case FPF_LONG:
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fn = gen_helper_gvec_vfa64;
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break;
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case FPF_EXT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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fn = gen_helper_gvec_vfa128;
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}
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break;
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default:
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break;
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}
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break;
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case 0xe5:
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fn = gen_helper_gvec_vfd64;
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switch (fpf) {
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case FPF_SHORT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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fn = gen_helper_gvec_vfd32;
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}
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break;
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case FPF_LONG:
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fn = gen_helper_gvec_vfd64;
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break;
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case FPF_EXT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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fn = gen_helper_gvec_vfd128;
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}
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break;
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default:
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break;
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}
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break;
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case 0xe7:
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fn = gen_helper_gvec_vfm64;
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switch (fpf) {
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case FPF_SHORT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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fn = gen_helper_gvec_vfm32;
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}
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break;
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case FPF_LONG:
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fn = gen_helper_gvec_vfm64;
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break;
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case FPF_EXT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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fn = gen_helper_gvec_vfm128;
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}
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break;
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default:
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break;
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}
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break;
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case 0xe2:
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fn = gen_helper_gvec_vfs64;
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switch (fpf) {
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case FPF_SHORT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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fn = gen_helper_gvec_vfs32;
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}
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break;
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case FPF_LONG:
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fn = gen_helper_gvec_vfs64;
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break;
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case FPF_EXT:
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if (s390_has_feat(S390_FEAT_VECTOR_ENH)) {
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fn = gen_helper_gvec_vfs128;
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}
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break;
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default:
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break;
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}
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break;
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default:
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g_assert_not_reached();
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}
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if (!fn || extract32(m5, 0, 3)) {
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gen_program_exception(s, PGM_SPECIFICATION);
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return DISAS_NORETURN;
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}
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gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2),
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get_field(s, v3), cpu_env, m5, fn);
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return DISAS_NEXT;
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@ -78,16 +78,38 @@ static void handle_ieee_exc(CPUS390XState *env, uint8_t vxc, uint8_t vec_exc,
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}
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}
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static float32 s390_vec_read_float32(const S390Vector *v, uint8_t enr)
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{
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return make_float32(s390_vec_read_element32(v, enr));
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}
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static float64 s390_vec_read_float64(const S390Vector *v, uint8_t enr)
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{
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return make_float64(s390_vec_read_element64(v, enr));
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}
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static float128 s390_vec_read_float128(const S390Vector *v)
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{
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return make_float128(s390_vec_read_element64(v, 0),
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s390_vec_read_element64(v, 1));
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}
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static void s390_vec_write_float32(S390Vector *v, uint8_t enr, float32 data)
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{
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return s390_vec_write_element32(v, enr, data);
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}
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static void s390_vec_write_float64(S390Vector *v, uint8_t enr, float64 data)
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{
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return s390_vec_write_element64(v, enr, data);
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}
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static void s390_vec_write_float128(S390Vector *v, float128 data)
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{
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s390_vec_write_element64(v, 0, data.high);
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s390_vec_write_element64(v, 1, data.low);
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}
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typedef float64 (*vop64_2_fn)(float64 a, float_status *s);
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static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
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bool s, bool XxC, uint8_t erm, vop64_2_fn fn,
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@ -160,6 +182,29 @@ DEF_GVEC_VOP2_64(vclgd)
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DEF_GVEC_VOP2(vfi, round_to_int)
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DEF_GVEC_VOP2(vfsq, sqrt)
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typedef float32 (*vop32_3_fn)(float32 a, float32 b, float_status *s);
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static void vop32_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vop32_3_fn fn,
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uintptr_t retaddr)
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{
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uint8_t vxc, vec_exc = 0;
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S390Vector tmp = {};
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int i;
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for (i = 0; i < 4; i++) {
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const float32 a = s390_vec_read_float32(v2, i);
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const float32 b = s390_vec_read_float32(v3, i);
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s390_vec_write_float32(&tmp, i, fn(a, b, &env->fpu_status));
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vxc = check_ieee_exc(env, i, false, &vec_exc);
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if (s || vxc) {
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break;
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}
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}
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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*v1 = tmp;
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}
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typedef float64 (*vop64_3_fn)(float64 a, float64 b, float_status *s);
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static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vop64_3_fn fn,
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@ -183,15 +228,36 @@ static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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*v1 = tmp;
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}
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#define DEF_GVEC_VOP3(NAME, OP) \
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void HELPER(gvec_##NAME##64)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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typedef float128 (*vop128_3_fn)(float128 a, float128 b, float_status *s);
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static void vop128_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vop128_3_fn fn,
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uintptr_t retaddr)
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{
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const float128 a = s390_vec_read_float128(v2);
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const float128 b = s390_vec_read_float128(v3);
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uint8_t vxc, vec_exc = 0;
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S390Vector tmp = {};
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s390_vec_write_float128(&tmp, fn(a, b, &env->fpu_status));
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vxc = check_ieee_exc(env, 0, false, &vec_exc);
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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*v1 = tmp;
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}
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#define DEF_GVEC_VOP3_B(NAME, OP, BITS) \
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void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool se = extract32(simd_data(desc), 3, 1); \
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\
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vop64_3(v1, v2, v3, env, se, float64_##OP, GETPC()); \
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vop##BITS##_3(v1, v2, v3, env, se, float##BITS##_##OP, GETPC()); \
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}
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#define DEF_GVEC_VOP3(NAME, OP) \
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DEF_GVEC_VOP3_B(NAME, OP, 32) \
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DEF_GVEC_VOP3_B(NAME, OP, 64) \
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DEF_GVEC_VOP3_B(NAME, OP, 128)
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DEF_GVEC_VOP3(vfa, add)
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DEF_GVEC_VOP3(vfs, sub)
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DEF_GVEC_VOP3(vfd, div)
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