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target/mips: Add simple user-mode mips_cpu_do_interrupt()

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The #ifdef'ry hides that the user-mode implementation of
mips_cpu_do_interrupt() simply sets exception_index = EXCP_NONE.

Add this simple implementation to tcg/user/tlb_helper.c, and
the corresponding Meson machinery to build this file when user
emulation is configured.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210428170410.479308-14-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-04-18 15:16:06 +02:00
parent 6fe25ce587
commit 0a31c16c9c
5 changed files with 39 additions and 5 deletions
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5
target/mips/meson.build
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@ -6,6 +6,7 @@ gen = [
decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
]
mips_user_ss = ss.source_set()
mips_ss = ss.source_set()
mips_ss.add(files(
'cpu.c',
@ -34,6 +35,9 @@ mips_tcg_ss.add(when: 'TARGET_MIPS64', if_true: files(
), if_false: files(
'mxu_translate.c',
))
if 'CONFIG_TCG' in config_all
subdir('tcg')
endif
mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
@ -52,3 +56,4 @@ mips_ss.add_all(when: 'CONFIG_TCG', if_true: [mips_tcg_ss])
target_arch += {'mips': mips_ss}
target_softmmu_arch += {'mips': mips_softmmu_ss}
target_user_arch += {'mips': mips_user_ss}

3
target/mips/tcg/meson.build Normal file
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@ -0,0 +1,3 @@
if have_user
subdir('user')
endif

3
target/mips/tcg/user/meson.build Normal file
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@ -0,0 +1,3 @@
mips_user_ss.add(files(
'tlb_helper.c',
))

28
target/mips/tcg/user/tlb_helper.c Normal file
View File

@ -0,0 +1,28 @@
/*
* MIPS TLB (Translation lookaside buffer) helpers.
*
* Copyright (c) 2004-2005 Jocelyn Mayer
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/exec-all.h"
#include "internal.h"
void mips_cpu_do_interrupt(CPUState *cs)
{
cs->exception_index = EXCP_NONE;
}

5
target/mips/tlb_helper.c
View File

@ -965,11 +965,8 @@ static inline void set_badinstr_registers(CPUMIPSState *env)
}
}
#endif /* !CONFIG_USER_ONLY */
void mips_cpu_do_interrupt(CPUState *cs)
{
#if !defined(CONFIG_USER_ONLY)
MIPSCPU *cpu = MIPS_CPU(cs);
CPUMIPSState *env = &cpu->env;
bool update_badinstr = 0;
@ -1272,11 +1269,9 @@ void mips_cpu_do_interrupt(CPUState *cs)
env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr,
env->CP0_DEPC);
}
#endif
cs->exception_index = EXCP_NONE;
}
#if !defined(CONFIG_USER_ONLY)
void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra)
{
CPUState *cs = env_cpu(env);