target-arm: increase arrays of registers R13 & R14
Increasing banked_r13 and banked_r14 to store LR_mon and SP_mon (bank index 7). Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch> Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1413910544-20150-2-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -153,8 +153,8 @@ typedef struct CPUARMState {
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/* Banked registers. */
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uint64_t banked_spsr[8];
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uint32_t banked_r13[6];
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uint32_t banked_r14[6];
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uint32_t banked_r13[8];
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uint32_t banked_r14[8];
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/* These hold r8-r12. */
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uint32_t usr_regs[5];
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@ -238,8 +238,8 @@ const VMStateDescription vmstate_arm_cpu = {
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},
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VMSTATE_UINT32(env.spsr, ARMCPU),
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VMSTATE_UINT64_ARRAY(env.banked_spsr, ARMCPU, 8),
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VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 6),
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VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 6),
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VMSTATE_UINT32_ARRAY(env.banked_r13, ARMCPU, 8),
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VMSTATE_UINT32_ARRAY(env.banked_r14, ARMCPU, 8),
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VMSTATE_UINT32_ARRAY(env.usr_regs, ARMCPU, 5),
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VMSTATE_UINT32_ARRAY(env.fiq_regs, ARMCPU, 5),
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VMSTATE_UINT64_ARRAY(env.elr_el, ARMCPU, 4),
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