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target/ppc: Add power10 pmu SPRs

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Currently in tcg mode, when reading from power10 pmu spr like MMCR3,
qemu logs this message (when starting qemu with -d guest_errors)

	Trying to read invalid spr 754 (0x2f2) at 0000000030056bb0

This is becuase, no read/write call-backs are registered for
these SPRs. Add support to register generic read/write
functions to these power10 pmu sprs to fix it.

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
Madhavan Srinivasan 2024-02-19 16:09:24 +05:30 committed by Nicholas Piggin
parent a9bd40d937
commit 0b8893236e
2 changed files with 40 additions and 0 deletions
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6
target/ppc/cpu.h
View File

@ -1951,6 +1951,12 @@ void ppc_compat_add_property(Object *obj, const char *name,
#define SPR_BOOKE_TLB2CFG (0x2B2)
#define SPR_BOOKE_TLB3CFG (0x2B3)
#define SPR_BOOKE_EPR (0x2BE)
#define SPR_POWER_USIER2 (0x2E0)
#define SPR_POWER_USIER3 (0x2E1)
#define SPR_POWER_UMMCR3 (0x2E2)
#define SPR_POWER_SIER2 (0x2F0)
#define SPR_POWER_SIER3 (0x2F1)
#define SPR_POWER_MMCR3 (0x2F2)
#define SPR_PERF0 (0x300)
#define SPR_RCPU_MI_RBA0 (0x300)
#define SPR_MPC_MI_CTR (0x300)

34
target/ppc/cpu_init.c
View File

@ -5308,6 +5308,38 @@ static void register_power8_pmu_user_sprs(CPUPPCState *env)
0x00000000);
}
static void register_power10_pmu_sup_sprs(CPUPPCState *env)
{
spr_register_kvm(env, SPR_POWER_MMCR3, "MMCR3",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_MMCR3, 0x00000000);
spr_register_kvm(env, SPR_POWER_SIER2, "SIER2",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_SIER2, 0x00000000);
spr_register_kvm(env, SPR_POWER_SIER3, "SIER3",
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_SIER3, 0x00000000);
}
static void register_power10_pmu_user_sprs(CPUPPCState *env)
{
spr_register(env, SPR_POWER_UMMCR3, "UMMCR3",
&spr_read_generic, &spr_write_generic,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_POWER_USIER2, "USIER2",
&spr_read_generic, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
spr_register(env, SPR_POWER_USIER3, "USIER3",
&spr_read_generic, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
0x00000000);
}
static void register_power5p_ear_sprs(CPUPPCState *env)
{
/* External access control */
@ -6502,6 +6534,8 @@ static void init_proc_POWER10(CPUPPCState *env)
register_power9_mmu_sprs(env);
register_power10_hash_sprs(env);
register_power10_dexcr_sprs(env);
register_power10_pmu_sup_sprs(env);
register_power10_pmu_user_sprs(env);
/* FIXME: Filter fields properly based on privilege level */
spr_register_kvm_hv(env, SPR_PSSCR, "PSSCR", NULL, NULL, NULL, NULL,